Electronic devices and materials Books

Book SynopsisThis book provides a broad overview on the different aspects of solar energy, with a focus on photovoltaics, which is the technology that allows light energy to be converted into electric energy. Renewable energy sources have become increasingly popular in recent years, and solar is one of the most adaptable and attractive types – from solar farms to support the National Grid to roof panels/tiles used for solar thermal heating systems, and small solar garden lights. Written by Delft University researchers, Solar Energy uniquely covers both the physics of photovoltaic (PV) cells and the design of PV systems for real-life applications, from a concise history of solar cells components and location issues of current systems. The book is designed to make this complicated subject accessible to all, and is packed with fascinating graphs and charts, as well as useful exercises to cement the topics covered in each chapter. Solar Energy outlines the fundamental principles of semiconductor solar cells, as well as PV technology: crystalline silicon solar cells, thin-film cells, PV modules, and third-generation concepts. There is also background on PV systems, from simple stand-alone to complex systems connected to the grid. This is an invaluable reference for physics students, researchers, industrial engineers and designers working in solar energy generation, as well those with a general interest in renewable energy.Table of ContentsI. Introduction 1. Energy 2. Status and prospects of PV technology 3. The working principle of a solar cell II. PV Fundamentals 4. Electrodynamic basics 5. Solar radiation 6. Basic semiconductor physics 7. Generation and recombination of electron-hole pairs 8. Semiconductor junctions 9. Solar cell parameters and equivalent circuit 10. Losses and efficiency limits III. PV technology 11. A short history of solar cells 12. Crystalline silicon solar cells 13. Thin-film solar cells 14. A closer look to some processes 15. PV modules 16. Third generation concepts IV. PV systems 17. Introduction to PV systems 18. Location issues 19. Components of PV systems 20. PV system design 21. PV System economics and ecology V. Alternative solar energy conversion technologies 22. Solar thermal energy 23. Solar fuels Appendix A. Derivations in electrodynamics B. Derivation of homojunctions J-V curves C. Some aspects of surface recombination D. The morphology of selected TCO samples E. Some aspects on location issues F. Derivations for DC-DC converters G. Fluid-dynamic model Bibliography Index

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Book SynopsisWith more than 150 color images, step-by-step instructions and detailed explanations, and a handy materials list of components and sources, this is the ultimate guide to explore the hidden universe of radio waves!

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Book SynopsisJIM TURLEY is a semiconductor industry analyst, editor, and lecturer in Silicon Valley. He is aregular columnist for Embedded Systems Programming, Computer Design, Circuit Cellar, andSupermicro magazines. He was Senior Editor of the Microprocessor Report and a three-time winnerof the Computer Press Award. Jim also provides consulting services to leading semiconductorfirms and is often called upon to participate in new product reviews, strategy sessions, andtechnology development. He has also written six books on a number of different topics,including PCs Made Easy.Table of ContentsAcknowledgments. 1. Running Start. About This Book. Some Words to Know. 2. Semiconductor Family Tree. Semiconductor Family Tree. Simple Analog Components. Advanced Analog Components. A/D and D/A Converters. MEMS. Medium-Scale Digital Chips. Highly Integrated Digital Chips. 3. How Chips Are Designed. Old-Style Design Process. New-Style Design Process. Verifying the Design Works. Using Outside IP. Getting to Tape Out and Film. Current Problems and Future Trends. 4. How Chips Are Made. Clean Rooms and Fabs. Developing Technology: Chips and Photography. Silicon Ingots to Start. Polishing the Wafer Smooth. Building the Layer Cake. Laser Surgery: Etching Away the Transistors. Step and Repeat. Etching Bath. Ready for the Metal Round. Testing Phase. Bringing Out the Diamonds. Sorting the Fast from the Merely Good. Wrap It Up. How Many Nanometers in a Micron? Let's Get Small. 5. Business and Markets. Worldwide Production of Semiconductors. Worldwide Consumption of Semiconductors. Military Electronics. The Business of Making Semiconductors. 6. Essential Guide to Microprocessors. Overview of Microprocessors. Microprocessor History and Evolution. What's a Processor Architecture? Microprocessor Anatomy and Gazetteer. What Do 4-Bit, 8-Bit, 16-Bit, and 32-Bit Mean? Performance, Benchmarks, and Gigahertz. What Is Software? Choosing Microprocessors. Microprocessor Future Trends. 7. Essential Guide to Memory Chips. Overview of Memory Chips. Nonvolatile ROM. Volatile RAM. Memory Interfaces. Future Memories. 8. Essential Guide to Custom and Configurable Chips. Overview of Custom Chips. Field-Programmable Chips. Custom ASIC Chips. Dynamically Reconfigurable Chips. Intellectual Property Licensing. Future Outlook for Custom Chips. 9. Theory. Digital and Binary Concepts. Gates and Logic Functions. How Transistors Work. About Electrons and Electronics. Appendix: Standard Bodies and Reference. Standards Bodies and Organizations. Conferences and Trade Shows. Other Resources. Glossary. Index.

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Book SynopsisTrade Review"Jennifer Gabrys deftly synthesizes fields and lines of inquiry in weaving a signature story of our age, working across intellectual planes and variegated systems and networks. Program Earth is a tantalizing account of digital, citizen-sensing worlds in the making."—Kevin McHugh, Arizona State University"Impressive and original, Program Earth is not just concerned with the collection and dissemination of data, but also—and more crucially—with the transformation of these data and with their effects."—Steven Shaviro, author of The Universe of Things: On Speculative Realism"Full of stimulating ideas and provocative reframings of environmental concerns that are sure to spark further research."—American Journal of Sociology "Readers will revel in extensively written case studies as well as the contemplative opportunity to challenge, with renewed conceptual tools, the urgent notion of the environment."—Cultural Geographies"Jennifer Gabrys' book is a timely publication that combines empirical insights with a necessary speculative attitude in an emerging field."—Tecnosciencza"This sociological treatise is a valuable contribution for historians of technology... Program Earth succeeds in raising multiple epistemological and political issues intertwining sensing technologies, infrastructures, democracy, and power."—Technology and Culture Table of ContentsContentsPreface and AcknowledgmentsIntroduction. Environment as Experiment in Sensing TechnologyPart 1. Wild Sensing1. Sensing an Experimental Forest: Processing Environments and Distributing Relations 2. From Moss Cam to Spillcam: Technogeographies of Experience3. Animals as Sensors: Mobile Organisms and the Problem of MilieusPart 2. Pollution Sensing4. Sensing Climate Change and Expressing Environmental Citizenship5. Sensing Oceans and Geo-Speculating with a Garbage Patch6. Sensing Air and Creaturing Data Part 3. Urban Sensing7. Citizen Sensing in the Smart and Sustainable City: From Environments to Environmentality8. Engaging the Idiot in Participatory Digital Urbanism 9. Digital Infrastructures of Withness: Constructing a Speculative CityConclusion. Planetary Computerization, RevisitedNotesBibliographyIndex

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Book SynopsisThis book on system design with microprocessors in agriculture instrumentation covers topics like transducers, binary number system, Intel 8085, peripheral interfacing, analog to digital conversion, and case studies on grain moisture, safe storage, soil nutrient estimation, and drip irrigation. Targeted at agricultural engineering students.

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Book SynopsisEnables mastery of the essential concepts required to cross the barriers to a successful career in microwave and RF design. Extensive treatment of scattering parameters, that naturally describe power flow, and of Smith-chart-based design procedures prepare the student for success.

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Book SynopsisGain complete understanding of electronic systems and their constituent parts. From the origins of the semiconductor industry right up until today, this book serves as a technical primer to semiconductor technology. Spanning design and manufacturing to the basic physics of electricity, it provides a comprehensive base of understanding from transistor to iPhone. Melding an accessible, conversational style with over 100 diagrams and illustrations, Understanding Semiconductors provides clear explanations of technical concepts going deep enough to fully explain key vernacular, mechanisms, and basic processes, without getting lost in the supporting theories or the theories that support the supporting theories. Concepts are tethered to the real world with crisp analysis of industry dynamics and future trends.    As a break from the straight-ahead scientific concepts that keep the world of semiconductors spinning, Understanding SemicondTable of ContentsChapter One: Semiconductors BasicsElectricity Electric Charge Electric Current Electromagnetic Force (EMF) and Voltage Power Joule’s LawConductivity Conductors Insulators SemiconductorsSilicon – The Crucial SemiconductorSemiconductor History – Part OneSemiconductor Value Chain Customer Need & Market Demand Chip Design Fabrication & Manufacturing Packaging & Assembly System Integration Product DeliveryPerformance, Power, Area, and Cost (PPAC)Who Uses Semiconductors? Chapter Two: Circuit Building BlocksDiscrete Components – The Building Blocks of CircuitsTransistors Transistor Structure How Transistors Work – A Water Analogy FinFET vs. MOSFET TransistorsCMOSGeometric vs. Functional Scaling – Part 1Logic Gates Chapter Three: Building a System Different Levels of Electronics – How the System Fits TogetherIntegrated Circuit Design Flow System Level Architecture Front End Design Design Verification Physical Design High Level Synthesis Design Netlist Floorplanning Place-and-Route Clock-tree Synthesis Back End Validation Manufacturing (GDS)EDA Tools Chapter Four: Semiconductor Manufacturing Front-End ManufacturingDepositionPatterning & Lithography Removal ProcessesPhysical Property AlterationCycling – Pre & Post Metal Wafer Probing, Yield, and Failure AnalysisBack-End Manufacturing Assembly & TestWafer DicingDie BondingExternal Interconnect FormationEncapsulation and SealingFinal Testing Chapter Five: Tying the System Together Input / Output (I/O) IC Packaging Wire Bonding Flip Chip Packaging Wafer Level Packaging Multi-Chip Modules & System-In Packages 2.5/3D Packaging Signal Integrity Bus Interfaces Power Flow within Electronic Systems Chapter Six: Common Circuits and System Components Digital vs. Analog Wavelength vs. Frequency Building a System - Putting Components Together Common System Components – The SIA Framework Micro Components Logic Memory OSD Analog Components Micro Components Microprocessors & Microcontrollers Digital Signal Processors Micro Component Market Summary Logic Special Purpose Logic Central Processing Unit Graphics Processing Unit ASIC vs. FPGA System on Chip Logic Market Summary Memory Memory Stack Volatile Memory Random Access MemoryDRAM SRAM Non-Volatile Memory Primary Memory ROMPROMEPROMEEPROMNAND Secondary Memory HDD SSD Stacked Die Memory High Bandwidth Memory Hybrid Memory Cube Memory Market Summary Optoelectronics, Sensors & Actuators, and Discrete Components Optoelectronics Sensors & Actuators MEMS Discrete Components PMIC PMU OSD Market Summary Analog Components General Purpose Analog IC vs. ASSP Analog Component Market Summary Chapter Seven: RF & Wireless Technologies RF Signals and The Electromagnetic Spectrum RFIC – Transmitters and Receivers Power Source Oscillators Modulators & Demodulators Amplifiers Antenna Filters OSI Reference Model Application Layer Physical Layer (PHY) Macro System Stack RF and Wireless – The Big Picture Base Stations Tracking a Phone Call Broadcasting and Frequency Regulation Digital Signal ProcessingTDMA & CDMA 1G to 5G – An Evolution Wireless Communication and Cloud Computing Chapter Eight: System Architecture and Integration Macro vs. Micro-Architecture Common Chip Architectures Von Neumann Architecture Harvard Architecture CISC vs. RISC Choosing an ISA Heterogenous vs. Monolithic Integration Chapter Nine: The Semiconductor Industry – Past, Present, and Future Semiconductor Industry – Major Challenges Design Costs Manufacturing Costs Evolution of the Semiconductor Industry 1960-1980’s: Fully Integrated Semiconductor Companies 1980’s-2000: IDM + Fabless Design + Pure-Play Foundry 2000-Today: IDM + Fabless Design + Foundries + System Companies Fabs vs. Fabless Design – The Case Against IDM’s Industry Outlook Cyclical Revenues and High Volatility High R&D and Capital Investment Positive Productivity Growth Long-Term Profitability High Consolidation 2010-2021: Major Acquisitions by Year U.S. vs. International Semiconductor Market COVID-19 & The Semiconductor Supply Chain Chinese Competition Chapter Ten: The Future of Semiconductors and Electronic Systems Prolonging Moore’s Law – Sustaining Technologies 2.5 & 3D Die Stacking Gate-All-Around (GAA) Transistors & New Channel Materials Custom Silicon & Specialized Accelerators Graphene Carbon Nanotubes & 2D Transistors Overcoming Moore’s Law – New Technologies Quantum Computing & Quantum Transistors Neuromorphic Computing

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Book SynopsisMicrocontrollers, like Raspberry Pi Pico, are computers stripped down to their bare essentials (no keyboard, mouse, or monitor). Learn how to set up your desktop or laptop computer to write Python code for the Pico and Pico W, and how to make your own electro-mechanical projects that can interact with the real world.

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Book SynopsisOffers coverage of some of the major topics related to the performance and failure of materials used in electronic devices and electronics packaging. This book explains the common mechanisms that lead to electronics materials failures, including dielectric breakdown, hot-electron effects and radiation damage.Table of Contents1. An Overview of Electronic Devices and Their Reliability 2. Electronic Devices: Materials Properties Determine How They Operate and Are Fabricated 3. Defects, Contamination and Yield 4. The Mathematics of Failure and Reliability 5. Mass Transport-Induced Failure 6. Electronic Charge-Induced Damage 7. Environmental Damage to Electronic Products 8. Packaging Materials, Processes, and Stresses 9. Degradation of Contacts and Packages 10. Degradation and Failure of Electro-Optical and Magnetic Materials and Devices 11. Characterization and Failure Analysis of Material, Devices and Packages 12. Future Directions and Reliability Issues

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Book SynopsisTable of Contents1. The Linux/ARM embedded platform Chapter 2. Multicore and data-level optimization: OpenMP and SIMD Chapter 3. Arithmetic optimization and the Linux Framebuffer Chapter 4. Memory optimization and video processing Chapter 5. Embedded heterogeneous programming with OpenCL Appendix A. Adding PMU support to Raspbian for the Generation 1 Raspberry Pi B. NEON intrinsic reference C. OpenCL reference Index

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Book Synopsis  Ben G. Streetman is Dean Emeritus of the College of Engineering at The University of Texas at Austin. He is an Emeritus Professor of Electrical and Computer Engineering, where he held the Dula D. Cockrell Centennial Chair. He was the founding Director of the Microelectronics Research Center (198496). His teaching and research interests involve semiconductor materials and devices. After receiving a Ph.D. from The University of Texas at Austin (1966) he was on the faculty (19661982) of the University of Illinois at Urbana-Champaign. He returned to The University of Texas at Austin in 1982. His honors include the Education Medal of the Institute of Electrical and Electronics Engineers (IEEE), the Frederick Emmons Terman Medal of the American Society for Engineering Education (ASEE), and the Heinrich Welker Medal from the International Conference on Compound Semiconductors. He is a member of the National Academy of Engineering and the American Academy of Table of Contents ABOUT THE AUTHORS XvII 1 CRYSTAL PROPERTIES AND GROWTH OF SEMICONDUCTORS 1 1.1 Semiconductor Materials 1 1.2 Crystal Lattices 3 1.3 Bulk Crystal Growth 12 1.4 epitaxial Growth 17 1.2.1 Periodic Structures 3 1.2.2 Cubic Lattices 5 1.2.3 Planes and directions 7 1.2.4 The diamond Lattice 9 1.3.1 Starting Materials 12 1.3.2 Growth of Single-Crystal Ingots 13 1.3.3 wafers 14 1.3.4 doping 16 1.4.1 Lattice-Matching in epitaxial Growth 17 1.4.2 vapor-Phase epitaxy 19 1.4.3 Molecular Beam epitaxy 22 1.5 wave Propagation in discrete, Periodic Structures 24 2 ATOMS AND ELECTRONS 32 2.1 Introduction to Physical Models 33 2.2 experimental Observations 34 2.3 The Bohr Model 37 2.4 Quantum Mechanics 41 2.2.1 The Photoelectric effect 34 2.2.2 Atomic Spectra 36 2.5 Atomic Structure and the Periodic Table 49 2.4.1 Probability and the Uncertainty Principle 41 2.4.2 The Schrödinger wave equation 43 2.4.3 Potential well Problem 45 2.4.4 Tunneling 48 2.5.1 The hydrogen Atom 50 2.5.2 The Periodic Table 52 3 ENERGY BANDS AND CHARGE CARRIERS IN SEMICONDUCTORS 63 3.1 Bonding Forces and energy Bands in Solids 63 3.2 Charge Carriers in Semiconductors 74 3.3 Carrier Concentrations 89 3.4 drift of Carriers in electric and Magnetic Fields 100 3.1.1 Bonding Forces in Solids 64 3.1.2 energy Bands 66 3.1.3 Metals, Semiconductors, and Insulators 69 3.1.4 direct and Indirect Semiconductors 70 3.1.5 variation of energy Bands with Alloy Composition 72 3.2.1 electrons and holes 74 3.2.2 effective Mass 79 3.2.3 Intrinsic Material 83 3.2.4 extrinsic Material 84 3.2.5 electrons and holes in Quantum wells 87 3.3.1 The Fermi Level 89 3.3.2 electron and hole Concentrations at equilibrium 92 3.3.3 Temperature dependence of Carrier Concentrations 97 3.3.4 Compensation and Space Charge neutrality 99 3.4.1 Conductivity and Mobility 100 3.4.2 drift and Resistance 105 3.4.3 effects of Temperature and doping on Mobility 106 3.4.4 high-Field effects 109 3.4.5 The hall effect 109 3.5 Invariance of the Fermi Level at equilibrium 111 4 EXCESS CARRIERS IN SEMICONDUCTORS 122 4.1 Optical Absorption 122 4.2 Luminescence 125 4.3 Carrier Lifetime and Photoconductivity 128 4.4 diffusion of Carriers 137 4.2.1 Photoluminescence 126 4.2.2 electroluminescence 128 4.3.1 direct Recombination of electrons and holes 129 4.3.2 Indirect Recombination; Trapping 131 4.3.3 Steady State Carrier Generation; Quasi-Fermi Levels 134 4.3.4 Photoconductive devices 136 4.4.1 diffusion Processes 138 4.4.2 diffusion and drift of Carriers; Built-in Fields 140 4.4.3 diffusion and Recombination; The Continuity equation 143 4.4.4 Steady State Carrier Injection; diffusion Length 145 4.4.5 The haynes–Shockley experiment 147 4.4.6 Gradients in the Quasi-Fermi Levels 150 5 JUNCTIONS159 5.1 Fabrication of p-n Junctions 159 5.2 equilibrium Conditions 174 5.3 Forward- and Reverse-Biased 5.4 Reverse-Bias Breakdown 200 5.5 Transient and A-C Conditions 209 5.6 deviations from the Simple Theory 222 5.7 Metal–Semiconductor Junctions 231 5.1.1 Thermal Oxidation 160 5.1.2 diffusion 161 5.1.3 Rapid Thermal Processing 163 5.1.4 Ion Implantation 164 5.1.5 Chemical vapor deposition (Cvd) 167 5.1.6 Photolithography 168 5.1.7 etching 171 5.1.8 Metallization 173 5.2.1 The Contact Potential 175 5.2.2 equilibrium Fermi Levels 180 5.2.3 Space Charge at a Junction 180 Junctions; Steady State Conditions 185 5.3.1 Qualitative description of Current Flow at a Junction 185 5.3.2 Carrier Injection 189 5.3.3 Reverse Bias 198 5.4.1 Zener Breakdown 201 5.4.2 Avalanche Breakdown 202 5.4.3 Rectifiers 205 5.4.4 The Breakdown diode 208 5.5.1 Time variation of Stored Charge 209 5.5.2 Reverse Recovery Transient 212 5.5.3 Switching diodes 216 5.5.4 Capacitance of p-n Junctions 216 5.5.5 The varactor diode 221 5.6.1 effects of Contact Potential on Carrier Injection 223 5.6.2 Recombination and Generation in the Transition Region 225 5.6.3 Ohmic Losses 227 5.6.4 Graded Junctions 228 5.7.1 Schottky Barriers 231 5.7.2 Rectifying Contacts 233 5.7.3 Ohmic Contacts 235 5.7.4 Typical Schottky Barriers 237 5.8 heterojunctions 238 6 FIELD-EFFECT TRANSISTORS 257 6.1 Transistor Operation 258 6.2 The Junction FeT 260 6.3 The Metal—Semiconductor FeT 267 6.4 The Metal—Insulator—Semiconductor FeT 271 6.5 The MOS Field-effect Transistor 299 6.6 Advanced MOSFeT Structures 330 6.1.1 The Load Line 258 6.1.2 Amplification and Switching 259 6.2.1 Pinch-off and Saturation 261 6.2.2 Gate Control 263 6.2.3 Current—voltage Characteristics 265 6.3.1 The GaAs MeSFeT 267 6.3.2 The high electron Mobility Transistor (heMT) 268 6.3.3 Short Channel effects 270 6.4.1 Basic Operation and Fabrication 271 6.4.2 The Ideal MOS Capacitor 275 6.4.3 effects of Real Surfaces 286 6.4.4 Threshold voltage 289 6.4.5 MOS Capacitance—voltage Analysis 291 6.4.6 Time-dependent Capacitance Measurements 295 6.4.7 Current—voltage Characteristics of MOS Gate Oxides 296 6.5.1 Output Characteristics 299 6.5.2 Transfer Characteristics 302 6.5.3 Mobility Models 305 6.5.4 Short Channel MOSFeT I—V Characteristics 307 6.5.5 Control of Threshold voltage 309 6.5.6 Substrate Bias effects–the “body” effect 312 6.5.7 Subthreshold Characteristics 316 6.5.8 equivalent Circuit for the MOSFeT 318 6.5.9 MOSFeT Scaling and hot electron effects 321 6.5.10 drain-Induced Barrier Lowering 325 6.5.11 Short Channel effect and narrow width effect 327 6.5.12 Gate-Induced drain Leakage 329 6.6.1 Metal Gate-high-k 330 6.6.2 enhanced Channel Mobility Materials and Strained Si FeTs 331 6.6.3 SOI MOSFeTs and FinFeTs 333 7 BIPOLAR JUNCTION TRANSISTORS 348 7.1 Fundamentals of BJT Operation 348 7.2 Amplification with BJTs 352 7.3 BJT Fabrication 355 7.4 Minority Carrier distributions and Terminal Currents 358 7.5 Generalized Biasing 367 7.6 Switching 375 7.7 Other Important effects 380 7.8 Frequency Limitations of Transistors 394 7.4.1 Solution of the diffusion equation in the Base Region 359 7.4.2 evaluation of the Terminal Currents 361 7.4.3 Approximations of the Terminal Currents 364 7.4.4 Current Transfer Ratio 366 7.5.1 The Coupled-diode Model 368 7.5.2 Charge Control Analysis 373 7.6.1 Cutoff 376 7.6.2 Saturation 377 7.6.3 The Switching Cycle 378 7.6.4 Specifications for Switching Transistors 379 7.7.1 drift in the Base Region 381 7.7.2 Base narrowing 382 7.7.3 Avalanche Breakdown 383 7.7.4 Injection Level; Thermal effects 385 7.7.5 Base Resistance and emitter Crowding 386 7.7.6 Gummel—Poon Model 388 7.7.7 Kirk effect 391 7.8.1 Capacitance and Charging Times 394 7.8.2 Transit Time effects 397 7.8.3 webster effect 398 7.8.4 high-Frequency Transistors 398 7.9 heterojunction Bipolar Transistors 400 8 OPTOELECTRONIC DEVICES 410 8.1 Photodiodes 410 8.1.1 Current and voltage in an Illuminated Junction 411 8.1.2 Solar Cells 414 8.1.3 Photodetectors 417 8.1.4 Gain, Bandwidth, and Signal-to-noise Ratio of Photodetectors 419 8.2 Light-emitting diodes 422 8.3 Lasers 430 8.4 Semiconductor Lasers 434 8.2.1 Light-emitting Materials 423 8.2.2 Fiber-Optic Communications 427 8.4.1 Population Inversion at a Junction 435 8.4.2 emission Spectra for p-n Junction Lasers 437 8.4.3 The Basic Semiconductor Laser 438 8.4.4 heterojunction Lasers 439 8.4.5 Materials for Semiconductor Lasers 442 8.4.6 Quantum Cascade Lasers 444 9 INTEGRATED CIRCUITS 452 9.1 Background 453 9.2 evolution of Integrated Circuits 456 9.3 Monolithic device elements 459 9.1.1 Advantages of Integration 453 9.1.2 Types of Integrated Circuits 455 9.4 Charge Transfer devices 480 9.5 Ultra Large-Scale Integration (ULSI) 485 9.6 Testing, Bonding, and Packaging 510 9.3.1 CMOS Process Integration 459 9.3.2 Integration of Other Circuit elements 474 9.4.1 dynamic effects in MOS Capacitors 481 9.4.2 The Basic CCd 482 9.4.3 Improvements on the Basic Structure 483 9.4.4 Applications of CCds 484 9.5.1 Logic devices 489 9.5.2 Semiconductor Memories 497 9.6.1 Testing 511 9.6.2 wire Bonding 511 9.6.3 Flip-Chip Techniques 515 9.6.4 Packaging 515 10 HIGH-FREQUENCY, HIGH-POWER AND NANOELECTRONIC DEVICES 521 10.1 Tunnel diodes 521 10.2 The IMPATT diode 525 10.3 The Gunn diode 528 10.1.1 degenerate Semiconductors 521 10.3.1 The Transferred-electron Mechanism 528 10.3.2 Formation and drift of Space Charge domains 531 10.4 The p-n-p-n diode 533 10.5 The Semiconductor-Controlled Rectifier 539 10.6 Insulated-Gate Bipolar Transistor 541 10.7 nanoelectronic devices 544 10.4.1 Basic Structure 533 10.4.2 The Two-Transistor Analogy 534 10.4.3 variation of a with Injection 535 10.4.4 Forward-Blocking State 536 10.4.5 Conducting State 537 10.4.6 Triggering Mechanisms 538 10.5.1 Turning off the SCR 540 10.7.1 Zero-dimensional Quantum dots 544 10.7.2 One-dimensional Quantum wires 546 10.7.3 Two-dimensional Layered Crystals 547 10.7.4 Spintronic Memory 548 10.7.5 nanoelectronic Resistive Memory 550 AppendIces I. definitions of Commonly Used Symbols 555 II. Physical Constants and Conversion Factors 559 III. Properties of Semiconductor Materials 560 Iv. derivation of the density of States in the Conduction v. derivation of Fermi—dirac Statistics 566 vI. dry and wet Thermal Oxide Thickness Grown on vII. Solid Solubilities of Impurities in Si 571 vIII. diffusivities of dopants in Si and SiO2 572 IX. Projected Range and Straggle as Function of Implant Answers to Selected Self Quiz Questions 576 Index 581 Band 561 Si (100) as a Function of Time and Temperature 569 energy in Si 574

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Book SynopsisChenming Calvin Hu holds the TSMC Distinguished Professor Chair of Microelectronics at University of California, Berkeley.  He is a member of the US Academy of Engineering and a foreign member of the Chinese Academy of Sciences. From 2001 to 2004, he was the Chief Technology Officer of TSMC. A Fellow of the Institute of Electrical and Electronic Engineers (IEEE), he has been honored with the Jack Morton Award in1997 for his research on transistor reliability, the Solid State Circuits Award in 2002 for co-developing the first international standard transistor model for circuit simulation, and the Jun-ichi Nishizawa Medal in 2009 for exceptional contributions to device physics and scaling. He has supervised over 60 Ph.D. student theses, published 800 technical articles, and received more than 100 US patents. His other honors include Sigma Xi Moni Ferst Award, R&D 100 Award, and UC Berkeley's highest award for teaching the Berkeley DistinguishedTable of Contents 1 Electrons and Holes in Semiconductors 1 1.1 Silicon Crystal Structure 1 1.2 Bond Model of Electrons and Holes 4 1.3 Energy Band Model 8 1.4 Semiconductors, Insulators, and Conductors 11 1.5 Electrons and Holes 12 1.6 Density of States 15 1.7 Thermal Equilibrium and the Fermi Function 16 1.8 Electron and Hole Concentrations 19 1.9 General Theory of n and p 25 1.10 Carrier Concentrations at Extremely High and Low Temperatures 28 1.11 Chapter Summary 29 PROBLEMS 30 REFERENCES 33 GENERAL REFERENCES 34 2 Motion and Recombination of Electrons and Holes 35 2.1 Thermal Motion 35 2.2 Drift 38 2.3 Diffusion Current 46 2.4 Relation Between the Energy Diagram and V, _ 47 2.5 Einstein Relationship Between D and μ 48 2.6 Electron—Hole Recombination 50 2.7 Thermal Generation 52 2.8 Quasi-Equilibrium and Quasi-Fermi Levels 52 2.9 Chapter Summary 54 PROBLEMS 56 REFERENCES 58 GENERAL REFERENCES 58 3 Device Fabrication Technology 59 3.1 Introduction to Device Fabrication 60 3.2 Oxidation of Silicon 61 3.3 Lithography 64 3.4 Pattern Transfer–Etching 68 3.5 Doping 70 3.6 Dopant Diffusion 73 3.7 Thin-Film Deposition 75 3.8 Interconnect–The Back-End Process 80 3.9 Testing, Assembly, and Qualification 82 3.10 Chapter Summary–A Device Fabrication Example 83 PROBLEMS 85 REFERENCES 87 GENERAL REFERENCES 88 4 PN and Metal—Semiconductor Junctions 89 Part I: PN Junction 89 4.1 Building Blocks of the PN Junction Theory 90 4.2 Depletion-Layer Model 94 4.3 Reverse-Biased PN Junction 97 4.4 Capacitance-Voltage Characteristics 98 4.5 Junction Breakdown 100 4.6 Carrier Injection Under Forward Bias–Quasi-Equilibrium Boundary Condition 105 4.7 Current Continuity Equation 107 4.8 Excess Carriers in Forward-Biased PN Junction 109 4.9 PN Diode IV Characteristics 112 4.10 Charge Storage 115 4.11 Small-Signal Model of the Diode 116 Part II: Application to Optoelectronic Devices 117 4.12 Solar Cells 117 4.13 Light-Emitting Diodes and Solid-State Lighting 124 4.14 Diode Lasers 128 4.15 Photodiodes 133 Part III: Metal—Semiconductor Junction 133 4.16 Schottky Barriers 133 4.17 Thermionic Emission Theory 137 4.18 Schottky Diodes 138 4.19 Applications of Schottky Diodes 140 4.20 Quantum Mechanical Tunneling 141 4.21 Ohmic Contacts 142 4.22 Chapter Summary 145 PROBLEMS 148 REFERENCES 156 GENERAL REFERENCES 156 5 MOS Capacitor 157 5.1 Flat-Band Condition and Flat-Band Voltage 158 5.2 Surface Accumulation 160 5.3 Surface Depletion 161 5.4 Threshold Condition and Threshold Voltage 162 5.5 Strong Inversion Beyond Threshold 164 5.6 MOS C—V Characteristics 168 5.7 Oxide Charge–A Modification to Vfb and Vt 172 5.8 Poly-Si Gate Depletion–Effective Increase in Tox 174 5.9 Inversion and Accumulation Charge-Layer Thicknesses –Quantum Mechanical Effect 176 5.10 CCD Imager and CMOS Imager 179 5.11 Chapter Summary 184 PROBLEMS 186 REFERENCES 193 GENERAL REFERENCES 193 6 MOS Transistor 195 6.1 Introduction to the MOSFET 195 6.2 Complementary MOS (CMOS) Technology 198 6.3 Surface Mobilities and High-Mobility FETs 200 6.4 MOSFET Vt, Body Effect, and Steep Retrograde Doping 207 6.5 QINV in MOSFET 209 6.6 Basic MOSFET IV Model 210 6.7 CMOS Inverter–A Circuit Example 214 6.8 Velocity Saturation 219 6.9 MOSFET IV Model with Velocity Saturation 220 6.10 Parasitic Source-Drain Resistance 225 6.11 Extraction of the Series Resistance and the Effective Channel Length 226 6.12 Velocity Overshoot and Source Velocity Limit 228 6.13 Output Conductance 229 6.14 High-Frequency Performance 230 6.15 MOSFET Noises 232 6.16 SRAM, DRAM, Nonvolatile (Flash) Memory Devices 238 6.17 Chapter Summary 245 PROBLEMS 247 REFERENCES 256 GENERAL REFERENCES 257 7 MOSFETs in ICs–Scaling, Leakage, and Other Topics 259 7.1 Technology Scaling–For Cost, Speed, and Power Consumption 259 7.2 Subthreshold Current–“Off” Is Not Totally “Off” 263 7.3 Vt Roll-Off–Short-Channel MOSFETs Leak More 266 7.4 Reducing Gate-Insulator Electrical Thickness and Tunneling Leakage 270 7.5 How to Reduce Wdep 272 7.6 Shallow Junction and Metal Source/Drain MOSFET 274 7.7 Trade-Off Between Ion and Ioff and Design for Manufacturing 276 7.8 Ultra-Thin-Body SOI and Multigate MOSFETs 277 7.9 Output Conductance 282 7.10 Device and Process Simulation 283 7.11 MOSFET Compact Model for Circuit Simulation 284 7.12 Chapter Summary 285 PROBLEMS 286 REFERENCES 288 GENERAL REFERENCES 289 8 Bipolar Transistor 291 8.1 Introduction to the BJT 291 8.2 Collector Current 293 8.3 Base Current 297 8.4 Current Gain 298 8.5 Base-Width Modulation by Collector Voltage 302 8.6 Ebers—Moll Model 304 8.7 Transit Time and Charge Storage 306 8.8 Small-Signal Model 310 8.9 Cutoff Frequency 312 8.10 Charge Control Model 314 8.11 Model for Large-Signal Circuit Simulation 316 8.12 Chapter Summary 318 PROBLEMS 319 REFERENCES 323 GENERAL REFERENCES 323 Appendix I Derivation of the Density of States 325 Appendix II Derivation of the Fermi—Dirac Distribution Function 329 Appendix III Self-Consistencies of Minority Carrier Assumptions 333 Answers to Selected Problems 337 Index 341

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Book SynopsisThe first years of the company that developed the microchip and created the model for a successful Silicon Valley start-up.In the first three and a half years of its existence, Fairchild Semiconductor developed, produced, and marketed the device that would become the fundamental building block of the digital world: the microchip. Founded in 1957 by eight former employees of the Schockley Semiconductor Laboratory, Fairchild created the model for a successful Silicon Valley start-up: intense activity with a common goal, close collaboration, and a quick path to the market (Fairchild's first device hit the market just ten months after the company's founding). Fairchild Semiconductor was one of the first companies financed by venture capital, and its success inspired the establishment of venture capital firms in the San Francisco Bay area. These firms would finance the explosive growth of Silicon Valley over the next several decades. This history of the early years of Fairchi

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Book SynopsisTable of Contents1. Introduction to Internet of Things (IoT) and Embedded Systems Part 1: Modelling 2. First Stage Modelling – Modelling Interaction between the System and the Environment 3. Finite State Machines 4. Modelling Physically Distributed Embedded Systems 5. Petri Nets for Modelling Concurrency and Shared Resources Part 2: Building Robust, Safe, and Correct Systems 6. Designing Systems that are Safe and Robust 7. Verification, Validation, and Evaluation 8. Testing Part 3: Hardware 9. Introduction and Overview 10. Processing Elements 11. Memories 12. Field Programmable Gate Arrays 13. Devices, Sensors, and Actuators 14. Energy 15. Hardware-Software Mapping Part 4: Software 16. Operating Systems 17. Scheduling 18. Semaphores 19. Optimization and Other Special Considerations Part 5: Communications 20. Introduction to Communications and Messages 21. Networks 22. The Internet 23. Low-level Communication Protocols 24. Cloud vs. Edge vs. Local Computing Part 6: The Internet of Things 25. Reference Models for the Internet of Things 26. IoT Issues

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Book SynopsisPresenting all the major stages in wafer manufacturing, from crystals to prime wafers. This book first outlines the physics, associated metrology, process modelling and quality requirements and the goes on to discuss wafer forming and wafer surface preparation techniques.Table of ContentsPreface xi Acknowledgement xiii Part I From Crystal to Prime Wafers 1 1 Wafers and Semiconductors 3 1.1 Introduction 3 1.2 Semiconductor Revolution 3 1.2.1 Classification of Materials 3 1.2.2 Semiconductor Revolution Today 5 1.2.3 SiliconWafers and Solar Cells 6 1.3 SiliconWafers Used in Device Manufacturing (IC and MEMS) 7 1.3.1 StandardWafer Diameters and Sizes 8 1.3.2 Crystalline Orientation of SiliconWafers 9 1.3.3 Moore’s Law 11 1.4 Surface Properties and Quality Measurements ofWafers 11 1.4.1 SurfaceWaviness: TTV, Bow, andWarp 11 1.4.2 Discussion onWarp 16 1.4.3 Automated Measurements of TTV,Warp, Bow, and Flatness 17 1.4.4 Wafer Flatness 17 1.4.5 Nanotopography or Nanotopology 21 1.4.6 Surface Roughness 22 1.5 Other Properties and Quality Requirements of SiliconWafers 27 1.5.1 Mechanical and Material Properties 27 1.5.2 Property of Silicon with Anisotropy 27 1.5.3 Gravity-induced Deflection ofWafers 30 1.5.4 Wafer Edge Properties 31 1.6 Economics ofWafer Manufacturing 32 1.6.1 Three Categories ofWafers 32 1.6.2 Cost of SiliconWafers 34 1.7 Summary 35 References 35 2 Wafer Manufacturing: Generalized Processes and Flow 39 2.1 Introduction 39 2.2 Wafer Manufacturing: Generalized Process Flow 39 2.3 Crystal Growth 41 2.3.1 Melt Growth 41 2.3.2 Vapor Growth 49 2.3.3 Epitaxial Growth 49 2.3.4 Casting Polycrystalline Crystal 51 2.3.5 Other Crystal Growth Methods 51 2.4 Wafer Forming 52 2.4.1 Cropping 52 2.4.2 Trimming 52 2.4.3 Orientation Identification 52 2.4.4 Slicing 52 2.4.5 Slicing Using the Inner-diameter (ID) Saw 53 2.4.6 Slicing Using a Wiresaw 54 2.4.7 Other Tools for Slicing 55 2.4.8 Edge Rounding 56 2.5 Wafer Polishing 56 2.5.1 Lapping 57 2.5.2 Grinding 57 2.5.3 Etching 58 2.5.4 Polishing 58 2.6 Wafer Preparation 58 2.6.1 Cleaning 58 2.6.2 Inspection 59 2.6.3 Packaging 59 2.7 Industrial Processes ofWafer Manufacturing 59 2.7.1 Crystal Growth 60 2.7.2 Wafer Forming 61 2.7.3 Wafer Lapping and Polishing 63 2.7.4 Wafer Preparation 66 2.8 Summary 67 References 68 3 Process Modeling and Manufacturing Processes 71 3.1 Introduction 71 3.2 Wafer Manufacturing and Brittle Materials 71 3.3 Ductile Machining Versus Brittle Machining 73 3.4 Abrasive Machining inWafer Manufacturing 74 3.4.1 Bonded Abrasive Machining (BAM) 75 3.4.2 Free Abrasive Machining (FAM) 75 3.5 Abrasive Materials 76 3.5.1 Classification of the Grain Size of Abrasive Materials 77 3.5.2 Hardness of Abrasive Materials 78 3.5.3 Commonly Used Abrasive Materials inWafer Manufacturing 81 3.6 Ductile Machining of Brittle Materials 82 3.6.1 Research on Ductile Machining and Challenges 83 3.6.2 Opportunity and Future Research 83 3.7 Process Modeling ofWafer Manufacturing Processes 84 3.7.1 Rolling-indenting and Scratching-indenting Process Models of FAM 84 3.7.2 Comparison Between Wiresawing and Lapping 87 3.7.3 Other Aspects of Engineering Modeling 88 3.8 Abrasive Slurry in FAM Processes 89 3.8.1 Composition of Abrasive Slurry 89 3.8.2 Comparison ofWater and Glycol as a Carrier Fluid for Slurry 90 3.8.3 Recycling of Abrasive Grits in Slurry 91 3.9 Summary 93 References 93 Part II Wafer Forming 97 4 Wafer Slicing Using a Modern Slurry Wiresaw and Other Saws 99 4.1 Introduction 99 4.2 The Modern Wiresaw Technology 100 4.2.1 Historical Perspectives of Saws UsingWire 100 4.2.2 The Rise of the PV Industry andWafer Slicing 102 4.3 The Three Categories of Saw forWafer Slicing 103 4.4 Inner-diameter (ID) Saw 103 4.5 The Modern Slurry Wiresaw 105 4.5.1 The Control and Program Console 106 4.5.2 The Wire Management Unit 106 4.5.3 Uni-directional Versus Bi-directional Wire Motion 110 4.5.4 The Slicing Compartment 113 4.5.5 Directions of Ingot Feeding 114 4.5.6 Consumables and Other Operations 116 4.6 Comparison Between the ID Saw and Wiresaw 116 4.7 Research Issues inWiresaw Manufacturing Processes 120 4.8 Summary 121 References 121 5 Modeling of the Wiresaw Manufacturing Process and Material Characteristics 127 5.1 Introduction 127 5.2 The Rolling-indenting Model 129 5.3 Vibration Modeling and Analysis 131 5.3.1 A Historical Perspective on the Vibration ofWire 132 5.3.2 Equation of Motion of a Moving Wire 133 5.3.3 Modal Analysis of an Undamped Moving Wire 134 5.3.4 Response for Point-wise Harmonic Excitation 134 5.3.5 Natural Frequency of Vibration and Stability 135 5.3.6 Numerical Solution Using Galerkin’s Method 138 5.3.7 Response of Multiple-point and Distributed Excitations 139 5.3.8 Frequency Response of Multiple Excitations 141 5.3.9 Vibration Responses of a Moving Wire with Damping 143 5.3.10 Discussions 144 5.4 Damping Factor of the Slurry Wiresaw Systems 145 5.5 Elasto-hydrodynamic Process Modeling 147 5.5.1 Approach of Modeling of EHD in the Wiresawing Process 148 5.5.2 Theoretical Modeling 149 5.5.3 Results of the EHD Analysis 150 5.5.4 Implications Related to Floating Machining and Rolling-indenting Modeling of Modern Slurry Wiresaws 152 5.5.5 Important Conclusions from EHD Modeling 155 5.6 Thermal Management 156 5.7 Wire, WireWeb, and Slurry Management 156 5.7.1 Real-time and On-line Monitoring of WireWear 157 5.7.2 Monitoring the Pitch of the WireWeb Spacing 160 5.7.3 Mixing Ratio of Slurry Consisting of Abrasive Grits and Carrier Fluid 162 5.8 Summary 162 References 163 6 Diamond-Impregnated Wire Saws and the Sawing Process 169 6.1 Introduction 169 6.2 Manufacturing Processes of Diamond-impregnated Wires 171 6.2.1 Resinoid Wires 172 6.2.2 Electroplated Wires 174 6.2.3 Machines and Operations of Diamond Wire Saws 175 6.3 Slicing Mechanism of a Diamond Wire Saw 177 6.4 Properties ofWafers Sliced by Diamond Wire Saws 180 6.4.1 Wafer Surface 180 6.4.2 Wafer Fracture Strength 181 6.4.3 Residual Stress and Stress Relaxation 182 6.4.4 PVWafer Efficiency 182 6.4.5 Cost ofWafering 182 6.5 Slicing Performance with Different Process Parameters 183 6.5.1 Effect of Wire Speed 183 6.5.2 Effect of Feed Rate 183 6.5.3 Effect of Grain Density 184 6.5.4 Effect of Wire Tension 184 6.6 Summary 184 References 185 Part III Wafer Surface Preparation and Management 189 7 Lapping 191 7.1 Introduction 191 7.2 Fundamentals of Lapping and FAM 192 7.3 Various Configurations and Types of Lapping Operation 195 7.3.1 Single-sided Lapping 200 7.3.2 Double-sided Lapping 201 7.3.3 Soft-pad Lapping 201 7.3.4 Further References 202 7.4 Lapping and Preliminary Planarization 202 7.4.1 Quality Driven Needs for Preliminary Planarization 202 7.4.2 Cost Driven Needs for Preliminary Planarization 203 7.5 Technical Challenges and Advances in Lapping 204 7.5.1 Technical Considerations 205 7.5.2 Advances in Lapping 206 7.6 Summary 206 References 207 8 Chemical Mechanical Polishing 209 8.1 Introduction 209 8.2 Chemical Mechanical Polishing (CMP) 210 8.2.1 Schematic Illustration of the CMP Process and System 210 8.2.2 Measurement and Evaluation of the SiliconWafer after Polishing 213 8.2.3 Specifications for Polished SiliconWafers 214 8.2.4 Types of CMP Processes 215 8.2.5 Challenges of CMP Technology 215 8.3 Polishing Pad Technology 215 8.3.1 Polishing Pad Conditioning 216 8.4 Polishing Slurry Technology 217 8.5 Edge Polishing 218 8.5.1 Fundamentals of Edge Polishing 218 8.5.2 Challenges of Edge Polishing 218 8.6 Summary 219 References 219 9 Grinding, Edge Grinding, Etching, and Surface Cleaning 223 9.1 Introduction 223 9.2 Wafer Grinding for Surface Processing 223 9.2.1 Wafer Grinding Methods 223 9.2.2 Grinding Wheel Technology 226 9.2.3 Types of Grinding Operations 227 9.2.4 Technical Challenges and Advances in Grinding 228 9.3 Edge Grinding 228 9.3.1 Fundamentals of Edge Grinding 229 9.3.2 Technical Challenges in Edge Grinding 231 9.4 Etching 231 9.4.1 Acid Etching 232 9.4.2 Caustic Etching 232 9.4.3 Preferential Etching 232 9.4.4 Technical Challenges and Advances in Etching 235 9.5 Surface Cleaning 236 9.5.1 Impurities on the Surface of a SiliconWafer 236 9.5.2 Various Cleaning Steps inWafer Process Flow 237 9.6 RCA Standard Clean 238 9.6.1 Introduction 238 9.6.2 RCA Cleaning Protocol 239 9.6.3 Techniques and Variations of the RCA Method 240 9.6.4 The Evolution of SiliconWafer Cleaning Technology 241 9.7 Summary 241 References 242 10 Wafer Metrology and Optical Techniques 247 10.1 Introduction 247 10.2 Evaluation and Inspection of theWafer Surface 247 10.2.1 Wafer Surface Specifications 247 10.3 Wafer Defects and Inspection 251 10.3.1 Defect Classification 251 10.3.2 Impact ofWafer Defects on Device Yield and Performance 253 10.3.3 Defect Inspection Techniques and Systems 254 10.4 Measurement of theWafer Surface Using Moiré Optical Metrology 256 10.4.1 Measurement of theWafer Surface Using Shadow Moiré with the Talbot Effect 257 10.4.2 Enhancing the Resolution of Shadow Moiré with “Phase Shifting” 262 10.4.3 WireWeb Management Using Optical Metrology Technology 273 10.5 Summary 274 References 274 11 Conclusion 279 11.1 (I) From Crystal to PrimeWafers 279 11.2 (II) Wafer Forming 280 11.3 (III) Wafer Surface Preparation and Management 281 11.4 Final Remarks 282 Index 283

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Book SynopsisOffers technical background and guidance to prepare any workplace for gas-leak catastrophes Determines when monitoring for catastrophic release is appropriate Breaks down gas monitoring equipment options Guides work safety professionals on the placement of monitoring equipment. Offers case studies for concrete analysis. .Table of Contents1. Introduction. 1.1 Purpose. 1.2 Scope. 1.3 Who Will Benefit from this Guideline? 2. Management. 2.1 Management Overview. 2.2 Why Do We Use Gas Detectors? 2.3 What Do We Want to Detect? 2.4 What Actions Do We Expect to Undertake in the Event of a Release? 2.5 How Much Should We Spend on Detection? 3. Determining Where Gas Detection May or May Not be Beneficial. 3.1 Assessing Where Gas Detection may be Beneficial. 3.2 Situations Where Other Technologies May be More Beneficial. 3.3 Situations Where Gas Detection Is Recommended by Consensus. or Mandated By Law. 3.4 Situations Where Toxic Gas Detection May be Beneficial. 3.5 Situations Where Combustible Detection May be Beneficial. 3.6 Example Applications of the Continuous Monitoring System. 3.7 References. 3.8 Glossary. 4. Sensor Technology. 4.1 Introduction. 4.2 Description of Gases and Vapors. 4.3 Available Sensors and How they Work. 4.4 Factors to Consider when Choosing a Sensor. 4.5 Sensor Performance Variables. 4.6 References. 4.7 Glossary. 5. Approaches to Detector Placement and Configuration. 5.1 General Guidance for Detector Placement and Configuration. 5.2 General Guidance for Toxic Gas Detection. 5.3 General Guidance for Flammable Detection. 5.4 Detector Placement for Source Monitoring. 5.5 Detector Placement for Volumetric Monitoring. 5.6 Detector Placement for Enclosure Monitoring. 5.7 Detector Placement for Path of Travel and Target Receptor Monitoring. 5.8 Detector Placement for Perimeter Monitoring. 5.9 Detector Set Points and Monitoring. 6. Overall System Management - Commissioning, Testing, and Maintenance. 6.1 Summary. 6.2 Training. 6.3 Documentation. 6.4 Maintenance. 6.5 Establish a Good Relationship with the Local Authority-Having Jurisdiction (AHJ. 6.6 Change Management.

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Book SynopsisDo you want to know how to design high efficiency RF and microwave solid state power amplifiers? Read this book to learn the main concepts that are fundamental for optimum amplifier design. Practical design techniques are set out, stating the pros and cons for each method presented in this text. In addition to novel theoretical discussion and workable guidelines, you will find helpful running examples and case studies that demonstrate the key issues involved in power amplifier (PA) design flow. Highlights include: Clarification of topics which are often misunderstood and misused, such as bias classes and PA nomenclatures. The consideration of both hybrid and monolithic microwave integrated circuits (MMICs). Discussions of switch-mode and current-mode PA design approaches and an explanation of the differences. Coverage of the linearity issue in PA design at circuit level, with advice on low distortion power stages. Analysis of Table of ContentsPreface. About the Authors. Acknowledgments. 1 Power Amplifier Fundamentals. 1.1 Introduction. 1.2 Definition of Power Amplifier Parameters. 1.3 Distortion Parameters. 1.4 Power Match Condition. 1.5 Class of Operation. 1.6 Overview of Semiconductors for PAs. 1.7 Devices for PA. 1.8 Appendix: Demonstration of Useful Relationships. 1.9 References. 2 Power Amplifier Design. 2.1 Introduction. 2.2 Design Flow. 2.3 Simplified Approaches. 2.4 The Tuned Load Amplifier. 2.5 Sample Design of a Tuned Load PA. 2.6 References. 3 Nonlinear Analysis for Power Amplifiers. 3.1 Introduction. 3.2 Linear vs. Nonlinear Circuits. 3.3 Time Domain Integration. 3.4 Example. 3.5 Solution by Series Expansion. 3.6 The Volterra Series. 3.7 The Fourier Series. 3.8 The Harmonic Balance. 3.9 Envelope Analysis. 3.10 Spectral Balance. 3.11 Large Signal Stability Issue. 3.12 References. 4 Load Pull. 4.1 Introduction. 4.2 Passive Source/Load Pull Measurement Systems. 4.3 Active Source/Load Pull Measurement Systems. 4.4 Measurement Test-sets. 4.5 Advanced Load Pull Measurements. 4.6 Source/Load Pull Characterization. 4.7 Determination of Optimum Load Condition. 4.8 Appendix: Construction of Simplified Load Pull Contours through Linear Simulations. 4.9 References. 5 High Efficiency PA Design Theory. 5.1 Introduction. 5.2 Power Balance in a PA. 5.3 Ideal Approaches. 5.4 High Frequency Harmonic Tuning Approaches. 5.5 High Frequency Third Harmonic Tuned (Class F). 5.6 High Frequency Second Harmonic Tuned. 5.7 High Frequency Second and Third Harmonic Tuned. 5.8 Design by Harmonic Tuning. 5.9 Final Remarks. 5.10 References. 6 Switched Amplifiers. 6.1 Introduction. 6.2 The Ideal Class E Amplifier. 6.3 Class E Behavioural Analysis. 6.4 Low Frequency Class E Amplifier Design. 6.5 Class E Amplifier Design with 50% Duty-cycle. 6.6 Examples of High Frequency Class E Amplifiers. 6.7 Class E vs. Harmonic Tuned. 6.8 Class E Final Remarks. 6.9 Appendix: Demonstration of Useful Relationships. 6.10 References. 7 High Frequency Class F Power Amplifiers. 7.1 Introduction. 7.2 Class F Description Based on Voltage Wave-shaping. 7.3 High Frequency Class F Amplifiers. 7.4 Bias Level Selection. 7.5 Class F Output Matching Network Design. 7.6 Class F Design Examples. 7.7 References. 8 High Frequency Harmonic Tuned Power Amplifiers. 8.1 Introduction. 8.2 Theory of Harmonic Tuned PA Design. 8.3 Input Device Nonlinear Phenomena: Theoretical Analysis. 8.4 Input Device Nonlinear Phenomena: Experimental Results. 8.5 Output Device Nonlinear Phenomena. 8.6 Design of a Second HT Power Amplifier. 8.7 Design of a Second and Third HT Power Amplifier. 8.8 Example of 2nd HT GaN PA. 8.9 Final Remarks. 8.10 References. 9 High Linearity in Efficient Power Amplifiers. 9.1 Introduction. 9.2 Systems Classification. 9.3 Linearity Issue. 9.4 Bias Point Influence on IMD. 9.5 Harmonic Loading Effects on IMD. 9.6 Appendix: Volterra Analysis Example. 9.7 References. 10 Power Combining. 10.1 Introduction. 10.2 Device Scaling Properties. 10.3 Power Budget. 10.4 Power Combiner Classification. 10.5 The T-junction Power Divider. 10.6 Wilkinson Combiner. 10.7 The Quadrature (90◦) Hybrid. 10.8 The 180◦ Hybrid (Ring Coupler or Rat-race). 10.9 Bus-bar Combiner. 10.10 Other Planar Combiners. 10.11 Corporate Combiners. 10.12 Resonating Planar Combiners. 10.13 Graceful Degradation. 10.14 Matching Properties of Combined PAs. 10.15 Unbalance Issue in Hybrid Combiners. 10.16 Appendix: Basic Properties of Three-port Networks. 10.17 References. 11 The Doherty Power Amplifier. 11.1 Introduction. 11.2 Doherty’s Idea. 11.3 The Classical Doherty Configuration. 11.4 The ‘AB-C’ Doherty Amplifier Analysis. 11.5 Power Splitter Sizing. 11.6 Evaluation of the Gain in a Doherty Amplifier. 11.7 Design Example. 11.8 Advanced Solutions. 11.9 References. Index.

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Book SynopsisElectrostatic discharge (ESD) continues to impact semiconductor manufacturing, semiconductor components and systems, as technologies scale from micro- to nano electronics. This book introduces the fundamentals of ESD, electrical overstress (EOS), electromagnetic interference (EMI), electromagnetic compatibility (EMC), and latchup, as well as provides a coherent overview of the semiconductor manufacturing environment and the final system assembly. It provides an illuminating look into the integration of ESD protection networks followed by examples in specific technologies, circuits, and chips. The text is unique in covering semiconductor chip manufacturing issues, ESD semiconductor chip design, and system problems confronted today as well as the future of ESD phenomena and nano-technology. Look inside for extensive coverage on: The fundamentals of electrostatics, triboelectric charging, and how they relate to present day manufacturing environments of micro-Trade Review"With 146 figures including colour blood films and haematology slides, the book provides a pleasant state-of-the-art introduc-tion to clinical haematology. There is a self-assess- ment section at the end." (Journal of Tropical Pediatrics, 1 April 2011) Table of ContentsAbout the Author xiii Preface xv Acknowledgments xvii 1 Fundamentals of Electrostatics 1 1.1 Introduction 1 1.2 Electrostatics 1 1.2.1 Thales of Miletus and Electrostatic Attraction 2 1.2.2 Electrostatics and the Triboelectric Series 3 1.2.3 Triboelectric Series and Gilbert 4 1.2.4 Triboelectric Series and Gray 4 1.2.5 Triboelectric Series and Dufay 4 1.2.6 Triboelectric Series and Franklin 5 1.2.7 Electrostatics – Symmer and the Human Body Model 5 1.2.8 Electrostatics – Coulomb and Cavendish 5 1.2.9 Electrostatics – Faraday and the Ice Pail Experiment 5 1.2.10 Electrostatics – Faraday and Maxwell 6 1.2.11 Electrostatics – Paschen 6 1.2.12 Electrostatics – Stoney and the “Electron” 6 1.3 Triboelectric Charging – How does it Happen? 7 1.4 Conductors, Semiconductors, and Insulators 8 1.5 Static Dissipative Materials 8 1.6 ESD and Materials 9 1.7 Electrification and Coulomb’s Law 9 1.7.1 Electrification by Friction 10 1.7.2 Electrification by Induction 10 1.7.3 Electrification by Conduction 10 1.8 Electromagnetism and Electrodynamics 11 1.9 Electrical Breakdown 11 1.9.1 Electrostatic Discharge and Breakdown 11 1.9.2 Breakdown and Paschen’s Law 12 1.9.3 Breakdown and Townsend 12 1.9.4 Breakdown and Toepler’s Law 13 1.9.5 Avalanche Breakdown 13 1.10 Electroquasistatics and Magnetoquasistatics 15 1.11 Electrodynamics and Maxwell’s Equations 16 1.12 Electrostatic Discharge (ESD) 16 1.13 Electromagnetic Compatibility (EMC) 16 1.14 Electromagnetic Interference (EMI) 16 1.15 Summary and Closing Comments 17 References 17 2 Fundamentals of Manufacturing and Electrostatics 21 2.1 Materials, Tooling, Human Factors, and Electrostatic Discharge 22 2.1.1 Materials and Human Induced Electric Fields 23 2.2 Manufacturing Environment and Tooling 23 2.3 Manufacturing Equipment and ESD Manufacturing Problems 23 2.4 Manufacturing Materials 24 2.5 Measurement and Test Equipment 24 2.5.1 Manufacturing Testing for Compliance 25 2.6 Grounding and Bonding Systems 27 2.7 Worksurfaces 27 2.8 Wrist Straps 28 2.9 Constant Monitors 28 2.10 Footwear 28 2.11 Floors 28 2.12 Personnel Grounding with Garments 29 2.12.1 Garments 29 2.13 Air Ionization 29 2.14 Seating 29 2.15 Carts 30 2.16 Packaging and Shipping 31 2.16.1 Shipping Tubes 31 2.16.2 Trays 32 2.17 ESD Identification 32 2.18 ESD Program Management – Twelve Steps to Building an ESD Strategy 32 2.19 ESD Program Auditing 33 2.20 ESD On-Chip Protection 33 2.21 Summary and Closing Comments 34 References 34 3 ESD, EOS, EMI, EMC and Latchup 39 3.1 ESD, EOS, EMI, EMC and Latchup 39 3.1.1 ESD 39 3.1.2 EOS 40 3.1.3 EMI 40 3.1.4 EMC 41 3.1.5 Latchup 41 3.2 ESD Models 41 3.2.1 Human Body Model (HBM) 41 3.2.2 Machine Model (MM) 43 3.2.3 Cassette Model 45 3.2.4 Charged Device Model (CDM) 46 3.2.5 Transmission Line Pulse (TLP) 46 3.2.6 Very Fast Transmission Line Pulse (VF-TLP) 50 3.3 Electrical Overstress (EOS) 50 3.3.1 EOS Sources – Lightning 51 3.3.2 EOS Sources – Electromagnetic Pulse (EMP) 52 3.3.3 EOS Sources – Machinery 52 3.3.4 EOS Sources – Power Distribution 52 3.3.5 EOS Sources – Switches, Relays and Coils 53 3.3.6 EOS Design Flow and Product Definition 53 3.3.7 EOS Sources – Design Issues 54 3.3.8 EOS Failure Mechanisms 55 3.4 EMI 57 3.5 EMC 57 3.6 Latchup 58 3.7 Summary and Closing Comments 59 References 59 4 System Level ESD 65 4.1 System Level Testing 65 4.1.1 System Level Testing Objectives 66 4.1.2 Distinction of System and Component Level Testing Failure Criteria 66 4.2 When Systems and Chips Interact 67 4.3 ESD and System Level Failures 68 4.3.1 ESD Current and System Level Failures 68 4.3.2 ESD Induced E- and H-Fields and System Level Failures 69 4.4 Electronic Systems 70 4.4.1 Cards and Boards 70 4.4.2 System Chassis and Shielding 71 4.5 System Level Problems Today 71 4.5.1 Hand Held Systems 71 4.5.2 Cell Phones 71 4.5.3 Servers and Cables 72 4.5.4 Laptops and Cables 74 4.5.5 Disk Drives 74 4.5.6 Digital Cameras 75 4.6 Automobiles, ESD, EOS, and EMI 77 4.6.1 Automobiles and ESD – Ignition Systems 77 4.6.2 Automobiles and EMI – Electronic Pedal Assemblies 77 4.6.3 Automobiles and Gas Tank Fires 78 4.6.4 Hybrids and Electric Cars 78 4.6.5 Automobiles in the Future 79 4.7 Aerospace Applications 80 4.7.1 Airplanes, Partial Discharge, and Lightning 80 4.7.2 Satellites, Spacecraft Charging, and Single Event Upset (SEU) 81 4.7.3 Space Landing Missions 81 4.8 ESD and System Level Test Models 83 4.9 IEC 61000-4-2 83 4.10 Human Metal Model (HMM) 83 4.11 Charged Board Model (CBM) 86 4.12 Cable Discharge Event (CDE) 87 4.12.1 Cable Discharge Event (CDE) and Scaling 89 4.12.2 Cable Discharge Event (CDE) – Cable Measurement Equipment 89 4.12.3 Cable Configuration – Test Configuration 92 4.12.4 Cable Configuration – Floating Cable 92 4.12.5 Cable Configuration – Held Cable 92 4.12.6 Cable Discharge Event (CDE) – Peak Current vs. Charged Voltage 92 4.12.7 Cable Discharge Event (CDE) – Plateau Current vs Charged Voltage 92 4.13 Summary and Closing Comments 93 References 93 5 Component Level Issues – Problems and Solutions 97 5.1 ESD Chip Protection – The Problem and the Cure 97 5.2 ESD Chip Level Design Solutions – Basics of Design Synthesis 98 5.2.1 ESD Circuits 101 5.2.2 ESD Signal Pin Protection Networks 101 5.2.3 ESD Power Clamp Protection Networks 103 5.2.4 ESD Power Domain-to-Domain Circuitry 103 5.2.5 ESD Internal Signal Line Domain-to-Domain Protection Circuitry 104 5.3 ESD Chip Floor Planning – Basics of Design Layout and Synthesis 105 5.3.1 Placement of ESD Signal Pin HBM Circuitry 106 5.3.2 Placement of ESD Signal Pin CDM Circuitry 107 5.3.3 Placement of ESD Power Clamp Circuitry 107 5.3.4 Placement of ESD VSS-to-VSS Circuitry 109 5.4 ESD Analog Circuit Design 109 5.4.1 Symmetry and Common Centroid Design for ESD Analog Circuits 110 5.4.2 Analog Signal Pin to Power Rail ESD Network 111 5.4.3 Common Centroid Analog Signal Pin to Power Rail ESD Network 111 5.4.4 Co-synthesis of Common Centroid Analog Circuit and ESD Networks 112 5.4.5 Signal Pin-to-Signal Pin Differential Pair ESD Network 113 5.4.6 Common Centroid Signal Pin Differential Pair ESD Protection 113 5.5 ESD Radio Frequency (RF) Design 115 5.5.1 ESD Radio Frequency (RF) Design Practices 115 5.5.2 ESD RF Circuits – Signal Pin ESD Networks 121 5.5.3 ESD RF Circuits – ESD Power Clamps 123 5.5.4 ESD RF Circuits – ESD RF VSS-to-VSS Networks 126 5.6 Summary and Closing Comments 127 References 127 6 ESD in Systems – Problems and Solutions 129 6.1 ESD System Solutions from Largest to Smallest 129 6.2 Aerospace Solutions 129 6.3 Oil Tanker Solutions 130 6.4 Automobile Solutions 130 6.5 Computers – Servers 131 6.5.1 Servers – Touch Pads and Handling Procedures 131 6.6 Mother Boards and Cards 131 6.6.1 System Card Insertion Contacts 131 6.6.2 System Level Board Design – Ground Design 131 6.7 System Level “On Board” ESD Protection 133 6.7.1 Spark Gaps 134 6.7.2 Field Emission Devices (FED) 136 6.8 System Level Transient Solutions 140 6.8.1 Transient Voltage Suppression (TVS) Devices 141 6.8.2 Polymer Voltage Suppression (PVS) Devices 143 6.9 Package-Level Mechanical ESD Solutions – Mechanical “Crowbars” 144 6.10 Disk Drive ESD Solutions 145 6.10.1 In Line “ESD Shunt” 145 6.10.2 Armature – Mechanical “Shunt” – A Built-In Electrical “Crowbar” 145 6.11 Semiconductor Chip Level Solutions – Floor Planning, Layout, and Architecture 147 6.11.1 Mixed Signal Analog and Digital Floor Planning 147 6.11.2 Bipolar-CMOS-DMOS (BCD) Floor Planning 148 6.11.3 System-on Chip Design Floor Planning 148 6.12 Semiconductor Chip Solutions – Electrical Power Grid Design 149 6.12.1 HMM and IEC Specification Power Grid and Interconnect Design Considerations 150 6.12.2 ESD Power Clamp Design Synthesis – IEC 61000-4-2 Responsive ESD Power Clamps 151 6.13 ESD and EMC – When Chips Bring Down Systems 152 6.14 System Level and Component Level ESD Testing and System Level Response 152 6.14.1 Time Domain Reflection (TDR) and Impedance Methodology for ESD Testing 152 6.14.2 Time Domain Reflectometry (TDR) ESD Test System Evaluation 154 6.14.3 ESD Degradation System Level Method – Eye Tests 158 6.15 EMC and ESD Scanning 160 6.16 Summary and Closing Comments 163 References 164 7 Electrostatic Discharge (ESD) in the Future 167 7.1 What is in the Future for ESD? 167 7.2 Factories and Manufacturing 167 7.3 Photo-Masks and Reticles 168 7.3.1 ESD Concerns in Photo-Masks 169 7.3.2 Avalanche Breakdown in Photo-Masks 170 7.3.3 Electrical Model in Photo-Masks 171 7.3.4 Failure Defects in Photo-Masks 172 7.4 Magnetic Recording Technology 174 7.5 Micro-Electromechanical (MEM) Devices 176 7.5.1 ESD Concerns in Micro-Electromechanical (MEM) Devices 177 7.6 Micro-Motors 178 7.6.1 ESD Concerns in Micro-Motors 178 7.7 Micro-Electromechanical (MEM) RF Switches 180 7.7.1 ESD Concerns in Micro-Electromechanical (MEM) RF Switches 180 7.8 Micro-Electromechanical (MEM) Mirrors 182 7.8.1 ESD Concerns in Micro-Electromechanical (MEM) Mirrors 182 7.9 Transistors 183 7.9.1 Transistors – Bulk vs. SOI Technology 184 7.9.2 Transistors and FinFETs 185 7.9.3 ESD in FinFETs 185 7.10 Silicon Nanowires 187 7.11 Carbon Nanotubes 187 7.12 Future Systems and System Designs 188 7.13 Summary and Closing Comments 189 References 190 Glossary 195 ESD Standards 199 Index 203

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Book SynopsisThis book presents new design techniques that permit an engineer to design devices with predictable results, and in doing so utilize very complex shapes instead of being limited to simple shapes. Includes coverage of the material properties of the devices.Table of ContentsLinear Transformations. Elements of the Linear Transformations. Singular Fins and Spines and Single Elements. Algorithms for Finned Array Assembly. Examples of Finned Array Analysis. Reciprocity and Node Analysis. A General Array Method. Convective Optimizations. Heat Transfer-Parallel Plate Heat Sinks. References. Appendices. Indexes.

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Book SynopsisChanneling or controlling the heat generated by electronics products is a vital concern of product developers: fail to confront this issue and the chances of product failure escalate. This third book in the series explores yet another method of heat management-the use of liquids to absorb and remove heat away from vital parts of the electronic systems.Table of ContentsFundamentals of Heat Transfer and Fluid Flow. Natural Convection. Channel Flows. Jet Impingement Cooling. Heat Transfer Enhancement. Appendices. References. Indexes.

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Book SynopsisSmart materials--materials and structures that can impart information about their environment to an observer or monitoring device--are revolutionizing fields as diverse as engineering, optics, and medical technology. Advances in smart materials are impacting disciplines across the scientific and technological landscape.Trade Review"The contents of this encyclopedia will not fail to meet expectations of readers.... I strongly recommend this encyclopedia to researchers..." (Pharmaceutical Research, Vol. 19, No. 12, December 2002) "...written throughout at a high intellectual level and covering an impressive range of themes..." (Intermetallics, No.11, 2003) "...the actual content of the work is prodigious?a rich collection of detail knowledge and general information..." (Journal of Materials Technology, March 2003) "...a key reference, providing a broad and accessible description of a complex and growing interdisciplinary field?recommended..." (Choice, Vol. 40, No. 8, April 2003) "...an interesting compendium of smart materials...the wide use of polymers, which is of interest to our readers, is discussed throughout...useful..." (Polymer News)Table of ContentsBiomedical Sensing. Abstract. 1. Introduction. 2. Medical, Therapeutic, and Diagnostic Applications of Biosensors. 3. Polymers as Electrode Coatings and Biosensor Mediators. 4. Immobilization Techniques and Materials. 5. Smart Polymers for Immobilization and Bioconjugate Materials. 6. Biosensor Operation. 7. Glucose Sensors. 8. Other Analytes for Biological Sensing. 9. Modes of Response in Smart Polymers. 10. Molecular Imprinting. 11. Possibilities for Future Development. Bibliography. Figures. Tables.

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Book SynopsisFrom crystal growth to integrated devices and circuits, this new book offers a basic, up-to-date introduction to semiconductor fabrication technology, including both the theoretical and practical aspects of all major steps in the fabrication sequence.Table of ContentsChapter 1. Introduction. Chapter 2. Crystal Growth. Chapter 3. Silicon Oxidation. Chapter 4. Photolithography. Chapter 5. Etching. Chapter 6. Diffusion. Chapter 7. Ion Implantation. Chapter 8. Film Deposition. Chapter 9. Process Integration. Chapter 10. IC Manufacturing. Chapter 11. Future Trends and Challenges. Appendix A: List of Symbols. Appendix B: International System of Units (SI Units). Appendix C: Unit Prefixes. Appendix D: Greek Alphabet. Appendix E: Physical Constants. Appendix F: Properties of Si and GaAs at 300 K. Appendix G: Some Properties of the Error Function. Appendix H: Basic Kinetic Theory of Gases. Appendix I: SUPREM Commands. Appendix J: Running PROLITH. Appendix K. Percentage Points of the t Distribution. Appendix L: Percentage Points of the F Distribution. Index.

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Book SynopsisA comprehensive and state-of-the-art coverage of the design and fabrication of IGBT. All-in-one resource Explains the fundamentals of MOS and bipolar physics. Covers IGBT operation, device and process design, power modules, and new IGBT structures. Table of ContentsPreface. Power Device Evolution and the Advert of IGBT. IGBT Fundamentals and Status Review. MOS Components of IGBT. Bipolar Components of IGBT. Physics and Modeling of IGBT. Latch-Up of Parasitic Thyristor in IGBT. Design Considerations of IGBT Unit Cell. IGBT Process Design and Fabrication Technology. Power IGBT Modules. Novel IGBT Design Concepts, Structural Innovations, and Emerging Technologies. IGBT Circuit Applications. Index.

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Book SynopsisJames Livingston has written a highly readable undergraduate text introducing the physics and chemistry underlying the electronic properties of engineering solids. The first half of the text uses a semi-classical approach, while the second half introduces quantum mechanics and applies quantum chemistry and quantum physics to the basic properties of metals, insulators, and semiconductors.Table of ContentsSEMI-CLASSICAL APPROACH. Conductors and Resistors. Windows, Doors, and Transparent Electrodes (Optical Properties of Conductors). Insulators and Capacitors. Lenses and Optical Fibers (Optical Properties of Insulators). Inductors, Electromagnets, and Permanent Magnets. Superconductors and Superconducting Magnets. Elasticity, Springs, and Sonic Waves. QUANTUM MECHANICAL APPROACH. Light Particles, Electron Waves, and Quantum Wells, and Springs. The Periodic Table, Atomic Spectra, and Neon Lights. The Game Is Bonds, Interatomic Bonds. From Bonds to Bands (and Why Grass Is Green). Free Electron Waves in Metals. Nearly-Free Electrons--Bands, Gaps, Holes, and Zones. Metals and Insulators. Semiconductors. LEDs, Photodetectors, Solar Cells, and Transistors. Suggestions for Further Reading. Index.

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Book SynopsisThis book brings together the most useful and important data on chemicals and gases used in the manufacture of semiconductor devices. It offers an A-to-Z listing of physical properties and safety information for more than 270 chemicals and gases used in the manufacture of semiconductor chips.Table of ContentsThin Film Deposition Materials. Wafer Cleaning Chemicals. Photolithography Materials. Wet and Dry Etching Materials. Chemical Mechanical Planarizing Materials. Carrier Gases. Uncategorized Materials. Semiconductor Chemicals Analysis. Index.

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