Electronics: circuits and components Books

Book SynopsisKalman filtering is a well-established topic in the field of control and signal processing and represents by far the most refined method for the design of neural networks. This book takes a nontraditional nonlinear approach and reflects the fact that most practical applications are nonlinear.Trade Review"Although the traditional approach to the subject is usually linear, this book recognizes and deals with the fact that real problems are most often nonlinear." (SciTech Book News, Vol. 25, No. 4, December 2001)Table of ContentsPreface. Contributors. Kalman Filters (S. Haykin). Parameter-Based Kalman Filter Training: Theory and Implementaion (G. Puskorius and L. Feldkamp). Learning Shape and Motion from Image Sequences (G. Patel, et al.). Chaotic Dynamics (G. Patel and S. Haykin). Dual Extended Kalman Filter Methods (E. Wan and A. Nelson). Learning Nonlinear Dynamical System Using the Expectation-Maximization Algorithm (S. Roweis and Z. Ghahramani). The Unscencted Kalman Filter (E. Wan and R. van der Merwe). Index.

Read more less

Book SynopsisThis new edition of the popular guide to telecommunications circuit design offers the same comprehensive coverage found in the first edition, but now features additional sections on mobile and wireless phones and pagers, compact antennas, switches, power amplifiers, and TDMA and CDMA modulation schemes.Trade Review"...useful as a reference for beginning students...and for self-study..." (IEEE Circuits & Devices Magazine, May 2003)Table of ContentsPreface. Chapter One. The Hstory of Telecommunications. Chapter Two. Amplitude Modulated Radio Transmitter. Chapter Three. The Amplitude-Modulated Radio Receiver. Chapter Four. Frequency Modulated Radio Transmitter. Chapter Five. The Frequency Modulated Radio Receiver. Chapter Six. The Television Transmitter. Chapter Seven. The Television Receiver. Chapter Eight. The Telephone Network. Chapter Nine. Signal Processing in the Telephone System. Chapter Ten. The Facsimile Machine. Chapter Eleven. Personal Wireless Communication System. Chapter Twelve. Telecommunication Transmission Media. Appendix A. The Transformer. Appendix B. Designation of Frequencies. Appendix C. The Electromagnetic Spectrum. Appendix D. The Modified Huffman Data Compression Code. Appendix E. Electronic Memory. Appendix F. Binary Coded Decimal to Seven-Segment Decoder. Index.

Read more less

Book SynopsisA practical, comprehensive survey of SOI CMOS devices and circuits for microelectronics engineers The microelectronics industry is becoming increasingly dependent on SOI CMOS VLSI devices and circuits. This book is the first to address this important topic with a practical focus on devices and circuits.Table of ContentsPreface. Acknowlegments. Introduction. SOI CMOS Devices--Part I. SOI CMOS Devices--Part II. Fundamentals of SOI CMOS Circuits. SOI CMOS Digital Circuits. SOI CMOS Analog Circuits. PD SOI-Technology SPICE Models. Index.

Read more less

Book Synopsis* Builds on the success of the first Razavi book, covering the most recent developments in phase-locked loop technology* Will include an introductory "tutorial" chapter composed by the editor which will outline and explain in brief the recent advances in PLL design. .Table of ContentsPreface. About the Author. Part I: Original Contributions. Devices and Circuits for Phase-Locked Systems. Delay-Locked Loops - An Overview. Delta-Sigma Fractional-N Phase-Locked Loops. Design Bang-Bang PLLs for Clock and Data Recovery in Serial Data Transmission Systems. Predicting the Phase Noise and Jitter of PLL-Based Frequency Synthesizers. Part II: Devices. Physics-Based Closed-Form Inductance Expression for Compact Modeling of Integrated Spiral Inductors. The Modeling, Characterization, and Design of Monolithic Inductors for Silicon RF IC's. Analysis, Design, and Optimization of Spiral Inductors and Transformers for Si RF IC's. Stacked Inductors and Transformers in CMOS Technology. Estimation Methods for Quality Factors of Inductors Fabricated in Silicon Integrated Circuit Process Technologies. A Q-Factor Enhancement Technique for MMIC Inductors. On-Chip Spiral Inductors with Patterned Ground Shields for Si-Based RF IC's. The Effects of a Ground Shield on the Characteristics and Performance of Spiral Inductors. Temperature Dependence of Q and Inductance in Spiral Inductors Fabricated in a Silicon-Germanium/BiCMOS Technology. Substrate Noise Coupling Through Planar Spiral Inductor. Design of High-Q Varactors for Low-Power Wireless Applications Using a Standard CMOS Process. On the Use of MOS Varactors in RF VCO's. Part III: Phase Noise and Jitter. Low-Noise Voltage-Controlled Oscillators Using Enhanced LC-Tanks. A Study of Phase Noise in CMOS Oscillators. A General Theory of Phase Noise in Electrical Oscillators. Physical Processes of Phase Noise in Differential LC Oscillators. Phase Noise in LC Oscillators. The Effect of Varactor Nonlinearity on the Phase Noise of Completely Integrated VCOs. Jitter in Ring Oscillators. Jitter and Phase Noise in Ring Oscillators. A Study of Oscillator Jitter Due to Supply and Substrate Noise. Measurements and Analysis of PLL Jitter Caused by Digital Switching Noise. On-Chip Measurement of the Jitter Transfer Function of Charge-Pump Phase-Locked Loops. Part IV: Building Blocks. A Low-Noise, Low-Power VCO with Automatic Amplitude Control for Wireless Applications. A Fully Integrated VCO at 2 GHz. Tail Current Noise Suppression in RF CMOS VCOs. Low-Power Low-Phase-Noise Differentially Tuned Quadrature VCO Design in Standard CMOS. Analysis and Design of an Optimally Coupled 5-GHz Quadrature LC Oscillator. A 1.57-GHz Fully Integrated Very Low-Phase-Noise Quadrature VCO. A Low-Phase-Noise 5GHz Quadrature CMOS VCO Using Common-Mode Inductive Coupling. An Integrated 10/5GHz Injection-Locked Quadrature LC VCO in a 0.18[mu]m Digital CMOS Process. Rotary Traveling-Wave Oscillator Arrays: A New Clock Technology. 35-GHz Static and 48-GHz Dynamic Frequency Divider IC's Using 0.2-[mu]m AlGaAs/GaAs-HEMT's. Superharmonic Injection-Locked Frequency Dividers. A Family of Low-Power Truly Modular Programmable Dividers in Standard 0.35-[mu]m CMOS Technology. A 1.75-GHz/3-V Dual-Modulus Divide-by-128/129 Prescaler in 0.7-[mu]m CMOS. A 1.2 GHz CMOS Dual-Modulus Prescaler Using New Dynamic D-Type Flip-Flops. High-Speed Architecture for a Programmable Frequency Divider and a Dual-Modulus Prescaler. A 1.6-GHz Dual Modulus Prescaler Using the Extended True-Single-Phase-Clock CMOS Circuit Technique (E-TSPC). A Simple Precharged CMOS Phase Frequency Detector. Part V: Clock Generation by PLLs and DLLs. A 320 MHz, 1.5 mW @ 1.35 V CMOS PLL for Microprocessor Clock Generation. A Low Jitter 0.3-165 MHz CMOS PLL Frequency Synthesizer for 3 V/5 V Operation. Low-Jitter Process-Independent DLL and PLL Based on Self-Biased Techniques. A Low-Jitter PLL Clock Generator for Microprocessors with Lock Range of 340-612 MHz. A 960-Mb/s/pin Interface for Skew-Tolerant Bus Using Low Jitter PLL. Active GHz Clock Network Using Distributed PLLs. A Low-Noise Fast-Lock Phase-Locked Loop with Adaptive Bandwidth Control. A Low-Jitter 125-1250-MHz Process-Independent and Ripple-Poleless 0.18-[mu]m CMOS PLL Based on a Sample-Reset Loop Filter. A Dual-Loop Delay-Locked Loop Using Multiple Voltage-Controlled Delay Lines. An All-Analog Multiphase Delay-Locked Loop Using a Replica Delay Line for Wide-Range Operation and Low-Jitter Performance. A Semidigital Dual Delay-Locked Loop. A Wide-Range Delay-Locked Loop with a Fixed Latency of One Clock Cycle. A Portable Digital DLL for High-Speed CMOS Interface Circuits. CMOS DLL-Base 2-V 3.2-ps Jitter 1-GHz Clock Synthesizer and Temperature-Compensated Tunable Oscillator. A 1.5V 86 mW/ch 8-Channel 622-3125-Mb/s/ch CMOS SerDes Macrocell with Selectable Mux/Demux Ratio. A Register-Controlled Symmetrical DLL for Double-Data-Rate DRAM. A Low-Jitter Wide-Range Skew-Calibrated Dual-Loop DLL Using Antifuse Circuitry for High-Speed DRAM. Part VI: RF Synthesis. An Adaptive PLL Tuning System Architecture Combining High Spectral Purity and Fast Settling Time. A 2-V 900-MHz Monolithic CMOS Dual-Loop Frequency Synthesizer for GSM Receivers. A CMOS Frequency Synthesizer with an Injection-Locked Frequency Divider for a 5-GHz Wireless LAN Receiver. A 2.6-GHz/5.2-GHz Frequency Synthesizer in 0.4-[mu]m CMOS Technology. Fast Switching Frequency Synthesizer with a Discriminator-Aided Phase Detector. Low-Power Dividerless Frequency Synthesis Using Aperture Phase Detection. A Stabilization Technique for Phase-Locked Frequency Synthesizers. A Modeling Approach for [Sigma]-[Delta] Fractional-N Frequency Synthesizers Allowing Straightforward Noise Analysis. A Fully Integrated CMOS Frequency Synthesizer with Charge-Averaging Charge Pump and Dual-Path Loop Filter for PCS- and Cellular-CDMA Wireless Systems. A 1.1-GHz CMOS Fraction-N Frequency Synthesizer With a 3-b Third-Order [Sigma]-[Delta] Modulator. A 1.8-GHz Self-Calibrated Phase-Locked Loop with Precise I/Q Matching. A 27-mW CMOS Fractional-N Synthesizer Using Digital Compensation for 2.5-Mb/s GFSK Modulation. A CMOS Monolothic [Sigma][Delta]-Controlled Fractional-N Frequency Synthesizer for DSC-1800. Part VII: Clock and Data Recovery. A 2.5-Gb/s Clock and Data Recovery IC with Tunable Jitter Characteristics for Use in LAN's and WAN's. Clock/Data Recovery PLL Using Half-Frequency Clock. A 0.5-[mu]m CMOS 4.0-Gbit/s Serial Link Transceiver with Data Recovery Using Oversampling. A 2-1600-MHz CMOS Clock Recovery PLL with Low-Vdd Capability. SiGe Clock and Data Recovery IC with Linear-Type PLL for 10-Gb/s SONET Application. A Fully Integrated SiGe Receiver IC for 10-Gb/s Data Rate. A 10-Gb/s CMOS Clock and Data Recovery Circuit with a Half-Rate Linear Phase Detector. A 10-Gb/s CMOS Clock and Data Recovery Circuit with Frequency Detection. A 10-Gb/s CDR/DEMUX with LC Delay Line VCO in 0.18[mu]m CMOS. A 40-Gb/s Integrated Clock and Data Recovery Circuit in a 50-GHz f[subscript T] Silicon Bipolar Technology. A Fully Integrated 40-Gb/s Clock and Data Recovery IC With 1:4 DEMUX in SiGe Technology. Clock and Data Recovery IC for 40-Gb/s Fiber-Optic Receiver. Index.

Read more less

Book Synopsis* Examines the various methods available for circuit protection, including coverage of the newly developed ESD circuit protection schemes for VLSI circuits. * Provides guidance on the implementation of circuit protection measures. * Includes new sections on ESD design rules, layout approaches, package effects, and circuit concepts. * Reviews the new Charged Device Model (CDM) test method and evaluates design requirements necessary for circuit protection.Table of ContentsPreface 1. Introduction Background The ESD Problem Protecting against ESD Outline of the Book 2. ESD Phenomenon Introduction Electrostatic Voltage Discharge ESD Stress Models 3. Test Methods Introduction Human Body Model (HBM) Machine Model (MM) Charged Device Model (CDM) Socket Device Model (SDM) Metrology, Calibration, Verification Transmission Line Pulsing (TLP) Failure Criteria Summary 4 Physics and Operation of ESD Protection Circuits Introduction Resistors Diodes Transistor Operation Transistor Operation Under ESD Conditions Electrothermal Effects SCR Operation Conclusion 5 ESD Protection Design Concepts and Strategy The Qualities of Good ESD Protection ESD Protection Design Methods Selecting an ESD Strategy Summary 6 Design and Layout Requirements Introduction Thick Field Device NMOS Transistors (FPDs) Gate-Coupled NMOS (GCNMOS) Gate Driven nMOS (GDNMOS) SCR Protection Device ESD Protection Design Synthesis Total Input Protection ESD Protection Using Diode-Based Devices Power Supply Clamps BiPolar and BiCMOS Protection Circuits Summary 7 Advanced Protection Design Introduction PNP Driven NMOS (PDNMOS) Substrate Triggered NMOS (STNMOS) NMOS Triggered NMOS (NTNMOS) ESD for Mixed Voltage I/O CDM Protection SOI Technology High Voltage Transistors BiCMOS Protection RF Designs General I/O Protection Schemes Design/layout Errors Summary 8 Failure Modes, Reliability Issues, and Case Studies Introduction Failure Mode Analysis Reliability and Performance Considerations Advanced CMOS Input Protection Optimizing the Input Protection Scheme Designs for Special Applications Process Effects on Input Protection Design Total IC Chip Protection Power Bus Protection Internal Chip ESD Damage Stress Dependent ESD Behavior Failure Mode Case Studies Summary 9 Influence of Processing on ESD Introduction High Current Behavior Cross-section of a MOS Transistor Drain-Source Implant Effects P-Well Effects N-Well Effects Epitaxial Layers and Substrates Gate Oxides Silicides Contacts Interconnect and Metallization Gate Length Dependencies Silicon-On-Insulator (SOI) Bipolar Transistors Diodes Resistors Reliability Trade-Offs Summary 10 Device Modeling of High Current Effects Introduction The Physics of ESD Damage Thermal ("Second") Breakdown Analytical Models Using the Heat Equation Electrothermal Device Simulations Conclusions Circuit Simulation Basics, Approaches, and Simulations Introduction Modeling the MOSFET Modeling Bipolar Junction Transistors Modeling Diffusion Resistors Modeling Protection Diodes Simulation of Protection Circuits Electrothermal Circuit Simulations Conclusion 12 Conclusions Long-term Relevance of ESD in ICs State-of-the-art for ESD Protection Current Limitations Future Issues

Read more less

Book SynopsisFocusing on the development of industry standards, this work is an exposition of display systems and applications that cover display timings, interfaces, specifications, measurement procedures and various forms of display control and identification.Trade Review"…much can be learned from this book about the details of modern display interfaces." (Color Research and Applications, February 2005) "...The book should feature on the shelf of every technical support or product marketing team that's seriously involved with display technology..." (Display Monitor, 28 October 2002)Table of ContentsSeries Editor's Foreword. Preface. Basic Concepts in Display Systems. The Human Visual System. Fundamentals of Color. Display Technologies and Applications. Practical and Performance Requirements of the Display Interface. Basics of Analog and Digital Display Interfaces. Format and Timing Standards. Standards for Analog Video - Part I: Television. Standards for Analog Video - Part II: The Personal Computer. Digital Display Interface Standards. Additional Interfaces to the Display. The Impact of Digital Television and HDTV. New Displays, New Applications, and New Interfaces. Glossary. Bibliography, References, and Recommended Further Reading. Index.

Read more less

Book SynopsisFocuses on the basic operating principles and the techniques used to incorporate the devices into circuit applications. Part one reviews fundamental principles in transmission lines and circuits as well as semiconductor physics. Two-terminal solid-state devices, circuits and applications are covered in the second section. Part three discusses three-terminal solid-state devices, circuits and applications. Introduces noise figures and system parameters for receiver design. Includes numerous examples and problems.Table of ContentsTransmission Lines and Waveguides. S Parameters and Circuit Representations. Review of Semiconductor Physics. Varactor Devices and Circuits. Detector and Mixed Devices and Circuits. Receiver Noise Figure and Dynamic Range. p-i-n Diodes and Control Devices. Oscillator and Amplifier Circuits Using Two-Terminal Devices. Transferred Electron Devices and Circuits. IMPATT Devices and Circuits. Field-Effect Transistors. Bipolar Transistors, HEMTs, and HBTs. Transistor Amplifiers. Transistor Oscillators. Transistor Mixers, Switches, Phase Shifters, and Multipliers. Appendices.

Read more less

Book SynopsisThis advanced text studies the special interactions that occur between circuits and devices, which lead to an understanding of the design and performance characteristics of solid-state microwave amplifiers and oscillators.Table of ContentsMICROWAVE CIRCUITS. Review of Transmission Lines, Waveguides, and Smith ChartAnalysis. Linear Microwave Network Parameters. Waveguide and Transmission Line Parameters. Transmission Lines as Resonators and Circuit Elements. Microwave Networks and Components. MICROWAVE SOLID-STATE DEVICES. Solid-State Theory: Special Topics. Schottky Barrier Diodes. Microwave Transistors. IMPATT Diodes. Gunn Diodes. DEVICE-CIRCUIT INTERACTION. Transistor Amplifier Properties. Two-Terminal Negative-Resistance Amplifiers. Oscillators. Noise. Appendix. Index.

Read more less

Book SynopsisTimely, authoritative, application-oriented. an in-depthexploration of current and future uses of FPGAs in digital systemsThe development of field-programmable gate arrays (FPGAs) may wellbe the most important breakthrough for the microelectronicsindustry since the invention of the microprocessor. Using FPGAs, asystem designer working on a PC can now develop a working prototypein a few hours and change it at will in just a few minutes, ratherthan waiting weeks or months for a printed-circuit assembly or acustom integrated circuit to be built. This newfound ability tochange a system by simply altering its configuration memory is alsoleading to exciting new forms of computing, such as arrayapplications that exploit parallelism. Now in a book that functionsequally well as a working professional reference and apedagogically consistent computer engineering text, John V.Oldfield and Richard C. Dorf: * Provide a detailed overview of FPGAs in digital systemsdesign * Explain the underlyTable of ContentsSystem Implementation Strategies. Review of Logic Design and Electrical Aspects. Introduction to FPGA Architecture. Design Process Flows and Software Tools. Case Studies. Computational Applications. Business Development. Recent Developments. Afterword. Glossary. Index.

Read more less

Book SynopsisApplications oriented, it contains all the pertinent and comprehensive information necessary to meet the growing demands placed upon solid-state power conversion equipment. These demands include improved reliability, increased efficiency, higher packing density, improved performance plus meeting safety and EMC regulations. Features a thorough assessment of basic electrical and magnetic aspects of power conversion as well as thermal, protection, radiation and reliability considerations. Stresses semiconductor and magnetic components and gives an analysis of diverse topologies.Table of ContentsTransient Analysis, Circuit Analysis, and Waveforms. Semiconductors, Resistors, and Capacitors. Transformers, Inductors, and Conductors. Rectifiers and Filters. Phase Control Circuits. Transistor Inverters. Thyristor Inverters. Switching Regulators. dc-dc Converters. Resonant Mode Converters. Modulator and Control Analysis. Pulse-Forming Networks and Modulators. Protection and Safety. Electromagnetic Compatibility and Grounding. Semiconductor and Equipment Cooling. Reliability and Quality. Regulated Power Supplies. Uninterruptible Power Systems. Power Factor Correction. Glossary. Index.

Read more less

Book SynopsisDevices enormously smaller than before will remodel engineering,chemistry, medicine, and computer technology. How can we understandmachines that are so small? Nanosystems covers it all: powerand strength, friction and wear, thermal noise and quantumuncertainty. This is the book for starting the next century ofengineering. - Marvin Minsky MIT Science magazine calls Eric Drexler Mr. Nanotechnology.For years, Drexler has stirred controversy by declaring thatmolecular nanotechnology will bring a sweeping technologicalrevolution - delivering tremendous advances in miniaturization,materials, computers, and manufacturing of all kinds. Now, he''swritten a detailed, top-to-bottom analysis of molecular machinery -how to design it, how to analyze it, and how to build it.Nanosystems is the first scientifically detailed description ofdevelopments that will revolutionize most of the industrialprocesses and products currently in use. This groundbreaking work draws on physics and cheTable of ContentsPHYSICAL PRINCIPLES. Classical Magnitudes and Scaling Laws. Potential Energy Surfaces. Molecular Dynamics. Positional Uncertainty. Transitions, Errors, and Damage. Energy Dissipation. Mechanosynthesis. COMPONENTS AND SYSTEMS. Nanoscale Structural Components. Mobile Interfaces and Moving Parts. Intermediate Subsystems. Nanomechanical Computational Systems. Molecular Sorting, Processing, and Assembly. Molecular Manufacturing Systems. IMPLEMENTATION STRATEGIES. Macromolecular Engineering. Paths to Molecular Manufacturing. Appendices. Afterword. Symbols, Units, and Constants. Glossary. References. Index.

Read more less

Book SynopsisCircuit designers, packaging engineers, printed board fabricators, and procurement personnel will find this book''s microelectronic package design-for-reliability guidelines and approaches essential for achieving their life-cycle, cost-effectiveness, and on-time delivery goals. Its uniquely organized, time-phased approach to design, development, qualification, manufacture, and in-service management shows you step-by-step how to: * Define realistic system requirements in terms of mission profile, operating life, performance expectations, size, weight, and cost * Define the system usage environment so that all operating, shipping, and storage conditions, including electrical, thermal, radiation, and mechanical loads, are assessed using realistic data * Identify potential failure modes, sites, mechanisms, and architecture-stress interactions--PLUS appropriate measures you can take to reduce, eliminate, or accommodate expected failures * CharacterizTable of ContentsDesign for Reliability Concepts. Starting the Design Process. Substrates. Wire and Wirebonds. Tape Automated Bonding. Flip-Chip Bonding. Attachment. Case. Leads. Lead Seals. Lid Seal and Lid. Index.

Read more less

Book SynopsisThe first book to combine all of the various topics relevant to low--cost automation. Practical approach covers methods immediately applicable to industrial problems, showing how to select the most appropriate control method for a given application, then design the necessary circuit.Table of ContentsMotion Actuators. Sensors. Introduction to Switching Theory. Industrial Switching Elements. Electric Ladder Diagrams. Sequential Systems with Random Inputs. Pneumatic Control Circuits. Miscellaneous Switching Elements and Systems. Semiflexible Automation: Hardware Programmers. Flexible Automation: Programmable Controllers. Flexible Automation: Microcomputers. Introduction to Assembly Automation. Robotics and Numerical Control. Appendices. Index.

Read more less

Book SynopsisThis complete, well--integrated text offers students without extensive background in the field a solid understanding of the principles and applications of analog and digital instrumentation.Table of ContentsPART I: ANALOG INSTRUMENTATION. Review of Electronic Devices. Operational Amplifiers and Instrumentation Amplifiers. Systems Theory. PART II: ORIGINS OF BIOLOGICAL SIGNALS. The Origin of Biopotentials. Human Biopotentials. Signals and Noise in Biological Systems. PART III: BIOLOGICAL TRANSDUCERS. Biopotential Electrodes. Ion Sensitive and Amperometric Electrodes. Mechanical Transducers. Temperature Transducers. Light Sources and Detectors. Flow Transducers. Analog Linearization Techniques. PART IV: DIGITAL INSTRUMENTATION. Review of Digital Electronic Devices. Talking to Computers. Interfacing Computers to the Outside World. Digital Signal Processing. Safety Considerations in Bioinstrumentation.

Read more less

Book SynopsisThis invaluable resource tells the complete story of failure mechanisms from basic concepts to the tools necessary to conduct reliability tests and analyze the results. Both a text and a reference work for this important area of semiconductor technology, it assumes no reliability education or experience.Table of ContentsPreface. 1 INTRODUCTION (Alvin W. Strong). 1.1 Book Philosophy. 1.2 Lifetime and Acceleration Concepts. 1.3 Mechanism Types. 1.4 Reliability Statistics. 1.5 Chi-Square and Student t Distributions. 1.6 Application. 2 DIELECTRIC CHARACTERIZATION AND RELIABILITY METHODOLOGY (Ernest Y. Wu, Rolf-Peter Vollertsen, and Jordi Sune). 2.1 Introduction. 2.2 Fundamentals of Insulator Physics and Characterization. 2.3 Measurement of Dielectric Reliability. 2.4 Fundamentals of Dielectric Breakdown Statistics. 2.5 Summary and Future Trends. 3 DIELECTRIC BREAKDOWN OF GATE OXIDES: PHYSICS AND EXPERIMENTS (Ernest Y. Wu, Rolf-Peter Vollertsen, and Jordi Sune). 3.1 Introduction. 3.2 Physics of Degradation and Breakdown. 3.3 Physical Models for Oxide Degradation and Breakdown. 3.4 Experimental Results of Oxide Breakdown. 3.5 Post-Breakdown Phenomena. 4 NEGATIVE BIAS TEMPERATURE INSTABILITIES IN pMOSFET DEVICES (Giuseppe LaRosa). 4.1 Introduction. 4.2 Considerations on NBTI Stress Configurations. 4.3 Appropriate NBTI Stress Bias Dependence. 4.4 Nature of the NBTI Damage. 4.5 Impact of the NBTI Damage to Key pMOSFET Transistor Parameters. 4.6 Physical Mechanisms Contributing to the NBTI Damage. 4.7 Key Experimental Observations on the NBTI Damage. 4.8 Nit Generation by Reaction–Diffusion (R–D) Processes. 4.9 Hole Trapping Modeling. 4.10 NBTI Dependence on CMOS Processes. 4.11 NBTI Dependence on Area Scaling. 4.12 Overview of Key NBTI Features. 5 HOT CARRIERS (Stewart E. Rauch, III). 5.1 Introduction. 5.2 Hot Carriers: Physical Generation and Injection Mechanisms. 5.3 Hot Carrier Damage Mechanisms. 5.4 HC Impact to MOSFET Characteristics. 5.5 Hot Carrier Shift Models. 6 STRESS-INDUCED VOIDING (Timothy D. Sullivan). 6.1 Introduction. 6.2 Theory and Model. 6.3 Role of the Overlying Dielectric. 6.4 Summary of Voiding in Al Metallizations 6.5 Stress Voiding in Cu Interconnects. 6.6 Concluding Remarks. 7 ELECTROMIGRATION (Timothy D. Sullivan). 7.1 Introduction. 7.2 Metallization Failure. 7.3 Electromigration. 7.4 General Approach to Electromigration Reliability. 7.5 Thermal Considerations for Electromigration. 7.6 Closing Remarks. Index.

Read more less

Book SynopsisA new and innovative paradigm for RF frequency synthesis and wireless transmitter design Learn the techniques for designing and implementing an all-digital RF frequency synthesizer. In contrast to traditional RF techniques, this innovative book sets forth digitally intensive design techniques that lead the way to the development of low-cost, low-power, and highly integrated circuits for RF functions in deep submicron CMOS processes. Furthermore, the authors demonstrate how the architecture enables readers to integrate an RF front-end with the digital back-end onto a single silicon die using standard ASIC design flow. Taking a bottom-up approach that progressively builds skills and knowledge, the book begins with an introduction to basic concepts of frequency synthesis and then guides the reader through an all-digital RF frequency synthesizer design: Chapter 2 presents a digitally controlled oscillator (DCO), which is the foundation of a novel architectureTable of ContentsPREFACE xiii 1 INTRODUCTION 1 1.1 Frequency Synthesis 1 1.1.1 Noise in Oscillators 2 1.1.2 Frequency Synthesis Techniques 5 1.2 Frequency Synthesizer as an Integral Part of an RF Transceiver 9 1.2.1 Transmitter 10 1.2.2 Receiver 11 1.2.3 Toward Direct Transmitter Modulation 12 1.3 Frequency Synthesizers for Mobile Communications 16 1.3.1 Integer-N PLL Architecture 17 1.3.2 Fractional-N PLL Architecture 18 1.3.3 Toward an All-Digital PLL Approach 23 1.4 Implementation of an RF Synthesizer 25 1.4.1 CMOS vs. Traditional RF Process Technologies 25 1.4.2 Deep-Submicron CMOS 25 1.4.3 Digitally Intensive Approach 26 1.4.4 System Integration 27 1.4.5 System Integration Challenges for Deep-Submicron CMOS 29 2 DIGITALLY CONTROLLED OSCILLATOR 30 2.1 Varactor in a Deep-Submicron CMOS Process 31 2.2 Fully Digital Control of Oscillating Frequency 33 2.3 LC Tank 35 2.4 Oscillator Core 37 2.5 Open-Loop Narrowband Digital-to-Frequency Conversion 39 2.6 Example Implementation 45 2.7 Time-Domain Mathematical Model of a DCO 47 2.8 Summary 51 3 NORMALIZED DCO 52 3.1 Oscillator Transfer Function and Gain 52 3.2 DCO Gain Estimation 53 3.3 DCO Gain Normalization 54 3.4 Principle of Synchronously Optimal DCO Tuning Word Retiming 55 3.5 Time Dithering of DCO Tuning Input 56 3.5.1 Oscillator Tune Time Dithering Principle 56 3.5.2 Direct Time Dithering of Tuning Input 57 3.5.3 Update Clock Dithering Scheme 59 3.6 Implementation of PVT and Acquisition DCO Bits 60 3.7 Implementation of Tracking DCO Bits 64 3.7.1 High-Speed Dithering of Fractional Varactors 64 3.7.2 Dynamic Element Matching of Varactors 70 3.7.3 DCO Varactor Rearrangement 71 3.8 Time-Domain Model 73 3.9 Summary 74 4 ALL-DIGITAL PHASE-LOCKED LOOP 76 4.1 Phase-Domain Operation 77 4.2 Reference Clock Retiming 79 4.3 Phase Detection 81 4.3.1 Difference Mode of ADPLL Operation 85 4.3.2 Integer-Domain Operation 86 4.4 Modulo Arithmetic of the Reference and Variable Phases 86 4.4.1 Variable-Phase Accumulator (PV Block) 89 4.5 Time-to-Digital Converter 91 4.5.1 Frequency Reference Edge Estimation 93 4.6 Fractional Error Estimator 94 4.6.1 Fractional-Division Ratio Compensation 96 4.6.2 TDC Resolution Effect on Estimated Frequency Resolution 97 4.6.3 Active Removal of Fractional Spurs Through TDC (Optional) 98 4.7 Frequency Reference Retiming by a DCO Clock 100 4.7.1 Sense Amplifier–Based Flip-Flop 102 4.7.2 General Idea of Clock Retiming 103 4.7.3 Implementation 104 4.7.4 Time-Deferred Calculation of the Variable Phase (Optional) 107 4.8 Loop Gain Factor 109 4.8.1 Phase-Error Dynamic Range 111 4.9 Phase-Domain ADPLL Architecture 112 4.9.1 Close-in Spurs Due to Injection Pulling 114 4.10 PLL Frequency Response 115 4.10.1 Conversion Between the s- and z-Domains 119 4.11 Noise and Error Sources 119 4.11.1 TDC Resolution Effect on Phase Noise 120 4.11.2 Phase Noise Due to DCO SD Dithering 122 4.12 Type II ADPLL 127 4.12.1 PLL Frequency Response of a Type II Loop 130 4.13 Higher-Order ADPLL 133 4.13.1 PLL Stability Analysis 136 4.14 Nonlinear Differential Term of an ADPLL 139 4.14.1 Quality Monitoring of an RF Clock 140 4.15 DCO Gain Estimation Using a PLL 141 4.16 Gear Shifting of PLL Gain 142 4.16.1 Autonomous Gear-Shifting Mechanism 143 4.16.2 Extended Gear-Shifting Scheme with Zero-Phase Restart 148 4.17 Edge Skipping Dithering Scheme (Optional) 154 4.18 Summary 155 5 APPLICATION: ADPLL-BASED TRANSMITTER 156 5.1 Direct Frequency Modulation of a DCO 157 5.1.1 Discrete-Time Frequency Modulation 158 5.1.2 Hybrid of Predictive/Closed PLL Operation 158 5.1.3 Effect of FREF/CKR Clock Misalignment 163 5.2 Just-in-Time DCO Gain Calculation 164 5.3 GFSK Pulse Shaping of Transmitter Data 167 5.3.1 Interpolative Filter Operation 172 5.4 Power Amplifier 175 5.5 Digital Amplitude Modulation 177 5.5.1 Discrete Pulse-Slimming Control 180 5.5.2 Regulation of Transmitting Power 181 5.5.3 Tuning Word Adjustment 182 5.5.4 Fully Digital Amplitude Control 183 5.6 Going Forward: Polar Transmitter 183 5.6.1 Generic Modulator 186 5.6.2 Polar TX Realization 187 5.7 Summary 188 6 BEHAVIORAL MODELING AND SIMULATION 189 6.1 Simulation Methodology 190 6.2 Digital Blocks 191 6.3 Support of Digital Stream Processing 192 6.4 Random Number Generator 192 6.5 Time-Domain Modeling of DCO Phase Noise 192 6.5.1 Modeling Oscillator Jitter 192 6.5.2 Modeling Oscillator Wander 194 6.5.3 Modeling Oscillator Flicker (1/f ) Noise 195 6.5.4 Clock Edge Divider Effects 200 6.5.5 VHDL Model Realization of a DCO 201 6.5.6 Support of Physical KDCO 202 6.6 Modeling Metastability in Flip-Flops 203 6.7 Simulation Results 206 6.7.1 Time-Domain Simulations 206 6.7.2 Frequency-Deviation Simulations 207 6.7.3 Phase-Domain Simulations of Transmitters 209 6.7.4 Synthesizer Phase-Noise Simulations 209 6.8 Summary 212 7 IMPLEMENTATION AND EXPERIMENTAL RESULTS 213 7.1 DSP and Its RF Interface to DRP 213 7.2 Transmitter Core Implementation 214 7.3 IC Chip 216 7.4 Evaluation Board 218 7.5 Measurement Equipment 218 7.6 GFSK Transmitter Performance 219 7.7 Synthesizer Performance 221 7.8 Synthesizer Switching Transients 224 7.9 DSP-Driven Modulation 225 7.10 Performance Summary 226 7.11 Summary 227 APPENDIX A: SPURS DUE TO DCO SWITCHING 228 A.1 Spurs Due to DCO Modulation 229 APPENDIX B: GAUSSIAN PULSE-SHAPING FILTER 232 APPENDIX C: VHDL SOURCE CODE 237 C.1 DCO Level 2 237 C.2 Period-Controlled Oscillator 239 C.3 Tactical Flip-Flop 241 C.4 TDC Pseudo-Thermometer Output Decoder 243 REFERENCES 247 INDEX 253

Read more less

Book SynopsisFrom the electronic nose and the intelligent ear to the modern ink jet nozzle, the applications of smart devices incorporating microsensors are increasing rapidly. Microsensors are miniature devices that convert a non--electrical quantity into an electrical signal. By integrating a microsensor with a microprocessor, a smart sensor is produced.Table of ContentsIntroduction Electronic Materials and Processing MEMS Materials and their Preparation Standard Microelectronic Technologies Silicon Micromachining:Bulk Silicon Micromachining: Surface Microstereolithography for MEMS Microsensors Introduction to SAW Devices Surface Acoustic Waves in Solids IDT Microsensor Parameter Measurement IDT Microsensor Fabrication IDT Microsensors MEMS-IDT Microsensors Smart Sensors and MEMS Appendices Index

Read more less

Book SynopsisMicrowave devices, circuits and subsystems are used in modern microwave communication systems. These include fixed and mobile microwave communications services as well as terrestrial cellular applications. Volume 1 in this two-volume series provides an up-to-date and comprehensive reference to these communications.Trade Review"…this book is a good reference for [the] microwave engineering community." (IEEE Circuits & Devices Magazine, November/December 2006)Table of ContentsList of contributors. Preface. 1. Overview of the Book (I.A. Glover, S.R. Pennock and P.R. Shepherd). 1.1 Introduction. 1.2 RF Devices. 1.3 Signal Transmission and Network Methods. 1.4 Amplifiers. 1.5 Mixers. 1.6 Filters. 1.7 Oscillators and Frequency Synthesisers. 2. RF Devices: Characteristics and Modelling (A. Suarez and T. Fernandez). 2.1 Introduction 2.2 Semiconductor Properties 2.3 P-N Junction. 2.4 The Schottky Diode. 2.5 PIN Diodes. 2.6 Step-Recovery Diodes. 2.7 Gunn Diodes. 2.8 IMPATT Diodes. 2.9 Transistors. References. 3. Signal Transmission, Network Methods and Impedance Matching (N.J. McEwan, T.C. Edwards, D. Dernikas and I.A. Glover). 3.1 Introduction. 3.2 Transmission Lines: General Considerations. 3.3 The Two-Conductor Transmission Line: Revision of Distributed Circuit Theory. 3.4 Loss, Dispersion, Phase and Group Velocity. 3.5 Field Theory Method for Ideal TEM Case. 3.6 Microstrip. 3.7 Coupled Microstrip Lines. 3.8 Network Methods. 3.9 Impedance Matching. 3.10 Network Analysers. 3.11 Summary. References. 4. Amplifier Design (N.J. McEwan and D. Dernikas). 4.1 Introduction. 4.2 Amplifier Gain Definitions. 4.3 Stability. 4.4. Broadband Amplifier Design. 4.5 Low Noise Amplifier Design. 4.6 Practical Circuit Considerations. 4.7 Computer-Aided Design (CAD). References. 5. Mixers: Theory and Design (A. Tazon and L. de la Fuente). 5.1 Introduction. 5.2 General Properties. 5.3 Devices for Mixers. 5.4 Non-Linear Analysis. 5.5 Diode Mixer Theory. 5.6 FET Mixers. 5.7 IF Amplifier. 5.8 Single-Balanced FET Mixers. 5.9 Double-Balanced FET Mixers. 5.10 Harmonic Mixers. 5.11 Monolithic Mixers. References. 6. Filters (A Mediavilla). 6.1 Introduction. 6.2 Filter Fundamentals. 6.3 Mathematical Filter Responses. 6.4 Low Pass Prototype Filter Design. 6.5 Filter Impedance and Frequency Scaling. 6.6 Elliptic Filter Transformation. 6.7 Filter Normalisation. 7. Oscillators, Frequency Synthesisers and PLL Techniques (E. Artal, J.P. Pascal and J. Portilla). 7.1 Introduction. 7.2 Solid State Microwave Oscillators. 7.3 Negative Resistance Diode Oscillators. 7.4 Transistor Oscillators. 7.5 Voltage-Controlled Oscillators. 7.6 Oscillator Characterisation and Testing, 7.7 Microwave Phase Locked Oscillators. 7.8 Subsystems for Microwave Phase Locked Oscillators (PLOs). 7.9 Phase Noise. 7.10 Examples of PLOs. References. Index.

Read more less

Book SynopsisThe VHDL Reference: The essential guide for students and professionals working in computer hardware design and synthesis. The definitive guide to VHDL, this book combines a comprehensive reference of the VHDL syntax with tutorial and workshop materials that guide the reader through the principles of digital hardware design.Trade Review"...combines a comprehensive reference of the VHDL syntax with tutorial and workshop materials that guide readers through the principles f digital hardware design." (SciTech Book News, Vol. 26, No. 2, June 2002)Table of ContentsVHDL TUTORIAL. VHDL: Overview and Application Field. VHDL Language and Syntax. Synthesis. Simulation. Project Management. VHDL-AMS TUTORIAL. VHDL-AMS. VHDL WORKSHOP. VHDL Working Environment. Exercises. REFERENCE. Design Entities and Configurations. Subprograms and Packages. Types. Declarations. Specification. Names. Expressions. Sequential Statements. Concurrent Statements. Miscellaneous. Elaboration and Simulation. Lexical Elements. Predefined Attributes. Package STANDARD. Package TEXTIO. BNF. Literature. Index.

Read more less

Book SynopsisProvides the reader with memory fundamentals as well as directions for future research. Examines memory history, current memory technology and offers a glimpse at the future of memories.Table of ContentsThe Strategic Nature of Semiconductor Memories. The Basics of Memories: Market, Technology and Product. Trends in Memory Applications. Memory Device and Process Technology. Basic Memory Architecture and Cell Structure. Dynamic Random Access Memory Trends--4k to 256Mb. Application-Specific DRAMs. Trends in Static RAMs. Future, Fast and Application-Specific SRAMs. MOS ROMs, PROMs and EPLDs. Field Alterable ROMs I: EPROM, OTP, and Flash Memories. Field Alterable ROMs 2: EEPROM, EAROM, NV-RAM. Packaging--Single, Module and Wafer Scale Integration. Memory Electrical and Reliability Testing. Yield, Cost and the Modern Factory. Memory Trends in the Future. Index.

Read more less

Book SynopsisBroadband networks based on the ATM standard are gaining global popularity for their flexibility in providing integrated transmission of sound, image and data signals. Research into ATM networks is spreading quickly from academic prototyping, to commercial applications by manufacturers and service providers.Table of ContentsBroadband Integrated Services Digital Network. Interconnection Networks. Rearrangeable Networks. Non-Blocking Networks. ATM Switch Model. ATM Switching with Minimum-Depth Blocking Networks. ATM Switching with Non-Blocking Single-Queueing Networks. ATM Switching with Non-Blocking Multiple-Queueing Networks. ATM Switching with Arbitrary-Depth Blocking Networks. Appendix. Index.

Read more less

Book SynopsisReuse in Electronic Design From Information Modelling to Intellectual Properties Peter Conradi Berlin, Germany Reuse of existing IC intellectual property blocks is currently the hot topic in electronic design automation. By cutting development time and improving designer productivity, reuse offers a faster time to market and consequently increased profitability. Conradi encompasses the fundamentals of physical system modelling, design methodologies and basic design architectures plus reuse strategies and tasks. Features include: * Graph-oriented visualisations enabling the reader to understand the requirements of future interdisciplinary design tools * Guidance on information modelling languages, system classification and decomposition of systems under development * Section on reuse strategies and tasks examining the practical aspects of the technique for both analogue and digital design * Data management and retrieval methods including the algebra of the selection procTable of ContentsPhysical System Modelling Basics. Design Methodologies and Basic Design Architectures. Reuse Strategies and Tasks. Conclusion. Appendices. Definitions. References. Index.

Read more less

Book SynopsisFeaturing an extensive 40 page tutorial introduction, this carefully compiled anthology of 65 of the most important papers on phase-locked loops and clock recovery circuits brings you comprehensive coverage of the field-all in one self-contained volume. You''ll gain an understanding of the analysis, design, simulation, and implementation of phase-locked loops and clock recovery circuits in CMOS and bipolar technologies along with valuable insights into the issues and trade-offs associated with phase locked systems for high speed, low power, and low noise.Table of ContentsPreface. Design of Monolithic Phase-Locked Loops and Clock Recovery Circuits—A Tutorial (B. Razavi). BASIC THEORY. Theory of AFC Synchronization (W. Gruen). Color-Carrier Reference Phase Synchronization Accuracy in NTSC Color Television (D. Richman). Charge-Pump Phase-Locked Loops (F. Gardner). z-Domain Model for Discrete-Time PLLs (J. Hein & J. Scott). Analyze PLLs with Discrete Time Modeling (J. Kovacs). Properties of Frequency Difference Detectors (F. Gardner). Frequency Detectors for PLL Acquisition in Timing and Carrier Recovery (D. Messerschmitt). Analysis of Phase-Locked Timing Extraction Circuits for Pulse Code Transmission (E. Roza). Optimization of Phase-Locked Loop Performance in Data Recovery Systems (R. Co & J. Mulligan). Noise Properties of PLL Systems (V. Kroupa). PLL/DLL System Noise Analysis for Low Jitter Clock Synthesizer Design (B. Kim, et al.). Practical Approach Augurs PLL Noise in RF Synthesizers (M. O'Leary). The Effects of Noise in Oscillators (E. Hafner). A Simple Model of Feedback Oscillator Noise Spectrum (D. Leeson). Noise in Relaxation Oscillators (A. Abidi & R. Meyer). Analysis of Timing Jitter in CMOS Ring Oscillators (T. Weigandt, et al.). Analysis, Modeling, and Simulation of Phase Noise in Monolithic Voltage-Controlled Oscillators (B. Razavi). BUILDING BLOCKS. Start-up and Frequency Stability in High-Frequency Oscillators (N. Nguyen & R. Meyer). MOS Oscillators with Multi-Decade Tuning Range and Gigahertz Maximum Speed (M. Banu). A Bipolar 1 GHz Multi-Decade Monolithic Variable-Frequency Oscillator (J. Wu). A Digital Phase and Frequency Sensitive Detector (J. Brown). A 3-State Phase Detector Can Improve Your Next PLL Design (C. Sharpe). GaAs Monolithic Phase/Frequency Discriminator (I. Shahriary, et al.). A New Phase-Locked Loop Timing Recovery Method for Digital Regenerators (J. Bellisio). A Phase-Locked Loop with Digital Frequency Comparator for Timing Signal Recovery (J. Afonso, et al.). Clock Recovery from Random Binary Signals (J. Alexander). A Si Bipolar Phase and Frequency Detector IC for Clock Extraction up to 8 Gb/s (A. Pottbacker, et al.). A Self-Correcting Clock Recovery Circuit (C. Hogge). MODELING AND SIMULATION. An Integrated PLL Clock Generator for 275 MHz Graphic Displays (G. Gutierrez & D. DeSimone). The Macro Modeling of Phase-Locked Loopes for the SPICE Simulator (M. Sitkowski). Modeling and Simulation of an Analog Charge Pump Phase-Locked Loop (S. Can & Y. Sahinkaya). Mixed-Mode Simulation of Phase-Locked Loops (B. Antao, et al.). Behavioral Representation for VCO and Detectors in Phase-Lock Systems (E. Liu & A. Sangiovanni-Vincentelli). Behavioral Simulation Techniques for Phase/Delay-Locked Systems (A. Demir, et al.). PHASE-LOCKED LOOPS. A Monolithic Phase-Locked Loop with Detection Processor (E. Murthi). A 200-MHz CMOS Phase-Locked Loop with Dual Phase Detectors (K. Ware, et al.). High-Frequency Phase-Locked Loops in Monolithic Bipolar Technology (M. Soyuer & R. Meyer). A 6-GHz Integrated Phase-Locked Loop Using AlGaAs/GaAs Heterojunction Bipolar Transistors (A. Buchwald, et al.). A 6-GHz 60-mW BiCMOS Phase-Locked Loop with 2-V Supply (B. Razavi & J. Sung). Design of PLL-Based Clock Generation Circuits (D. Jeong). A Variable Delay Line PLL for CPU-Coprocessor Synchronization (M. Johnson & E. Hudson). A PLL Clock Generator with 5 to 110 MHz of Lock Range for Microprocessors (I. Young, et al.). A Wide-Bandwidth Low-Voltage PLL for PowerPC Microprocessors (J. Alvarez, et al.). A 30-128 MHz Frequency Synthesizer Standard Cell (R. Bitting & W. Repasky). Cell-Based Fully Integrated CMOS Frequency Synthesizers (D. Mijuskovic, et al.). Fully-Integrated CMOS Phase-Locked Loop with 15 to 240 MHz Locking Range and ±50 psec Jitter (I. Novof, et al.). PLL Design for a 500 MB/s Interface (M. Horowitz, et al.). CLOCK AND DATA RECOVERY CIRCUITS. An Analog PLL-Based Clock and Data Recovery Circuit with High Input Jitter Tolerance (S. Sun). A 30-MHz Hybrid Analog/Digital Clock Recovery Circuit in 2-μm CMOS (B. Kim, et al.). A BiCMOS PLL-Based Data Separator Circuit with High Stability and Accuracy (S. Miyazawa, et al.). A Versatile Clock Recovery Architecture and Monlithic Implementation (L. De Vito). A 155-MHz Clock Recovery Delay- and Phase-Locked Loop (T. Lee & J. Bulzacchelli). A Monolithic 156 Mb/s Clock and Data Recovery PLL Circuit using the Sample- and-Hold Technique (N. Ishihara & Y. Akazawa). A Monolithic 480 Mb/s Parallel AGC/Decision/Clock Recovery Circuit in 1.2-μm CMOS (T. Hu & P. Gray). A Monolithic 622 Mb/sec Clock Extraction and Data Retiming Circuit (B. Lai & R. Walker). A 660 Mb/s CMOS Clock Recovery Circuit with Instantaneous Locking for NRZ Data and Burst-Mode Transmission (M. Banu & A. Dunlop). A Monolithic 2.3-Gb/s 100-mW Clock and Data Recovery Circuit in Silicon Bipolar Technology (M. Soyuer). A 50 MHz Phase- and Frequency-Locked Loop (R. Cordell, et al.). NMOS ICs for Clock and Data Regeneration in Gigabit-per-Second Optical-Fiber Receivers (S. Enam & A. Abidi). A PLL-Based 2.5-Gb/s Clock and Data Regenerator IC (H. Ransijn & P. O'Connor). A 2.5-Gb/sec 15-mW BiCMOS Clock Recovery Circuit (B. Razavi & J. Sung). An 8 GHz Silicon Bipolar Clock Recovery and Data Regenerator IC (A. Pottbacker & U. Langmann). Author Index. Subject Index. Editor's Biography.

Read more less

Book SynopsisMarkov modeling has long been accepted as a fundamental and powerful technique for the fault tolerance analysis of mission-critical applications. However, the elaborate computations required have often made Markov modeling too time-consuming to be of practical use on these complex systems. With this hands-on tool, designers can use the Markov modeling technique to analyze safety, reliability, maintainability, and cost-effectiveness factors in the full range of complex systems in use today. Featuring ground-breaking simulation software and a comprehensive reference manual, MARKOV MODELING FOR RELIABILITY ANALYSIS helps system designers surmount the mathematical computations that have previously prevented effective reliability analysis. The text and software compose a valuable self-study tool that is complete with detailed explanations, examples, and a library of Markov models that can be used for experiments and as derivations for new simulation models. The book details howTable of ContentsSeries Introduction. Preface. Introduction. System Requirements and Design. Foundations of Probability Theory. Basic Reliability Concepts. Basic Reliability Models. Markov Process Fundamentals. Hardware Reliability Modeling. Software Reliability Modeling. Combined Hardware-Software Reliability Modeling. Modeling of Large and Complex Systems. Maintainability Modeling. Availability Modeling. Safety Modeling. Markov Model Evaluation. Effectiveness Modeling. Support Analyses. Application Examples. Practical Design of Fault-Tolerant Systems. CARMS User's Guide. CARMS Model Library. CARMS Reference. Definitions and Acronyms. References. Index. About the Authors.

Read more less

Book SynopsisThis accessible, new reference work shows how and why RF energy is created within a printed circuit board and the manner in which propagation occurs. With lucid explanations, this book enables engineers to grasp both the fundamentals of EMC theory and signal integrity and the mitigation process needed to prevent an EMC event.Table of ContentsPreface. Acknowledgements. EMC Fundamentals. EMC Inside the PCB. Components and EMC. Image Planes. Bypassing and Decoupling. Transmission Lines. Signal Integrity and Crosstalk. Trace Termination. Grounding. Glossary. Bibliography. Appendix A: The Decibel. Appendix B: Fourier Analysis. Appendix C: Conversion Tables. Appendix D: International EMC Requirements. Index. About the Author.

Read more less

Book SynopsisThis book covers the design of next generation microprocessors in deep submicron CMOS technologies. The chapters in Design of High Performance Microprocessor Circuits were written by some of the world's leading technologists, designers, and researchers.Table of ContentsPreface. OVERVIEW. Impact of Physical Technology on Architecture (John H. Edmondson). TECHNOLOGY ISSUES. CMOS Scaling and Issues in SUB-0.25µm Systems (Yuan Taur). Techniques for Leakage Power Reduction (Vivek De, Yibin Ye, et al.). Low-Voltage Technologies (Tadahiro Kuroda and Takayasu Sakurai). SOI Technology and Circuits (Ghavam G. Shahidi, Fari Assaderaghi and Dimitri Antoniadis). Models of Process Variations in Device and Interconnect (Duane Boning and Sani Nassif). CIRCUIT STYLES FOR LOGIC. Basic Logic Families (Kerry Bernstein). Issues in Dynamic Logic Design (Paul Gronowski). Self-Timed Pipelines (Ted Williams). High-Speed VLSI Arithmetic Units: Adders and Multipliers (Vojin G. Oklobdzija). CLOCKING. Clocked Storage Elements (Hamid Partovi). Design of High-Speed CMOS PLLs and DLLs (John George Maneatis). Clock Distribution (Daniel W. Bailey). MEMORY SYSTEM DESIGN. Register Files and Caches (Ronald Preston). Embedded DRAM (Tadaaki Yamauchi and Michihiro Yamada). INTERCONNECT AND I/O. Analyzing On-Chip Interconnect Effects (Noel Menezes and Lawrence Pileggi). Techniques for Driving Interconnect (Shannon V. Morton). I/O and ESD Circuit Design (Stephen C. Thierauf and Warren R. Anderson). High-Speed Electrical Signaling (Stefanos Sidropoulos, Chih-Kong Ken Yang, and Mark Horowitz). RELIABILITY. Electromigration Reliability (J. Joseph Clement). Hot Carrier Reliability (Kaizad Mistry). CAD TOOLS AND TEST. Overview of Computer-Aided Design Tools (Yao-Tsung Yen). Timing Verification (Victor Peng). Design and Analysis of Power Distribution Networks (David Blaauw, Rajendran Panda, and Rajat Chaudhry). Testing of High-Performance Processors (Dilip K. Bhavsar). Index.

Read more less

Book SynopsisAnswers the commonly asked questions about how digital signal processing--based machines work and what role DSP plays in the process. It shows you how DSP performs in real--test situations and uses mathematical concepts rather than derivations.Table of ContentsPreface. Chapter 1: Introduction to DSP-Based Testing. Overview of Testing. Emulation versus Automation. Invisible Instruments. Numerical Vectors. Vector Transfer. Vector and Array Processing Speed. Processor Speed. Floating-Point Mathematics. Phase-Lock Synchronization. Representative Digitizer. DSP-Based Test Advantages Summarized. Price of Using DSP . . . Chapter 2: Accuracy and Speed of Emulated Instruments. Hardware Emulation. Integration versus Filtering for AC Measurements. Coherent Measurement. Unit Test Period. Coherent Filtering. Correlation. Fourier Voltmeter. Software Version of the FVM. Orthogonal Signals and Fourier Voltmeters. DFT and FFT. Synthesis. Frequency Leakage. Graphical Example of FFT Application. Chapter 3: Noncoherent Sampling. Reconstruction. Time and Spectral Vectors. Imaging and Noncoherent Undersampling. Heterodyning and Reconstruction. Rules of Imaging. Sampling Rates and Spacing. Nyquist's Limit. Universal Rule for Noncoherent Sampling. Sine-X-over-X Distortion and Correction. Receiver/Reconstruction Filtering. Chapter 4: Coherence. Vector Periodicity. Amount of Information in a Vector. Effective Sampling Rate. Chapter 5: Multitone Testing. Multitone Distortion Measurement. Multitone Frequency Measurement. Multitone versus Single Tone Applications. Error Sources and Accuracy. Effect of Device Uncertainty on Multitone Tests. Factors Affecting Accuracy. Out-of-Band Measurement Uncertainty. Estimating Multitone Accuracy. Estimating Multitone Uncertainty Due to Quantization. Chapter 6: Vector Operations for DSP Testing. Vector Operations in DSP-Programming. Program Examples. Chapter 7: Event Digitizing. Explicit versus Implicit Sampling. Event Digitizer. Testing Tape Decks. Chapter 8: Measuring Random Noise. Equivalent Input Noise. Normalized Spectral Noise Density. Typical DSP Procedure. Input Resistors. Coupling Capacitor. Noise Bandwidth. Accuracy and Repeatability of Noise Measurements. Statistical Sampling versus DSP Sampling. Estimating the Repeatability of Local Measurements. Cautions about Averaging. Computing Spectral Power from a Sparsely Sampled Signal. Exercises. Chapter 9: Introduction to A/D Testing. A/D versus D/A Conversion. Transfer Maps. Transmission Parameters versus Intrinsic Parameters. Conversion Formats and Types. Uncertainty and Distortion of the Ideal ADC. DAC Transfer Error. Superposition Error. Adapting D/A Parameters to ADC Measurement. Probabilistic Estimation of ADC Input Noise. Dynamic Testing. Noise Improvement Figure. Random Voltage Noise. Induced Jitter Noise. Equivalent Number of Bits. Idle Noise and Noise Power Ratio. Separating Quantization Distortion from Noise. Chapter 10: Techniques for Flash Converter Testing. Linear Histogram Testing. Histograms with Sparkle Codes and Missing Codes. Obtaining the Transfer Function from the Histogram. Integral Linearity Error from the Transfer Curve. ILE Directly from DLE: A Fast Method. Centerlines for Histogram-Derived ILE. Integral Linearity from Weighted Code Centers. MIL-STD Regression Line Approach. Extreme Values of Linearity Error. Differential Linearity from Weighted Code Center Information. Dynamic Testing. Sinusoidal Histogram Testing. Using the Tally to Find MAT T2. Errors with Sinusoidal Histograms. Spectral Analysis. Noise Measurement. Noise Separation. Progressive Spectra. Unscrambling. Differential Phase (DP). Differential Gain (DG). Chapter 11: Incremental Models for DSP-Based Testing with Applications to Transient and Flutter Measurement. Introduction. Limitations of Vector Processors. Incremental Modeling. Comparison with Continuous Equations. RC High Pass Model. Time Scaling and Normalization. Ballistic Peaks. Ballistic Peak Detection Models. Generalized Approach. Wow and Flutter Measurement. DIN/IEEE/ANSI/Quasi-Peak Detection. DIN Frequency Weighting. Importance of Phase Response in Peak-Reading Instruments. Finite Impulse Response (FIR) Filtering. Chapter 12: CODEC Testing. Pulse Code Modulation (PCM) CODEC Channel. Encoding Law. Five Kinds of Tests. Full Channel versus Half Channel. Normalized Mu-Law and A-Law Measurement Units. Review of Decibel-Based Measurement Units. CODEC Performance Tests. Gain and Loss. Choosing the Test Frequency. Frequency Distribution. Intrinsic versus Extrinsic Error. Transmission Parameters. Half Channel Encoder Testing. Decoder Testing. Other Decoder Performance Tests. References for CODEC (PCM) Telephone Standards. Chapter 13: Selected Reprints. Automated Measurement of 12- to 16-Bit Converters M. Mahoney (Proceedings of the 1981 IEEE Test Conference, 1981. pages 319-327). DSP Measurement of Frequency E. Rosenfeld (Proceedings of the International Test Conference, 1986, pages 981-986). DSP Synthesized Signal Source for Analog Testing Stimulus and New Test Method H. Kitayoshi, S. Sumida. K. Shirakawa, and S. Takeshita (Proceedings of the International Test Conference, 1985, pages 825-834). An NBS Calibration Service for A/D and D/A Conveners TM. Souders and D.R. Flach (Proceedings of the 1981 IEEE Test Conference, 1981, pages 290-303). Production Testing of PCM (Digital) Audio Circuits M. Landry (Proceedings of the International Test Conference, 1983, pages 767-770). Chapter 14: Appendix: References/Bibliography.

Read more less

Book SynopsisThis revised edition immerses practicing and aspiring industry professionals in the complex world of RF design.Table of ContentsPREFACE TO THE SECOND EDITION xix PART 1 DESIGN TECHNOLOGIES AND SKILLS 1 1 DIFFERENCE BETWEEN RF AND DIGITAL CIRCUIT DESIGN 3 1.1 Controversy 3 1.2 Difference of RF and Digital Block in a Communication System 6 1.3 Conclusions 9 1.4 Notes for High-Speed Digital Circuit Design 9 2 REFLECTION AND SELF-INTERFERENCE 15 2.1 Introduction 15 2.2 Voltage Delivered from a Source to a Load 16 2.3 Power Delivered from a Source to a Load 23 2.4 Impedance Conjugate Matching 33 2.5 Additional Effect of Impedance Matching 42 3 IMPEDANCE MATCHING IN THE NARROW-BAND CASE 61 3.1 Introduction 61 3.2 Impedance Matching by Means of Return Loss Adjustment 63 3.3 Impedance Matching Network Built by One Part 68 3.4 Impedance Matching Network Built by Two Parts 74 3.5 Impedance Matching Network Built By Three Parts 84 3.6 Impedance Matching When ZS Or ZL Is Not 50 85 3.7 Parts In An Impedance Matching Network 93 4 IMPEDANCE MATCHING IN THE WIDEBAND CASE 131 4.1 Appearance of Narrow and Wideband Return Loss on a Smith Chart 131 4.2 Impedance Variation Due to the Insertion of One Part Per Arm or Per Branch 136 4.3 Impedance Variation Due to the Insertion of Two Parts Per Arm or Per Branch 145 4.4 Partial Impedance Matching for an IQ (in Phase Quadrature) Modulator in a UWB (Ultra Wide Band) System 151 4.5 Discussion of Passive Wideband Impedance Matching Network 174 5 IMPEDANCE AND GAIN OF A RAW DEVICE 181 5.1 Introduction 181 5.2 Miller Effect 183 5.3 Small-Signal Model of a Bipolar Transistor 187 5.4 Bipolar Transistor with CE (Common Emitter) Configuration 190 5.5 Bipolar Transistor with CB (Common Base) Configuration 204 5.6 Bipolar Transistor with CC (Common Collector) Configuration 214 5.7 Small-Signal Model of a MOSFET 221 5.8 Similarity Between a Bipolar Transistor and a MOSFET 225 5.9 MOSFET with CS (Common Source) Configuration 235 5.10 MOSFET with CG (Common Gate) Configuration 244 5.11 MOSFET with CD (Common Drain) Configuration 249 5.12 Comparison of Transistor Configuration of Single-stage Amplifiers with Different Configurations 252 6 IMPEDANCE MEASUREMENT 259 6.1 Introduction 259 6.2 Scalar and Vector Voltage Measurement 260 6.3 Direct Impedance Measurement by a Network Analyzer 263 6.4 Alternative Impedance Measurement by Network Analyzer 272 6.5 Impedance Measurement Using a Circulator 276 7 GROUNDING 281 7.1 Implication of Grounding 281 7.2 Possible Grounding Problems Hidden in a Schematic 283 7.3 Imperfect or Inappropriate Grounding Examples 284 7.4 'Zero' Capacitor 290 7.5 Quarter Wavelength of Microstrip Line 300 8 EQUIPOTENTIALITY AND CURRENT COUPLING ON THE GROUND SURFACE 325 8.1 Equipotentiality on the Ground Surface 325 8.2 Forward and Return Current Coupling 335 8.3 PCB or IC Chip with Multimetallic Layers 344 9 LAYOUT 349 9.1 Difference in Layout between an Individual Block and a System 349 9.2 Primary Considerations of a PCB 350 9.3 Layout of a PCB for Testing 352 9.4 VIA Modeling 355 9.5 Runner 360 9.6 Parts 369 9.7 Free Space 371 10 MANUFACTURABILITY OF PRODUCT DESIGN 377 10.1 Introduction 377 10.2 Implication of 6σ Design 379 10.3 Approaching 6σ Design 383 10.4 Monte Carlo Analysis 386 11 RFIC (RADIO FREQUENCY INTEGRATED CIRCUIT) 401 11.1 Interference and Isolation 401 11.2 Shielding for an RF Module by a Metallic Shielding Box 403 11.3 Strong Desirability to Develop RFIC 405 11.4 Interference going along IC Substrate Path 406 11.5 Solution for Interference Coming from Sky 411 11.6 Common Grounding Rules for RF Module and RFIC Design 412 11.7 Bottlenecks in RFIC Design 414 11.8 Calculating of Quarter Wavelength 420 PART 2 RF SYSTEM 427 12 MAIN PARAMETERS AND SYSTEM ANALYSIS IN RF CIRCUIT DESIGN 429 12.1 Introduction 429 12.2 Power Gain 431 12.3 Noise 441 12.4 Nonlinearity 453 12.5 Other Parameters 480 12.6 Example of RF System Analysis 482 13 SPECIALITY OF "‘ZERO IF"’ SYSTEM 501 13.1 Why Differential Pair? 501 13.2 Can DC Offset be Blocked out by a Capacitor? 508 13.3 Chopping Mixer 511 13.4 DC Offset Cancellation by Calibration 516 13.5 Remark on DC Offset Cancellation 517 14 DIFFERENTIAL PAIRS 521 14.1 Fundamentals of Differential Pairs 521 14.2 CMRR (Common Mode Rejection Ratio) 533 15 RF BALUN 547 15.1 Introduction 547 15.2 Transformer Balun 549 15.3 LC Balun 571 15.4 Microstrip Line Balun 580 15.5 Mixing Type of Balun 583 16 SOC (SYSTEM-ON-A-CHIP) AND NEXT 611 16.1 SOC 611 16.2 What is Next 612 PART 3 INDIVIDUAL RF BLOCKS 625 17 LNA (LOW-NOISE AMPLIFIER) 627 17.1 Introduction 627 17.2 Single-Ended Single Device LNA 628 17.3 Single-Ended Cascode LNA 662 17.4 LNA with AGC (Automatic Gain Control) 684 18 MIXER 695 18.1 Introduction 695 18.2 Passive Mixer 698 18.3 Active Mixer 706 18.4 Design Schemes 717 19 TUNABLE FILTER 731 19.1 Tunable Filter in A Communication System 731 19.2 Coupling between two Tank Circuits 733 19.3 Circuit Description 738 19.4 Effect of Second Coupling 739 19.5 Performance 743 20 VCO (VOLTAGE-CONTROLLED OSCILLATOR) 749 20.1 "Three-Point" Types of Oscillator 749 20.2 Other Single-Ended Oscillators 755 20.3 VCO and PLL (Phase Lock Loop) 759 20.4 Design Example of a Single-Ended VCO 769 20.5 Differential VCO and Quad-Phases VCO 778 21 PA (POWER AMPLIFIER) 789 21.1 Classification of PA 789 21.2 Single-Ended PA 794 21.3 Single-Ended PA IC Design 798 21.4 Push–Pull PA Design 799 21.5 PA with Temperature Compensation 822 21.6 PA with Output Power Control 823 21.7 Linear PA 824 References 828 Further Reading 828 Exercises 829 Answers 829 INDEX 833

Read more less

Book SynopsisThe only book on integrated circuits for optical communications that fully covers High-Speed IOs, PLLs, CDRs, and transceiver design including optical communication The increasing demand for high-speed transport of data has revitalized optical communications, leading to extensive work on high-speed device and circuit design.Table of ContentsPreface to First Edition xiii Preface xv About the Author xvii 1 Introduction to Optical Communications 1 1.1 Brief History 1 1.2 Generic Optical System 2 1.3 Design Challenges 5 1.4 State of the Art 6 2 Basic Concepts 8 2.1 Properties of Random Binary Data 8 2.2 Generation of Random Data 12 2.3 Data Formats 14 2.4 Effect of Bandwidth Limitation on Random Data 16 2.5 Effect of Noise on Random Data 21 2.6 Phase Noise and Jitter 24 2.7 Transmission Lines 30 3 Optical Devices 36 3.1 Laser Diodes 36 3.2 Optical Fibers 46 3.3 Photodiodes 55 3.4 Optical Systems 58 4 Transimpedance Amplifiers 62 4.1 General Considerations 62 4.2 Open-Loop TIAs 73 4.3 Feedback TIAs 87 4.4 Supply Rejection 97 4.5 Differential TIAs 100 4.6 High-Performance Techniques 103 4.7 Automatic Gain Control 114 4.8 Case Studies 118 4.9 New Developments in TIA Design 122 5 Limiting Amplifiers and Output Buffers 130 5.1 General Considerations 130 5.2 Broadband Techniques 138 5.3 Output Buffers 149 5.4 Distributed Amplification 159 5.5 Other Broadband Techniques 171 6 Oscillator Fundamentals 185 6.1 General Considerations 185 6.2 Ring Oscillators 187 6.3 LC Oscillators 198 6.4 Voltage-Controlled Oscillators 211 6.5 Mathematical Model of VCOs 227 7 LC Oscillators 233 7.1 Monolithic Inductors 233 7.2 Monolithic Varactors 246 7.3 Basic LC Oscillators 248 7.4 Quadrature Oscillators 255 7.5 Distributed Oscillators 261 8 Phase-Locked Loops 264 8.1 Simple PLL 264 8.2 Charge-Pump PLLs 280 8.3 Nonideal Effects in PLLs 293 8.4 Delay-Locked Loops 300 8.5 Applications 302 9 Clock and Data Recovery 308 9.1 General Considerations 308 9.2 Phase Detectors for Random Data 320 9.3 Frequency Detectors for Random Data 333 9.4 CDR Architectures 338 9.5 Jitter in CDR Circuits 344 10 Multiplexers and Laser Drivers 356 10.1 Multiplexers 356 10.2 Frequency Dividers 364 10.3 Laser and Modulator Drivers 374 10.4 Design Principles 378 10.5 New Developments in Laser Driver Design 385 11 Burst-Mode Circuits 393 11.1 Passive Optical Networks 393 11.2 Burst-Mode TIAs 395 11.3 Burst-Mode CDR Circuits 404 11.4 Alternative BM CDR Architectures 413 Index 417

Read more less

Book SynopsisPresented in three parts, this book provides readers with an immersive introduction to this rapidly growing segment of the computer industry.Table of ContentsPreface xv Contributors xvii 1 Low Power Multicore Processors for Embedded Systems 1 Fumio Arakawa 1.1 Multicore Chip with Highly Efficient Cores 1 1.2 SuperH RISC Engine Family (SH) Processor Cores 5 1.3 SH-X: A Highly Efficient CPU Core 9 1.4 SH-X FPU: A Highly Efficient FPU 20 1.5 SH-X2: Frequency and Efficiency Enhanced Core 33 1.6 SH-X3: Multicore Architecture Extension 34 1.7 SH-X4: ISA and Address Space Extension 47 2 Special-Purpose Hardware for Computational Biology 61 Siddharth Srinivasan 2.1 Molecular Dynamics Simulations on Graphics Processing Units 62 2.2 Special-Purpose Hardware and Network Topologies for MD Simulations 72 2.3 Quantum MC Applications on Field-Programmable Gate Arrays 77 2.4 Conclusions and Future Directions 82 3 Embedded GPU Design 85 Byeong-Gyu Nam and Hoi-Jun Yoo 3.1 Introduction 85 3.2 System Architecture 86 3.3 Graphics Modules Design 88 3.4 System Power Management 95 3.5 Implementation Results 99 3.6 Conclusion 102 4 Low-Cost VLSI Architecture for Random Block-Based Access of Pixels in Modern Image Sensors 107 Tareq Hasan Khan and Khan Wahid 4.1 Introduction 107 4.2 The DVP Interface 108 4.3 The iBRIDGE-BB Architecture 109 4.4 Hardware Implementation 116 4.5 Conclusion 123 5 Embedded Computing Systems on FPGAs 127 Lesley Shannon 5.1 FPGA Architecture 128 5.2 FPGA Confi guration Technology 129 5.3 Software Support 133 5.4 Final Summary of Challenges and Opportunities for Embedded Computing Design on FPGAs 135 6 FPGA-Based Emulation Support for Design Space Exploration 139 Paolo Meloni, Simone Secchi, and Luigi Raffo 6.1 Introduction 139 6.2 State of the Art 140 6.3 A Tool for Energy-Aware FPGA-Based Emulation: The MADNESS Project Experience 144 6.4 Enabling FPGA-Based DSE: Runtime-Reconfi gurable Emulators 147 6.5 Use Cases 161 7 FPGA Coprocessing Solution for Real-Time Protein Identifi cation Using Tandem Mass Spectrometry 169 Daniel Coca, István Bogdán, and Robert J. Beynon 7.1 Introduction 169 7.2 Protein Identifi cation by Sequence Database Searching Using MS/MS Data 171 7.3 Reconfi gurable Computing Platform 174 7.4 FPGA Implementation of the MS/MS Search Engine 176 7.5 Summary 180 8 Real-Time Confi gurable Phase-Coherent Pipelines 185 Robert L. Shuler, Jr., and David K. Rutishauser 8.1 Introduction and Purpose 185 8.2 History and Related Methods 188 8.3 Implementation Framework 191 8.4 Prototype Implementation 204 8.5 Assessment Compared with Related Methods 207 9 Low Overhead Radiation Hardening Techniques for Embedded Architectures 211 Sohan Purohit, Sai Rahul Chalamalasetti, and Martin Margala 9.1 Introduction 211 9.2 Recently Proposed SEU Tolerance Techniques 213 9.3 Radiation-Hardened Reconfi gurable Array with Instruction Rollback 223 9.4 Conclusion 234 10 Hybrid Partially Adaptive Fault-Tolerant Routing for 3D Networks-on-Chip 239 Sudeep Pasricha and Yong Zou 10.1 Introduction 239 10.2 Related Work 240 10.3 Proposed 4NP-First Routing Scheme 242 10.4 Experiments 250 10.5 Conclusion 255 11 Interoperability in Electronic Systems 259 Andrew Leone 11.1 Interoperability 259 11.2 The Basis for Interoperability: The OSI Model 261 11.3 Hardware 263 11.4 Firmware 266 11.5 Partitioning the System 268 11.6 Examples of Interoperable Systems 270 12 Software Modeling Approaches for Presilicon System Performance Analysis 273 Kenneth J. Schultz and Frederic Risacher 12.1 Introduction 273 12.2 Methodologies 275 12.3 Results 283 12.4 Conclusion 288 13 Advanced Encryption Standard (AES) Implementation in Embedded Systems 291 Issam Hammad, Kamal El-Sankary, and Ezz El-Masry 13.1 Introduction 291 13.2 Finite Field 292 13.3 The AES 293 13.4 Hardware Implementations for AES 300 13.5 High-Speed AES Encryptor with Efficient Merging Techniques 306 13.6 Conclusion 315 14 Reconfi gurable Architecture for Cryptography over Binary Finite Fields 319 Samuel Antão, Ricardo Chaves, and Leonel Sousa 14.1 Introduction 319 14.2 Background 320 14.3 Reconfigurable Processor 333 14.4 Results 350 14.5 Conclusions 358 References 359 Index 363

Read more less

Book SynopsisThis book covers instantaneous power theory as well as the importance of design of shunt, series, and combined shunt-series power active filters and hybrid passive-active power filters Illustrates pioneering applications of the p-q theory to power conditioning, which highlights distinct differences from conventional theories Explores p-q-r theory to give a new method of analyzing the different powers in a three-phase circuit Provides exercises at the end of many chapters that are unique to the second edition Table of ContentsPREFACE xiii CHAPTER 1 INTRODUCTION 1 1.1 Concepts and Evolution of Electric Power Theory 1 1.2 Applications of the P-q Theory to Power Electronics Equipment 4 1.3 Harmonic Voltages in Power Systems 5 1.4 Identified and Unidentified Harmonic-Producing Loads 6 1.5 Harmonic Current and Voltage Sources 8 1.6 Basic Principles of Harmonic Compensation 9 1.7 Basic Principle of Power Flow Control 13 References 15 CHAPTER 2 ELECTRIC POWER DEFINITIONS: BACKGROUND 17 2.1 Power Definitions Under Sinusoidal Conditions 18 2.2 Voltage and Current Phasors and Complex Impedance 20 2.3 Complex Power and Power Factor 21 2.4 Concepts of Power Under Nonsinusoidal Conditions: Conventional Approaches 22 2.4.1 Power Definitions by Budeanu 22 2.4.1.A Power Tetrahedron and Distortion Factor 25 2.4.2 Power Definitions by Fryze 27 2.5 Electric Power in Three-Phase Systems 28 2.5.1 Classifications of Three-Phase Systems 28 2.5.2 Power in Balanced Three-Phase Systems 31 2.5.3 Power in Three-Phase Unbalanced Systems 33 2.6 Summary 34 2.7 Exercises 34 References 35 CHAPTER 3 THE INSTANTANEOUS POWER THEORY 37 3.1 Basis of the p-q Theory 37 3.1.1 Historical Background of the p-q Theory 38 3.1.2 The Clarke Transformation 39 3.1.2.A Calculation of Voltage and Current Vectors When Zero-Sequence Components Are Excluded 41 3.1.3 Three-Phase Instantaneous Active Power in Terms of Clarke Components 43 3.1.4 The Instantaneous Powers of the p-q Theory 44 3.2 The p-q Theory in Three-Phase, Three-Wire Systems 44 3.2.1 Comparisons with the Conventional Theory 48 3.2.1.A Example #1—Sinusoidal Voltages and Currents 49 3.2.1.B Example #2—Balanced Voltages and Capacitive Loads 49 3.2.1.C Example #3—Sinusoidal Balanced Voltage and Nonlinear Load 50 3.2.2 Use of the p-q Theory for Shunt Current Compensation 54 3.2.2.A Examples of Appearance of Hidden Currents 59 3.2.3 The Dual p-q Theory 63 3.3 The p-q Theory in Three-Phase, Four-Wire Systems 65 3.3.1 The Zero-Sequence Power in a Three-Phase Sinusoidal Voltage Source 67 3.3.2 Presence of Negative-Sequence Components 68 3.3.3 General Case Including Distortions and Imbalances in the Voltages and in the Currents 69 3.3.4 Physical Meanings of the Instantaneous Real, Imaginary, and Zero-Sequence Powers 74 3.3.5 Avoiding the Clarke Transformation in the p-q Theory 75 3.3.6 Modified p-q Theory 77 3.4 Instantaneous abc Theory 81 3.4.1 Active and Nonactive Current Calculation by Means of a Minimization Method 83 3.4.2 Generalized Fryze Currents Minimization Method 88 3.5 Comparisons Between the p-q Theory and the abc Theory 91 3.5.1 Selection of Power Components to be Compensated 95 3.6 The p-q-r Theory 97 3.7 Summary 104 3.8 Exercises 105 References 106 CHAPTER 4 SHUNT ACTIVE FILTERS 111 4.1 General Description of Shunt Active Filters 113 4.1.1 PWM Converters for Shunt Active Filters 114 4.1.2 Active Filter Controllers 115 4.2 Three-Phase, Three-Wire Shunt Active Filters 118 4.2.1 Active Filters for Constant Power Compensation 119 4.2.2 Active Filters for Sinusoidal Current Control 135 4.2.2.A Positive-Sequence Voltage Detector 138 4.2.2.B Simulation Results 145 4.2.3 Active Filters for Current Minimization 145 4.2.4 Active Filters for Harmonic Damping 149 4.2.4.A Shunt Active Filter Based on Voltage Detection 151 4.2.4.B Active Filter Controller Based on Voltage Detection 152 4.2.4.C An Application Case of an Active Filter for Harmonic Damping 156 4.2.5 A Digital Controller 171 4.2.5.A System Configuration of the Digital Controller 172 4.2.5.B Current Control Methods 177 4.3 Three-Phase, Four-Wire Shunt Active Filters 180 4.3.1 Converter Topologies for Three-Phase, Four-Wire Systems 181 4.3.2 Dynamic Hysteresis-Band Current Controller 182 4.3.3 Active Filter dc Voltage Regulator 184 4.3.4 Optimal Power Flow Conditions 185 4.3.5 Constant Instantaneous Power Control Strategy 187 4.3.6 Sinusoidal Current Control Strategy 189 4.3.7 Performance Analysis and Parameter Optimization 192 4.3.7.A Influence of the System Parameters 192 4.3.7.B Dynamic Response of the Shunt Active Filter 193 4.3.7.C Economical Aspects 198 4.3.7.D Experimental Results 199 4.4 Compensation Methods Based on the p-q-r Theory 204 4.4.1 Reference Power Control Method 206 4.4.2 Reference Current Control Method 211 4.4.3 Alternative Control Method 213 4.4.4 The Simplified Sinusoidal Source Current Strategy 215 4.4.4.A The PLL Circuit and the Positive-Sequence Detector 215 4.4.4.B The Sinusoidal Source Current Control Strategy with Energy Balance Inside the Active Filter 217 4.5 Comparisons Between Control Methods Based on the p-q Theory and the p-q-r Theory 218 4.6 Shunt Selective Harmonic Compensation 224 4.7 Summary 231 4.8 Exercises 231 References 233 CHAPTER 5 HYBRID AND SERIES ACTIVE FILTERS 237 5.1 Basic Series Active Filter 237 5.2 Combined Series Active Filter and Shunt Passive Filter 239 5.2.1 Example of an Experimental System 242 5.2.1.A Compensation Principle 243 5.2.1.B Filtering Characteristics 245 5.2.1.C Control Circuit 246 5.2.1.D Filter to Suppress Switching Ripples 248 5.2.1.E Experimental Results 249 5.2.2 Some Remarks about the Hybrid Filters 252 5.3 Series Active Filter Integrated with a Double-Series Diode Rectifier 253 5.3.1 The First-Generation Control Circuit 255 5.3.1.A Circuit Configuration and Delay Time 255 5.3.1.B Stability of the Active Filter 257 5.3.2 The Second-Generation Control Circuit 258 5.3.3 Stability Analysis and Characteristics Comparison 260 5.3.3.A Transfer Function of the Control Circuits 260 5.3.3.B Characteristics Comparisons 261 5.3.4 Design of a Switching-Ripple Filter 263 5.3.4.A Design Principle 263 5.3.4.B Effect on the System Stability 263 5.3.4.C Experimental Testing 264 5.3.5 Experimental Results 266 5.4 Comparisons Between Hybrid and Pure Active Filters 268 5.4.1 Low-Voltage Transformerless Hybrid Active Filter 268 5.4.2 Low-Voltage, Transformerless, Pure Shunt Active Filter 271 5.4.3 Comparisons through Simulation Results 273 5.5 Hybrid Active Filters for Medium-Voltage Motor Drives 274 5.5.1 Hybrid Active Filter for a Three-Phase Six-Pulse Diode Rectifier 275 5.5.1.A System Configuration 275 5.5.1.B Experimental System 277 5.5.1.C Control System 277 5.5.1.D Common Sixth-Harmonic Zero-Sequence Voltage Injection 281 5.5.1.E Three-Phase Second-Harmonic Negative Sequence Voltages Injection 283 5.5.1.F Experimental Results 286 5.5.1.G Appendix 292 5.5.2 Hybrid Active Filter for a Three-Phase 12-Pulse Diode Rectifier 292 5.5.2.A Medium-Voltage High-Power Motor Drive Systems 293 5.5.2.B Experimental System 295 5.5.2.C Control System 298 5.5.2.D Three-Phase Second-Harmonic Negative Sequence Voltages Injection 300 5.5.2.E Experimental Results 303 5.5.2.F Overall System Efficiency 308 5.6 Summary 308 5.7 Exercises 309 References 310 CHAPTER 6 COMBINED SERIES AND SHUNT POWER CONDITIONERS 313 6.1 The Unified Power Flow Controller 314 6.1.1 FACTS and UPFC Principles 315 6.1.1.A Voltage Regulation Principle 317 6.1.1.B Power Flow Control Principle 318 6.1.2 A Controller Design for the UPFC 321 6.1.3 UPFC Approach Using a Shunt Multipulse Converter 328 6.1.3.A Six-Pulse Converter 328 6.1.3.B Quasi 24-Pulse Converter 332 6.1.3.C Control of Active and Reactive Power in Multipulse Converters 334 6.1.3.D Shunt Multipulse Converter Controller 336 6.2 The Unified Power Quality Conditioner 339 6.2.1 General Description of the UPQC 340 6.2.2 A Three-Phase, Four-Wire UPQC 342 6.2.2.A Power Circuit of the UPQC 343 6.2.2.B The UPQC Controller 344 6.2.2.C Analysis of the UPQC Dynamic 353 6.2.3 The UPQC Combined with Passive Filters (the Hybrid UPQC) 370 6.2.3.A Controller of the Hybrid UPQC 374 6.2.3.B Experimental Results 380 6.3 The Universal Active Power Line Conditioner 386 6.3.1 General Description of the UPLC 386 6.3.2 The Controller of the UPLC 389 6.3.2.A Controller for Configuration #2 of the UPLC 396 6.3.3 Performance of the UPLC 397 6.3.3.A Normalized System Parameters 397 6.3.3.B Simulation Results of Configuration #1 of the UPLC 401 6.3.3.C Simulation Results of Configuration #2 of the UPLC 409 6.3.4 General Aspects 411 6.4 Combined Shunt-Series Filters for AC and DC Sides of Three-Phase Rectifiers 411 6.4.1 The Combined Shunt-Series Filter 414 6.4.2 Instantaneous Real and Imaginary Powers in the ac Source 415 6.4.3 The Instantaneous Power in the dc Side of the Rectifier 416 6.4.4 Comparison of Instantaneous Powers on the ac and dc Sides of the Rectifier 418 6.4.5 Control Algorithm of the Active Shunt-Series Filter 418 6.4.6 The Common dc Link 421 6.4.7 Digital Simulation 424 6.4.8 Experimental Results 426 6.5 Summary 427 6.6 Exercises 428 References 429 INDEX 431

Read more less

Book SynopsisA unique text on the theory and design fundaments of inductors and transformers, updated with more coverage on the optimization of magnetic devices and many new design examples The first edition is popular among a very broad audience of readers in different areas of engineering and science.Trade Review“What sets this book apart from previous magnetics books recently reviewed in How2Power Today is its depth of coverage, especially of topics that are hard to analyze such as winding resistance caused by the skin and proximity effects, and parasitic winding capacitances. Kazimierczuk—I’ll call him “Kaz” for short, as Apple co-founder Steve Wozniak is called “Woz”—has worked out in sufficient detail the mathematical derivations of design equations that usually appear in the literature as either given (or else ignored entirely) rather than derived.” (How2Power.com, 1 September 2015) “Loaded with essential formulas and design methods, this book will give the designer of high-frequency magnetic components not only a better design but will reinforce an understanding of the high-frequency magnetic component design.” (IEEE Electrical Engineering magazine, 1 March 2015) Table of ContentsPreface xvii About the Author xix List of Symbols xxi 1 Fundamentals of Magnetic Devices 1 1.1 Introduction 1 1.2 Fields 2 1.3 Magnetic Relationships 2 1.4 Magnetic Circuits 6 1.5 Magnetic Laws 9 1.6 Eddy Currents 29 1.7 Core Saturation 32 1.8 Inductance 40 1.9 Air Gap in Magnetic Core 51 1.10 Fringing Flux 54 1.11 Inductance of Strip Transmission Line 62 1.12 Inductance of Coaxial Cable 62 1.13 Inductance of Two-Wire Transmission Line 63 1.14 Magnetic Energy and Magnetic Energy Density 64 1.15 Self-Resonant Frequency 69 1.16 Quality Factor of Inductors 69 1.17 Classification of Power Losses in Magnetic Components 69 1.18 Noninductive Coils 71 1.19 Summary 71 1.20 References 74 1.21 Review Questions 76 1.22 Problems 78 2 Magnetic Cores 81 2.1 Introduction 81 2.2 Properties of Magnetic Materials 81 2.3 Magnetic Dipoles 83 2.4 Magnetic Domains 89 2.5 Curie Temperature 90 2.6 Magnetic Susceptibility and Permeability 91 2.7 Linear, Isotropic, and Homogeneous Magnetic Materials 93 2.8 Magnetic Materials 93 2.9 Hysteresis 96 2.10 Low-Frequency Core Permeability 98 2.11 Core Geometries 99 2.12 Ferromagnetic Core Materials 103 2.13 Superconductors 108 2.14 Hysteresis Loss 109 2.15 Eddy-Current Core Loss 113 2.16 Steinmetz Empirical Equation for Total Core Loss 129 2.17 Core Losses for Nonsinusoidal Inductor Current 135 2.18 Complex Permeability of Magnetic Materials 136 2.19 Cooling of Magnetic Cores 151 2.20 Summary 152 2.21 References 157 2.22 Review Questions 160 2.23 Problems 161 3 Skin Effect 163 3.1 Introduction 163 3.2 Resistivity of Conductors 164 3.3 Skin Depth 166 3.4 AC-to-DC Winding Resistance Ratio 173 3.5 Skin Effect in Long Single Round Conductor 173 3.6 Current Density in Single Round Conductor 175 3.7 Magnetic Field Intensity for Round Wire 193 3.8 Other Methods of Determining the Round Wire Inductance 195 3.9 Power Loss Density in Round Conductor 200 3.10 Skin Effect in Single Rectangular Plate 204 3.11 Skin Effect in Rectangular Foil Conductor Placed Over Ideal Core 215 3.12 Summary 218 3.13 Appendix 220 3.14 References 222 3.15 Review Questions 223 3.16 Problems 224 4 Proximity Effect 226 4.1 Introduction 226 4.2 Orthogonality of Skin and Proximity Effects 227 4.3 Proximity Effect in Two Parallel Round Conductors 227 4.4 Proximity Effect in Coaxial Cable 228 4.5 Proximity and Skin Effects in Two Parallel Plates 230 4.6 Antiproximity and Skin Effects in Two Parallel Plates 244 4.7 Proximity Effect in Open-Circuit Conductor 249 4.8 Proximity Effect in Multiple-Layer Inductor 250 4.9 Self-Proximity Effect in Rectangular Conductors 256 4.10 Summary 259 4.11 Appendix 260 4.12 References 261 4.13 Review Questions 263 4.14 Problems 263 5 Winding Resistance at High Frequencies 265 5.1 Introduction 265 5.2 Eddy Currents 265 5.3 Magnetic Field Intensity in Multilayer Foil Inductors 266 5.4 Current Density in Multilayer Foil Inductors 274 5.5 Winding Power Loss Density in Individual Foil Layers 278 5.6 Complex Winding Power in nth Layer 281 5.7 Winding Resistance of Individual Foil Layers 282 5.8 Orthogonality of Skin and Proximity for Individual Foil Layers 284 5.9 Optimum Thickness of Individual Foil Layers 286 5.10 Winding Inductance of Individual Layers 291 5.11 Power Loss in All Layers 292 5.12 Impedance of Foil Winding 293 5.13 Resistance of Foil Winding 294 5.14 Dowell’s Equation 294 5.15 Approximation of Dowell’s Equation 298 5.16 Winding AC Resistance with Uniform Foil Thickness 300 5.17 Transformation of Foil Conductor to Rectangular, Square, and Round Conductors 308 5.18 Winding AC Resistance of Rectangular Conductor 309 5.19 Winding Resistance of Square Wire 318 5.20 Winding Resistance of Round Wire 326 5.21 Inductance 335 5.22 Solution for Round Conductor Winding in Cylindrical Coordinates 338 5.23 Litz Wire 338 5.24 Winding Power Loss for Inductor Current with Harmonics 351 5.25 Winding Power Loss of Foil Inductors Conducting DC and Harmonic Currents 364 5.26 Winding Power Loss of Round Wire Inductors Conducting DC and Harmonic Currents 366 5.27 Effective Winding Resistance for Nonsinusoidal Inductor Current 367 5.28 Thermal Effects on Winding Resistance 370 5.29 Thermal Model of Inductors 373 5.30 Summary 374 5.31 Appendix 375 5.32 References 377 5.33 Review Questions 381 5.34 Problems 381 6 Laminated Cores 383 6.1 Introduction 383 6.2 Low-Frequency Eddy-Current Laminated Core Loss 384 6.3 Comparison of Solid and Laminated Cores 389 6.4 Alternative Solution for Low-Frequency Eddy-Current Core Loss 389 6.4.1 Sinusoidal Inductor Voltage 391 6.4.2 Square-Wave Inductor Voltage 393 6.4.3 Rectangular Inductor Voltage 393 6.5 General Solution for Eddy-Current Laminated Core Loss 393 6.6 Summary 408 6.7 References 409 6.8 Review Questions 410 6.9 Problems 411 7 Transformers 412 7.1 Introduction 412 7.2 Transformer Construction 413 7.3 Ideal Transformer 413 7.4 Voltage Polarities and Current Directions in Transformers 416 7.5 Nonideal Transformers 417 7.6 Neumann’s Formula for Mutual Inductance 422 7.7 Mutual Inductance 424 7.8 Magnetizing Inductance 425 7.9 Coupling Coefficient 427 7.10 Leakage Inductance 429 7.11 Dot Convention 432 7.12 Series-Aiding and Series-Opposing Connections 435 7.13 Equivalent T Network 435 7.14 Energy Stored in Coupled Inductors 436 7.15 High-Frequency Transformer Model 437 7.16 Stray Capacitances 438 7.17 Transformer Efficiency 438 7.18 Transformers with Gapped Cores 438 7.19 Multiple-Winding Transformers 439 7.20 Autotransformers 439 7.21 Measurements of Transformer Inductances 440 7.22 Noninterleaved Windings 442 7.23 Interleaved Windings 444 7.24 Wireless Energy Transfer 446 7.25 AC Current Transformers 446 7.26 Saturable Reactors 454 7.27 Transformer Winding Power Losses with Harmonics 455 7.28 Thermal Model of Transformers 464 7.29 Summary 465 7.30 References 467 7.31 Review Questions 470 7.32 Problems 471 8 Integrated Inductors 472 8.1 Introduction 472 8.2 Skin Effect 472 8.3 Resistance of Rectangular Trace with Skin Effect 474 8.4 Inductance of Straight Rectangular Trace 477 8.5 Inductance of Rectangular Trace with Skin Effect 478 8.6 Construction of Integrated Inductors 480 8.7 Meander Inductors 481 8.8 Inductance of Straight Round Conductor 485 8.9 Inductance of Circular Round Wire Loop 486 8.10 Inductance of Two-Parallel Wire Loop 486 8.11 Inductance of Rectangle of Round Wire 486 8.12 Inductance of Polygon Round Wire Loop 486 8.13 Bondwire Inductors 487 8.14 Single-Turn Planar Inductor 488 8.15 Inductance of Planar Square Loop 490 8.16 Planar Spiral Inductors 490 8.17 Multimetal Spiral Inductors 505 8.18 Planar Transformers 506 8.19 MEMS Inductors 507 8.20 Inductance of Coaxial Cable 509 8.21 Inductance of Two-Wire Transmission Line 509 8.22 Eddy Currents in Integrated Inductors 509 8.23 Model of RF-Integrated Inductors 510 8.24 PCB Inductors 512 8.25 Summary 514 8.26 References 515 8.27 Review Questions 518 8.28 Problems 519 9 Self-Capacitance 520 9.1 Introduction 520 9.2 High-Frequency Inductor Model 520 9.3 Self-Capacitance Components 530 9.4 Capacitance of Parallel-Plate Capacitor 531 9.5 Self-Capacitance of Foil Winding Inductors 532 9.6 Capacitance of Two Parallel Round Conductors 533 9.7 Capacitance of Round Conductor and Parallel Conducting Plane 539 9.8 Capacitance of Straight Parallel Wire Pair Over Ground 540 9.9 Capacitance Between Two Parallel Straight Round Conductors with Uniform Charge Density 540 9.10 Capacitance of Cylindrical Capacitor 542 9.11 Self-Capacitance of Single-Layer Inductors 542 9.12 Self-Capacitance of Multilayer Inductors 545 9.13 Self-Capacitance of Single-Layer Inductors 553 9.14 T-to-Y Transformation of Capacitors 557 9.15 Overall Self-Capacitance of Single-Layer Inductor with Core 557 9.16 Measurement of Self-Capacitance 559 9.17 Inductor Impedance 560 9.18 Summary 564 9.19 References 565 9.20 Review Questions 566 9.21 Problems 566 10 Design of Inductors 568 10.1 Introduction 568 10.2 Magnet Wire 569 10.3 Wire Insulation 572 10.4 Restrictions on Inductors 572 10.5 Window Utilization Factor 574 10.6 Temperature Rise of Inductors 581 10.7 Mean Turn Length of Inductors 585 10.8 Area Product Method 586 10.9 Design of AC Inductors 590 10.10 Inductor Design for Buck Converter in CCM 603 10.11 Inductor Design for Buck Converter in DCM Using Ap Method 619 10.12 Core Geometry Coefficient Kg Method 654 10.13 Inductor Design for Buck Converter in CCM Using Kg Method 658 10.14 Inductor Design for Buck Converter in DCM Using Kg Method 660 10.15 Summary 663 10.16 References 664 10.17 Review Questions 666 10.18 Problems 666 11 Design of Transformers 668 11.1 Introduction 668 11.2 Area Product Method 668 11.3 Optimum Flux Density 673 11.4 Area Product Ap for Sinusoidal Voltages 674 11.5 Transformer Design for Flyback Converter in CCM 675 11.6 Transformer Design for Flyback Converter in DCM 689 11.7 Geometrical Coefficient Kg Method 702 11.8 Transformer Design for Flyback Converter in CCM Using Kg Method 705 11.9 Transformer Design for Flyback Converter in DCM Using Kg Method 709 11.10 Summary 714 11.11 References 714 11.12 Review Questions 715 11.13 Problems 715 Appendix A Physical Constants 717 Appendix B Maxwell's Equations 718 Answers to Problems 719 Index 725

Read more less

Book SynopsisUses Verilog HDL to illustrate computer architecture and microprocessor design, allowing readers to readily simulate and adjust the operation of each design, and thus build industrially relevant skills Introduces the computer principles, computer design, and how to use Verilog HDL (Hardware Description Language) to implement the designProvides the skills for designing processor/arithmetic/cpu chips, including the unique application of Verilog HDL material for CPU (central processing unit) implementationDespite the many books on Verilog and computer architecture and microprocessor design, few, if any, use Verilog as a key tool in helping a student to understand these design techniquesA companion website includes color figures, Verilog HDL codes, extra test benches not found in the book, and PDFs of the figures and simulation waveforms for instructorsTable of ContentsList of Figures xv List of Tables xxvii Preface xxix 1 Computer Fundamentals and Performance Evaluation 1 2 A Brief Introduction to Logic Circuits and Verilog HDL 19 3 Computer Arithmetic Algorithms and Implementations 63 4 Instruction Set Architecture and ALU Design 111 5 Single-Cycle CPU Design in Verilog HDL 143 6 Exceptions and Interrupts Handling and Design in Verilog HDL 170 7 Multiple-Cycle CPU Design in Verilog HDL 192 8 Design of Pipelined CPU with Precise Interrupt in Verilog HDL 212 9 Floating-Point Algorithms and FPU Design in Verilog HDL 266 10 Design of Pipelined CPU with FPU in Verilog HDL 323 11 Memory Hierarchy and Virtual Memory Management 353 12 Design of Pipelined CPU with Caches and TLBs in Verilog HDL 386 13 Multithreading CPU and Multicore CPU Design in Verilog HDL 425 14 Input/Output Interface Controller Design in Verilog HDL 443 15 High-Performance Computers and Interconnection Networks 509 Bibliography 536 Index 539

Read more less

Book SynopsisApplies basic field behavior in circuit design anddemonstrates how it relates togrounding and shielding requirements and techniques in circuit design This book connects the fundamentals of electromagnetic theory to the problems of interference in all types of electronic design. The text covers power distribution in facilities, mixing of analog and digital circuitry, circuit board layout at high clock rates, and meeting radiation and susceptibility standards. The author examines the grounding and shielding requirements and techniques in circuit design and applies basic physics to circuit behavior. The sixth edition of this book has been updated with new material added throughout the chapters where appropriate. The presentation of the book has also been rearranged in order to reflect the current trends in the field. Grounding and Shielding: Circuits and Interference, Sixth Edition: Includes new material on vias and field control, capacitTable of ContentsPreface to the Sixth Edition xi A Historical Perspective into Grounding and Shielding xv 1. Voltage and Capacitors 1 1.1. Introduction 1 1.2. Charges and Electrons 4 1.3. The Electric Force Field 6 1.4. Field Representations 6 1.5. The Definition of Voltage 9 1.6. Equipotential Surfaces 10 1.7. The Force Field or E Field Between Two Conducting Plates 11 1.8. Electric Field Patterns 12 1.9. The Energy Stored in An Electric Field 16 1.10. Dielectrics 17 1.11. The D Field 18 1.12. Capacitance 19 1.13. Mutual Capacitance 21 1.14. Displacement Current 22 1.15. Energy Stored in a Capacitor 23 1.16. Forces in the Electric Field 24 1.17. Capacitors 25 1.18. Dielectric Absorption 25 1.19. Resistance of Plane Conductors 26 2. Magnetics 27 2.1. Magnetic Fields 27 2.2. Ampere’s Law 29 2.3. The Solenoid 30 2.4. Faraday’s Law and the Induction Field 30 2.5. The Definition of Inductance 32 2.6. The Energy Stored in an Inductance 32 2.7. Magnetic Field Energy in Space 34 2.8. Electron Drift 36 2.9. The Magnetic Circuit 36 2.10. A Magnetic Circuit with a Gap 38 2.11. Small Inductors 39 2.12. Self- and Mutual Inductance 40 2.13. Transformer Action 40 2.14. Hysteresis and Permeability 45 2.15. Eddy Currents 46 3. Digital Electronics 48 3.1. Introduction 49 3.2. The Transport of Electrical Energy 49 3.3. Transmission Lines–Introduction 50 3.4. Transmission Line Operations 52 3.5. Transmission Line Field Patterns 54 3.6. A Terminated Transmission Line 54 3.7. The Unterminated Transmission Line 56 3.8. A Short Circuit Termination 58 3.9. The Real World 59 3.10. SineWaves Versus Step Voltages 60 3.11. A Bit of History 61 3.12. Ideal Conditions 61 3.13. Reflection and Transmission Coefficients 62 3.14. Taking Energy from an Ideal Energy Source 63 3.15. A Capacitor as a Transmission Line 63 3.16. Decoupling Capacitors and Natural Frequencies 65 3.17. Printed Circuit Boards 66 3.18. Two-Layer Logic Boards 67 3.19. Vias 68 3.20. The Termination of Transmission Lines 70 3.21. Energy in the Ground/Power Plane Capacitance 72 3.22. Poynting’s Vector 73 3.23. Skin Effect 74 3.24. Measurement Problems: Ground Bounce 75 3.25. Balanced Transmission 76 3.26. Ribbon Cable and Connectors 77 3.27. Interfacing Analog and Digital Circuits 78 4. Analog Circuits 80 4.1. Introduction 80 4.2. Instrumentation 81 4.3. History 83 4.4. The Basic Shield Enclosure 83 4.5. The Enclosure and Utility Power 86 4.6. The Two-Ground Problem 88 4.7. Instrumentation and the Two-Ground Problem 89 4.8. Strain-Gauge Instrumentation 92 4.9. The Floating Strain Gauge 93 4.10. The Thermocouple 95 4.11. The Basic Low-Gain Differential Amplifier (Forward Referencing Amplifer) 96 4.12. Shielding in Power Transformers 98 4.13. Calibration and Interference 99 4.14. The Guard Shield Above 100 kHz 100 4.15. Signal Flow Paths in Analog Circuits 101 4.16. Parallel Active Components 101 4.17. Feedback Stability–Introduction 102 4.18. Feedback Theory 103 4.19. Output Loads and Circuit Stability 105 4.20. Feedback Around a Power Stage 105 4.21. Constant Current Loops 106 4.22. Filters and Aliasing Errors 107 4.23. Isolation and DC-To-DC Converters 108 4.24. Charge Converter Basics 110 4.25. DC Power Supplies 113 4.26. Guard Rings 113 4.27. Thermocouple Effects 114 4.28. Some Thoughts on Instrumentation 114 5. Utility Power and Facility Grounding 115 5.1. Introduction 115 5.2. History 116 5.3. Semantics 116 5.4. Utility Power 117 5.5. The Earth as a Conductor 119 5.6. The Neutral Connection to Earth 120 5.7. Ground Potential Differences 122 5.8. Field Coupling to Power Conductors 124 5.9. Neutral Conductors 125 5.10. k Factor in Transformers 126 5.11. Power Factor Correction 127 5.12. Ungrounded Power 127 5.13. A Request for Power 128 5.14. Earth Power Currents 129 5.15. Line Filters 129 5.16. Isolated Grounds 130 5.17. Facility Grounds–Some More History 132 5.18. Ground Planes in Facilities 134 5.19. Other Ground Planes 137 5.20. Ground at Remote Sites 137 5.21. Extending Ground Planes 137 5.22. Lightning 138 5.23. Lightning and Facilities 139 5.24. Lightning Protection for Boats and Ships 141 5.25. Grounding of Boats and Ships at Dock 143 5.26. Aircraft Grounding (Fueling) 144 5.27. Ground Fault Interruption (GFI) 144 5.28. Isolation Transformers 145 5.29. Grounding and the Pacific Intertie 147 5.30. SolarWind 148 6. Radiation 149 6.1. Handling Radiation and Susceptibility 149 6.2. Radiation 150 6.3. SineWaves and Transmission Lines 151 6.4. Approximations for Pulses and SquareWaves 152 6.5. Radiation from Components 156 6.6. The Dipole Antenna 157 6.7. Wave Impedance 158 6.8. Field Strength and Antenna Gain 159 6.9. Radiation from Loops 160 6.10. E-Field Coupling to a Loop 162 6.11. Radiation from Printed Circuit Boards 163 6.12. The Sniffer and the Antenna 164 6.13. Microwave Ovens 165 7. Shielding from Radiation 166 7.1. Cables with Shields 166 7.2. Low-Noise Cables 168 7.3. Transfer Impedance 169 7.4. Waveguides 172 7.5. Electromagnetic Fields over a Ground Plane 173 7.6. Fields and Conductors 174 7.7. Conductive Enclosures–Introduction 175 7.8. Coupling Through EnclosureWalls by an Induction Field 176 7.9. Reflection and Absorption of Field Energy at a Conducting Surface 177 7.10. Independent Apertures 178 7.11. Dependent Apertures 179 7.12. Honeycombs 180 7.13. Summing Field Penetrations 181 7.14. Power Line Filters 182 7.15. Backshell Connectors 184 7.16. H-Field Coupling 186 7.17. Gaskets 186 7.18. Finger Stock 187 7.19. Glass Apertures 188 7.20. Guarding Large Transistors 188 7.21. Mounting Components on Surfaces 188 7.22. Zappers 190 7.23. Shielded and Screen Rooms 190 AppendixA. The Decibel 192 Further Reading 194 Index 195

Read more less

Book SynopsisLinear Circuit Transfer Functions: An introduction to Fast Analytical Techniques teaches readers how to determine transfer functions of linear passive and active circuits by applying Fast Analytical Circuits Techniques. Building on their existing knowledge of classical loop/nodal analysis, the book improves and expands their skills to unveil transfer functions in a swift and efficient manner. Starting with simple examples, the author explains step-by-step how expressing circuits time constants in different configurations leads to writing transfer functions in a compact and insightful way. By learning how to organize numerators and denominators in the fastest possible way, readers will speed-up analysis and predict the frequency response of simple to complex circuits. In some cases, they will be able to derive the final expression by inspection, without writing a line of algebra. Key features: Emphasizes analysis through employing time Table of ContentsAbout the Author ix Preface xi Acknowledgement xiii 1 Electrical Analysis – Terminology and Theorems 1 1.1 Transfer Functions, an Informal Approach 1 1.1.1 Input and Output Ports 3 1.1.2 Different Types of Transfer Function 6 1.2 The Few Tools and Theorems You Did Not Forget . . . 11 1.2.1 The Voltage Divider 11 1.2.2 The Current Divider 12 1.2.3 Thévenin’s Theorem at Work 14 1.2.4 Norton’s Theorem at Work 19 1.3 What Should I Retain from this Chapter? 25 1.4 Appendix 1A – Finding Output Impedance/Resistance 26 1.5 Appendix 1B – Problems 37 Answers 39 2 Transfer Functions 41 2.1 Linear Systems 41 2.1.1 A Linear Time-invariant System 43 2.1.2 The Need for Linearization 43 2.2 Time Constants 44 2.2.1 Time Constant Involving an Inductor 47 2.3 Transfer Functions 49 2.3.1 Low-entropy Expressions 54 2.3.2 Higher Order Expressions 59 2.3.3 Second-order Polynomial Forms 60 2.3.4 Low-Q Approximation for a 2nd-order Polynomial 62 2.3.5 Approximation for a 3rd-order Polynomial 68 2.3.6 How to Determine the Order of the System? 69 2.3.7 Zeros in the Network 76 2.4 First Step Towards a Generalized 1st-order Transfer Function 78 2.4.1 Solving 1st-order Circuits with Ease, Three Examples 82 2.4.2 Obtaining the Zero with the Null Double Injection 89 2.4.3 Checking Zeros Obtained in Null Double Injection with SPICE 94 2.4.4 Network Excitation 95 2.5 What Should I Retain from this Chapter? 100 References 101 2.6 Appendix 2A – Problems 102 Answers 105 3 Superposition and the Extra Element Theorem 116 3.1 The Superposition Theorem 116 3.1.1 A Two-input/Two-output System 120 3.2 The Extra Element Theorem 126 3.2.1 The EET at Work on Simple Circuits 130 3.2.2 The EET at Work – Example 2 132 3.2.3 The EET at Work – Example 3 137 3.2.4 The EET at Work – Example 4 138 3.2.5 The EET at Work – Example 5 140 3.2.6 The EET at Work – Example 6 146 3.2.7 Inverted Pole and Zero Notation 150 3.3 A Generalized Transfer Function for 1st-order Systems 153 3.3.1 Generalized Transfer Function – Example 1 156 3.3.2 Generalized Transfer Function – Example 2 159 3.3.3 Generalized Transfer Function – Example 3 163 3.3.4 Generalized Transfer Function – Example 4 170 3.3.5 Generalized Transfer Function – Example 5 174 3.4 Further Reading 180 3.5 What Should I Retain from this Chapter? 180 References 182 3.6 Appendix 3A – Problems 183 Answers 185 References 218 4 Second-order Transfer Functions 219 4.1 Applying the Extra Element Theorem Twice 219 4.1.1 Low-entropy 2nd-order Expressions 227 4.1.2 Determining the Zero Positions 231 4.1.3 Rearranging and Plotting Expressions 233 4.1.4 Example 1 – A Low-Pass Filter 235 4.1.5 Example 2 – A Two-capacitor Filter 241 4.1.6 Example 3 – A Two-capacitor Band-stop Filter 245 4.1.7 Example 4 – An LC Notch Filter 248 4.2 A Generalized Transfer Function for 2nd-Order Systems 255 4.2.1 Inferring the Presence of Zeros in the Circuit 256 4.2.2 Generalized 2nd–order Transfer Function – Example 1 257 4.2.3 Generalized 2nd–order Transfer Function – Example 2 262 4.2.4 Generalized 2nd–order Transfer Function – Example 3 266 4.2.5 Generalized 2nd–order Transfer Function – Example 4 273 4.3 What Should I Retain from this Chapter ? 277 References 279 4.4 Appendix 4A – Problems 279 Answers 282 References 311 5 Nth-order Transfer Functions 312 5.1 From the 2EET to the NEET 312 5.1.1 3rd-order Transfer Function Example 317 5.1.2 Transfer Functions with Zeros 320 5.1.3 A Generalized Nth-order Transfer Function 327 5.2 Five High-order Transfer Functions Examples 335 5.2.1 Example 2: A 3rd-order Active Notch Circuit 341 5.2.2 Example 3: A 4th-order LC Passive Filter 349 5.2.3 Example 4: A 4th-order Band-pass Active Filter 355 5.2.4 Example 5: A 3rd-order Low-pass Active GIC Filter 368 5.3 What Should I Retain from this Chapter ? 383 References 385 5.5 Appendix 5A – Problems 385 Answers 388 References 431 Conclusion 433 Glossary of Terms 435 Index 439

Read more less

Book SynopsisThoroughly revised and expanded to help readers systematically increase their knowledge and insight about Sigma-Delta Modulators Sigma-Delta Modulators (SDMs) have become one of the best choices for the implementation of analog/digital interfaces of electronic systems integrated in CMOS technologies. Compared to other kinds of Analog-to-Digital Converters (ADCs), S?Ms cover one of the widest conversion regions of the resolution-versus-bandwidth plane, being the most efficient solution to digitize signals in an increasingly number of applications, which span from high-resolution low-bandwidth digital audio, sensor interfaces, and instrumentation, to ultra-low power biomedical systems and medium-resolution broadband wireless communications. Following the spirit of its first edition, Sigma-Delta Converters: Practical Design Guide, 2nd Edition takes a comprehensive look at SDMs, their diverse types of architectures, circuit techniques, analysis synthesis methTable of ContentsPreface xix Acknowledgements xxv List of Abbreviations xxvii 1 Introduction to 𝚺𝚫 Modulators: Fundamentals, Basic Architecture and Performance Metrics 1 1.1 Basics of Analog-to-Digital Conversion 2 1.1.1 Sampling 3 1.1.2 Quantization 4 1.1.3 Quantization White Noise Model 5 1.1.4 Noise Shaping 8 1.2 Sigma-Delta Modulation 9 1.2.1 From Noise-shaped Systems to ΣΔ Modulators 10 1.2.2 Performance Metrics of ΣΔMs 11 1.3 The First-order ΣΔ Modulator 13 1.4 Performance Enhancement and Taxonomy of ΣΔMs 16 1.4.1 ΣΔM System-level Design Parameters and Strategies 17 1.4.2 Classification of ΣΔMs 18 1.5 Putting All The Pieces Together: From ΣΔMs to ΣΔ ADCs 19 1.5.1 Some Words about ΣΔ Decimators 20 1.6 ΣΔ DACs 22 1.6.1 System Design Trade-offs and Signal Processing in ΣΔ DACs 22 1.6.2 Implementation of Digital ΣΔMs used in DACs 24 1.7 Summary 25 References 26 2 Taxonomy of 𝚺𝚫 Architectures 29 2.1 Second-order ΣΔ Modulators 30 2.1.1 Alternative Representations of Second-order ΣΔMs 31 2.1.2 Second-Order ΣΔM with Unity STF 34 2.2 High-order Single-loop ΣΔMs 35 2.3 Cascade ΣΔ Modulators 39 2.3.1 SMASH ΣΔM Architectures 46 2.4 Multi-bit ΣΔ Modulators 49 2.4.1 Influence of Multi-bit DAC Errors 49 2.4.2 Dynamic Element Matching Techniques 50 2.4.3 Dual Quantization 53 2.4.3.1 Dual-quantization Single-loop ΣΔMs 53 2.4.3.2 Dual-quantization Cascade ΣΔMs 54 2.5 Band-pass ΣΔ Modulators 55 2.5.1 Quadrature BP-ΣΔMs 56 2.5.2 The z → −z2 LP–BP Transformation 58 2.5.3 BP-ΣΔMs with Optimized NTF 58 2.5.4 Time-interleaved and Polyphase BP-ΣΔMs 61 2.6 Continuous-time ΣΔ Modulators: Architecture and Basic Concepts 64 2.6.1 An Intuitive Analysis of CT-ΣΔMs 66 2.6.2 Some Words about Alias Rejection in CT-ΣΔMs 69 2.7 DT–CT Transformation of ΣΔMs 70 2.7.1 The Impulse-invariant Transformation 70 2.7.2 DT–CT Transformation of a Second-order ΣΔM 72 2.8 Direct Synthesis of CT-ΣΔMs 74 2.9 Summary 76 References 76 3 Circuit Errors in Switched-capacitor 𝚺𝚫 Modulators 83 3.1 Overview of Nonidealities in Switched-capacitor ΣΔ Modulators 84 3.2 Finite Amplifier Gain in SC-ΣΔMs 86 3.3 Capacitor Mismatch in SC-ΣΔMs 90 3.4 Integrator Settling Error in SC-ΣΔMs 91 3.4.1 Behavioral Model for the Integrator Settling 91 3.4.2 Linear Effect of Finite Amplifier Gain–Bandwidth Product 95 3.4.3 Nonlinear Effect of Finite Amplifier Slew Rate 98 3.4.4 Effect of Finite Switch On-resistance 100 3.5 Circuit Noise in SC-ΣΔMs 101 3.6 Clock Jitter in SC-ΣΔMs 105 3.7 Sources of Distortion in SC-ΣΔMs 107 3.7.1 Nonlinear Amplifier Gain 107 3.7.2 Nonlinear Switch On-Resistance 109 3.8 Case Study: High-level Sizing of a ΣΔM 111 3.8.1 Ideal Modulator Performance 111 3.8.2 Noise Leakages 112 3.8.3 Circuit Noise 115 3.8.4 Settling Error 116 3.8.5 Overall High-Level Sizing and Noise Budget 117 3.9 Summary 119 References 119 4 Circuit Errors and Compensation Techniques in Continuous-time 𝚺𝚫 Modulators 123 4.1 Overview of Nonidealities in Continuous-time ΣΔ Modulators 123 4.2 CT Integrators and Resonators 124 4.3 Finite Amplifier Gain in CT-ΣΔMs 126 4.4 Time-constant Error in CT-ΣΔMs 128 4.5 Finite Integrator Dynamics in CT-ΣΔMs 130 4.5.1 Effect of Finite Gain–Bandwidth Product on CT-ΣΔMs 131 4.5.2 Effect of Finite Slew Rate on CT-ΣΔMs 133 4.6 Sources of Distortion in CT-ΣΔMs 134 4.6.1 Nonlinearities in the Front-end Integrator 134 4.6.2 Intersymbol Interference in the Feedback DAC 136 4.7 Circuit Noise in CT-ΣΔMs 137 4.7.1 Noise Analysis Considering NRZ Feedback DACs 137 4.7.2 Noise Analysis Considering SC Feedback DACs 139 4.8 Clock Jitter in CT-ΣΔMs 140 4.8.1 Jitter in Return-to-zero DACs 141 4.8.2 Jitter in Non-return-to-zero DACs 142 4.8.3 Jitter in Switched-capacitor DACs 144 4.8.4 Lingering Effect of Clock Jitter Error 145 4.8.5 Reducing the Effect of Clock Jitter with FIR and Sine-shaped DACs 147 4.9 Excess Loop Delay in CT-ΣΔMs 149 4.9.1 Intuitive Analysis of ELD 149 4.9.2 Analysis of ELD based on Impulse-invariant DT-CT Transformation 151 4.9.3 Alternative ELD Compensation Techniques 154 4.10 Quantizer Metastability in CT-ΣΔMs 155 4.11 Summary 159 References 160 5 Behavioral Modeling and High-level Simulation 165 5.1 Systematic Design Methodology of ΣΔ Modulators 165 5.1.1 System Partitioning and Abstraction Levels 167 5.1.2 Sizing Process 167 5.2 Simulation Approaches for the High-level Evaluation of ΣΔMs 169 5.2.1 Alternatives to Transistor-level Simulation 169 5.2.2 Event-driven Behavioral Simulation Technique 171 5.2.3 Programming Languages and Behavioral Modeling Platforms 172 5.3 Implementing ΣΔM Behavioral Models 173 5.3.1 From Circuit Analysis to Computational Algorithms 173 5.3.2 Time-domain versus Frequency-domain Behavioral Models 175 5.3.3 Implementing Time-domain Behavioral Models in MATLAB 178 5.3.4 Building Time-domain Behavioral Models as SIMULINK C-MEX S-functions 182 5.4 Efficient Behavioral Modeling of ΣΔM Building Blocks using C-MEX S-functions 188 5.4.1 Modeling of SC Integrators using S-functions 188 5.4.1.1 Capacitor Mismatch and Nonlinearity 190 5.4.1.2 Input-referred Thermal Noise 191 5.4.1.3 Switch On-resistance Dynamics 194 5.4.1.4 Incomplete Settling Error 197 5.4.2 Modeling of CT Integrators using S-functions 200 5.4.2.1 Single-pole Gm-C Model 200 5.4.2.2 Two-pole Dynamics Model 201 5.4.2.3 Modeling Transconductors as S-functions 203 5.4.3 Behavioral Modeling of Quantizers using S-functions 205 5.4.3.1 Modeling Multi-level ADCs as S-functions 205 5.4.3.2 Modeling Multi-level DACs as S-functions 207 5.5 SIMSIDES: A SIMULINK-based Behavioral Simulator for ΣΔMs 209 5.5.1 Model Libraries Included in SIMSIDES 210 5.5.2 Structure of SIMSIDES and its User Interface 211 5.5.2.1 Creating a New ΣΔM Block Diagram 212 5.5.2.2 Setting Model Parameters 215 5.5.2.3 Simulation Analyses 215 5.6 Using SIMSIDES for High-level Sizing and Verification of ΣΔMs 216 5.6.1 SC Second-order Single-Bit ΣΔM 216 5.6.1.1 Effect of Amplifier Finite DC Gain 218 5.6.1.2 Effect of Thermal Noise 218 5.6.1.3 Effect of the Incomplete Settling Error 220 5.6.1.4 Cumulative Effect of All Errors 221 5.6.2 CT Fifth-order Cascade 3-2 Multi-bit ΣΔM 224 5.6.2.1 Effect of Nonideal Effects 227 5.6.2.2 High-level Synthesis and Verification 229 5.7 Summary 231 References 231 6 Automated Design and Optimization of 𝚺𝚫Ms 235 6.1 Architecture Exploration and Selection: Schreier’s Toolbox 236 6.1.1 Basic Functions of Schreier’s Delta-Sigma Toolbox 236 6.1.2 Synthesis of a Fourth-order CRFF LP/BP SC-ΣΔM with Tunable Notch 238 6.1.3 Synthesis of a Fourth-order BP CT-ΣΔM with Tunable Notch 240 6.2 Optimization-based High-level Synthesis of ΣΔ Modulators 245 6.2.1 Combining Behavioral Simulation and Optimization 246 6.2.2 Using Simulated Annealing as Optimization Engine 247 6.2.3 Combining SIMSIDES with MATLAB Optimizers 253 6.3 Lifting Method and Hardware Acceleration to Optimize CT-ΣΔMs 255 6.3.1 Hardware Emulation of CT-ΣΔMs on an FPGA 257 6.3.2 GPU-accelerated Computing of CT-ΣΔMs 258 6.4 Using Multi-objective Evolutionary Algorithms to Optimize ΣΔMs 259 6.4.1 Combining MOEA with SIMSIDES 261 6.4.2 Applying MOEA and SIMSIDES to the Synthesis of CT-ΣΔMs 262 6.5 Summary 269 References 269 7 Electrical Design of 𝚺𝚫Ms: From Systems to Circuits 271 7.1 Macromodeling ΣΔMs 272 7.1.1 SC Integrator Macromodel 272 7.1.1.1 Switch Macromodel 272 7.1.1.2 OTA Macromodel 274 7.1.2 CT Integrator Macromodel 274 7.1.2.1 Active-RC Integrators 274 7.1.2.2 Gm-C Integrators 274 7.1.3 Nonlinear OTA Transconductor 275 7.1.4 Embedded Flash ADC Macromodel 276 7.1.5 Feedback DAC Macromodel 277 7.2 Examples of ΣΔM Macromodels 279 7.2.1 SC Second-order Example 279 7.2.2 Second-order Active-RC ΣΔM 283 7.3 Including Noise in Transient Electrical Simulations of ΣΔMs 286 7.3.1 Generating and Injecting Noise Data Sequences in HSPICE 287 7.3.2 Analyzing the Impact of the Main Noise Sources in SC Integrators 289 7.3.3 Generating and Injecting Flicker Noise Sources in Electrical Simulations 289 7.3.4 Test Bench to Include Noise in the Simulation of ΣΔMs 293 7.4 Processing ΣΔM Output Results of Electrical Simulations 294 7.5 Summary 298 References 298 8 Design Considerations of 𝚺𝚫M Subcircuits 301 8.1 Design Considerations of CMOS Switches 302 8.1.1 Trade-Off Between Ron and the CMOS Switch Drain/Source Parasitic Capacitances 302 8.1.2 Characterizing the Nonlinear Behavior of Ron 302 8.1.3 Influence of Technology Downscaling on the Design of Switches 304 8.1.4 Evaluating Harmonic Distortion due to CMOS Switches 305 8.2 Design Considerations of Operational Amplifiers 308 8.2.1 Typical Amplifier Topologies 309 8.2.2 Common-mode Feedback Networks 311 8.2.3 Characterization of the Amplifier in AC 313 8.2.4 Characterization of the Amplifier in DC 313 8.2.5 Characterization of the Amplifier Gain Nonlinearity 316 8.3 Design Considerations of Transconductors 317 8.3.1 Highly Linear Front-end Transconductor 318 8.3.2 Loop-filter Transconductors 320 8.3.3 Widely Programmable Transconductors 323 8.4 Design Considerations of Comparators 324 8.4.1 Regenerative Latch-based Comparators 325 8.4.2 Design Guidelines of Comparators 327 8.4.3 Characterization of Offset and Hysteresis Based on the Input-ramp Method 328 8.4.4 Characterization of Offset and Hysteresis Based on the Bisectional Method 328 8.4.5 Characterizing the Comparison Time 330 8.5 Design Considerations of Current-Steering DACs 332 8.5.1 Fundamentals and Basic Concepts of CS DACs 333 8.5.2 Practical Realization of CS DACs 333 8.5.3 Current Cell Circuits, Error Limitations, and Design Criteria 336 8.5.4 CS 4-bit DAC Example 336 8.6 Summary 338 References 338 9 Practical Realization of 𝚺𝚫Ms: From Circuits to Chips 341 9.1 Auxiliary ΣΔM Building Blocks 341 9.1.1 Clock-phase Generators 342 9.1.1.1 Phase Generation 342 9.1.1.2 Phase Buffering 342 9.1.1.3 Phase Distribution 344 9.1.2 Generation of Common-mode Voltage, Reference Voltage, and Bias Currents 345 9.1.2.1 Bandgap Circuit 345 9.1.2.2 Reference Voltage Generator 345 9.1.2.3 Master Bias Current Generator 346 9.1.2.4 Common-mode Voltage Generator 346 9.1.3 Additional Digital Logic 347 9.2 Layout Design, Floorplanning, and Practical Issues 348 9.2.1 Layout Floorplanning 348 9.2.1.1 Divide Layout into Different Parts or Regions 348 9.2.1.2 Shield Sensitive ΣΔM Analog Subcircuits from Switching Noise 349 9.2.1.3 Buses to Distribute Signals Shared by Different ΣΔM Parts 349 9.2.1.4 Be Obsessive about Layout Symmetry and Details of Analog Parts 349 9.2.2 I/O Pad Ring 350 9.2.3 Importance of Layout Verification and Catastrophic Failure 350 9.3 Chip Package, Test PCB, and Experimental Setup 354 9.3.1 Bonding Diagram and Package 354 9.3.2 Test PCB 355 9.4 Experimental Test Set-Up 355 9.4.1 Planning the Type and Number of Instruments Needed 357 9.4.2 Connecting Lab Instruments 357 9.4.3 Measurement Set-Up Example 358 9.5 ΣΔM Design Examples and Case Studies 359 9.5.1 Programmable-gain ΣΔMs for High Dynamic Range Sensor Interfaces 360 9.5.1.1 Main Design Criteria and Performance Limitations 361 9.5.1.2 SC Realization with Programmable Gain and Double Sampling 362 9.5.1.3 Influence of Chopper Frequency on Flicker Noise 362 9.5.2 Reconfigurable SC-ΣΔMs for Multi-standard Direct Conversion Receivers 364 9.5.2.1 Power-scaling Circuit Techniques 367 9.5.2.2 Experimental Results 368 9.5.3 Using Widely-programmable Gm-LC BP-ΣΔMs for RF Digitizers 368 9.5.3.1 Application Scenario 371 9.5.3.2 Gm-LC BP-ΣΔM High-level Sizing 371 9.5.3.3 BP CT-ΣΔM Loop-Filter Reconfiguration Techniques 375 9.5.3.4 Embedded 4-bit Quantizer with Calibration 378 9.5.3.5 Biasing, Digital Control Programmability and Testability 382 9.6 Summary 385 References 386 10 Frontiers, Trends and Challenges: Towards Next-generation 𝚺𝚫 Modulators 389 10.1 State-of-the-Art ADCs: Nyquist-rate versus ΣΔ Converters 390 10.1.1 Conversion Energy 391 10.1.2 Figures of Merit 392 10.2 Comparison of Different Categories of ΣΔ ADCs 393 10.2.1 Aperture Plot of ΣΔMs 406 10.2.2 Energy Plot of ΣΔMs 407 10.3 Empirical and Statistical Analysis of State-of-the-Art ΣΔMs 408 10.3.1 SC versus CT ΣΔMs 408 10.3.2 Technology used in State-of-the-Art ΣΔMs 410 10.3.3 Single-Loop versus Cascade ΣΔMs 410 10.3.4 Single-bit versus Multi-bit ΣΔMs 411 10.3.5 Low-pass versus Band-pass ΣΔMs 413 10.3.6 Emerging ΣΔM Techniques 415 10.4 Gigahertz-range ΣΔMs for RF-to-digital Conversion 415 10.5 Enhanced Cascade ΣΔMs 418 10.5.1 SMASH CT-ΣΔMs 418 10.5.2 Two-stage 0-L MASH 419 10.5.3 Stage-sharing Cascade ΣΔMs 420 10.5.4 Multi-rate and Hybrid CT/DT ΣΔMs 420 10.5.4.1 Upsampling Cascade MR-ΣΔMs 421 10.5.4.2 Downsampling Hybrid CT/DT Cascade MR-ΣΔMs 422 10.6 Power-efficient ΣΔM Loop-filter Techniques 423 10.6.1 Inverter-based ΣΔMs 423 10.6.2 Hybrid Active/Passive and Amplifier-less ΣΔMs 424 10.6.3 Power-efficient Amplifier Techniques 426 10.7 Hybrid ΣΔM/Nyquist-rate ADCs 428 10.7.1 Multi-bit ΣΔM Quantizers based on Nyquist-rate ADCs 428 10.7.2 Incremental ΣΔ ADCs 429 10.8 Time-based ΣΔ ADCs 431 10.8.1 ΣΔMs with VCO/PWM-based Quantization 432 10.8.2 Scaling-friendly Mostly-digital ΣΔMs 433 10.8.3 GRO-based ΣΔMs 434 10.9 DAC Techniques for High-performance CT-ΣΔMs 436 10.10 Classification of State-of-the-Art References 437 10.11 Summary and Conclusions 437 References 438 A State-space Analysis of Clock Jitter in CT-𝚺𝚫Ms 463 A.1 State-space Representation of NTF (z) 463 A.2 Expectation Value of (Δqn)2 465 A.3 In-band Noise Power due to Clock Jitter 466 References 467 B SIMSIDES User Guide 469 B.1 Getting Started: Installing and Running SIMSIDES 470 B.2 Building and Editing ΣΔM Architectures in SIMSIDES 470 B.3 Analyzing ΣΔMs in SIMSIDES 473 B.3.1 Node Spectrum Analysis 474 B.3.2 Integrated Power Noise 474 B.3.3 SNR/SNDR 475 B.3.4 Harmonic Distortion 475 B.3.5 Integral and Differential Non-Linearity 477 B.3.6 Multi-tone Power Ratio 477 B.3.7 Histogram 478 B.3.8 Parametric Analysis 478 B.3.9 Monte Carlo Analysis 479 B.4 Optimization Interface 480 B.5 Tutorial Example: Using SIMSIDES to Model and Analyze ΣΔMs 482 B.5.1 Creating the Cascade 2-1 ΣΔM Block Diagram in SIMSIDES 482 B.5.2 Setting Model Parameters 482 B.5.3 Computing the Output Spectrum 484 B.5.4 SNR versus Input Amplitude Level 486 B.5.5 Parametric Analysis Considering Only One Parameter 487 B.5.6 Parametric Analysis Considering Two Parameters 488 B.5.7 Computing Histograms 489 B.6 Getting Help 489 C SIMSIDES Block Libraries and Models 491 C.1 Overview of SIMSIDES Libraries 491 C.2 Ideal Libraries 492 C.2.1 Ideal Integrators 492 C.2.1.1 Building-block Model Purpose and Description 492 C.2.1.2 Model Parameters 493 C.2.2 Ideal Resonators 493 C.2.2.1 Ideal_LD_Resonator 493 C.2.2.2 Ideal_FE_Resonator 493 C.2.2.3 Ideal_CT_Resonator 493 C.2.3 Ideal Quantizers 494 C.2.3.1 Ideal_Comparator 494 C.2.3.2 Ideal_Comparator_for_SI 495 C.2.3.3 Ideal_Multibit_Quantizer 495 C.2.3.4 Ideal_Multibit_Quantizer_for_SI 496 C.2.3.5 Ideal_Multibit_Quantizer_levels 496 C.2.3.6 Ideal_Multibit_Quantizer_levels_SD2 496 C.2.3.7 Ideal_Sampler 496 C.2.4 Ideal D/A Converters 496 C.2.4.1 Ideal_DAC_for_SI 496 C.2.4.2 Ideal_DAC_dig_level_SD2 497 C.3 Real SC Building-Block Libraries 497 C.3.1 Real SC Integrators 497 C.3.2 Real SC Resonators 501 C.4 Real SI Building-Block Libraries 503 C.4.1 Real SI Integrators 503 C.4.2 Real SI Resonators 505 C.4.3 SI Errors and Model Parameters 506 C.4.3.1 Basic_SI_FE(LD)_Integrator and Basic_SI_FE(LD)_Resonator 506 C.4.3.2 SI_FE(LD)_Int_Finite_Conductance 507 C.4.3.3 SI_FE(LD)_Int_Finite_Conductance & Settling & ChargeInjection 508 C.5 Real CT Building-Block Libraries 508 C.5.1 Real CT Integrators 508 C.5.1.1 Model Parameters used in Transconductors and Gm-C Integrator Building Blocks 511 C.5.1.2 Gm-MC Integrators 511 C.5.1.3 Active-RC Integrators 512 C.5.1.4 MOSFET-C Integrators 513 C.5.2 Real CT Resonators 513 C.5.2.1 Gm-C Resonators 514 C.5.2.2 Gm-LC Resonators 517 C.6 Real Quantizers & Comparators 517 C.7 Real D/A Converters 518 C.8 Auxiliary Blocks 519 Index 523

Read more less

Book SynopsisA hands-on introduction to FPGA prototyping and SoC design This Second Edition of the popular book follows the same learning-by-doing approach to teach the fundamentals and practices of VHDL synthesis and FPGA prototyping. It uses a coherent series of examples to demonstrate the process to develop sophisticated digital circuits and IP (intellectual property) cores, integrate them into an SoC (system on a chip) framework, realize the system on an FPGA prototyping board, and verify the hardware and software operation. The examples start with simple gate-level circuits, progress gradually through the RT (register transfer) level modules, and lead to a functional embedded system with custom I/O peripherals and hardware accelerators. Although it is an introductory text, the examples are developed in a rigorous manner, and the derivations follow strict design guidelines and coding practices used for large, complex digital systems. The new edition is completely Table of ContentsPreface ix Acknowledgments xv PART I BASIC DIGITAL CIRCUITS DEVELOPMENT 1 Gate-level Combinational Circuit 1 1.1 Overview of VHDL 1 1.2 General description 2 1.3 Structural description 6 1.4 Top-level signal mapping 8 1.5 Testbench 9 1.6 Bibliographic notes 11 1.7 Suggested experiments 11 2 Overview of FPGA and EDA software 13 2.1 FPGA 13 2.2 Overview of the Digilent Nexys 4 DDR board 15 2.3 Development flow 16 2.4 Xilinx Vivado Design Suite 18 2.5 Bibliographic notes 18 2.6 Suggested experiments 18 3 RT-level combinational circuit 23 3.1 RT-level components 23 3.2 Routing circuit with concurrent assignment statements 29 3.3 Modeling with a process 34 3.4 Routing circuit with if and case statements 36 3.5 Constants and generics 41 3.6 Replicated structure 44 3.7 Design examples 46 3.8 Bibliographic notes 58 3.9 Suggested experiments 58 4 Regular Sequential Circuit 61 4.1 Introduction 61 4.2 HDL code of the FF and register 64 4.3 Simple design examples 67 4.4 Testbench for sequential circuits 72 4.5 Case study 75 4.6 Timing and clocking 87 4.7 Bibliographic notes 90 4.8 Suggested experiments 90 5 FSM 93 5.1 Introduction 93 5.2 FSM code development 97 5.3 Design examples 100 5.4 Bibliographic notes 110 5.5 Suggested experiments 110 6 FSMD 113 6.1 Introduction 113 6.2 Code development of an FSMD 119 6.3 Design examples 125 6.4 Bibliographic notes 140 6.5 Suggested experiments 141 7 RAM and Buffer of FPGA 145 7.1 Embedded memory of FPGA device 145 7.2 General description for RAM-like component 147 7.3 FIFO buffer 153 7.4 HDL templates for memory inference 158 7.5 Overview of memory controller 164 7.6 Bibliographic notes 166 7.7 Suggested experiments 166 PART II EMBEDDED SOC I: VANILLA FPRO SYSTEM 8 Overview of Embedded SoC Systems 171 8.1 Embedded SoC 171 8.2 Development Flow of Embedded SoC 173 8.3 FPro SoC Platform 176 8.4 Adaption on Digilent Nexys 4 DDR board 180 8.5 Portability 182 8.6 Organization 184 8.7 Bibliographic notes 184 9 Bare Metal System Software Development 187 9.1 Bare metal system development overview 187 9.2 Memory-mapped I/O 189 9.3 Direct I/O Register Access 191 9.4 Robust I/O Register Access 193 9.5 Techniques for low-level I/O operations 197 9.6 Device Drivers 199 9.7 FPro Utility Routines and Directory Structure 204 9.8 Test program 208 9.9 Bibliographic notes 211 9.10 Suggested experiments 211 10 FPro Bus Protocol and MMIO Slot Specification 213 10.1 FPro Bus 213 10.2 Interface with bus 216 10.3 MMIO I/O core 222 10.4 Timer core development 226 10.5 MMIO controller 229 10.6 MCS I/O bus and bridge 234 10.7 Vanilla FPRO System Construction 238 10.8 Bibliographic notes 240 10.9 Suggested experiments 240 11 UART Core 243 11.1 Introduction 243 11.2 UART Construction 245 11.3 UART core development 253 11.4 UART driver 256 11.5 Additional Project Ideas 262 11.6 Bibliographic notes 265 11.7 Suggested experiments 266 PART III EMBEDDED SOC II: BASIC I/O CORES 12 Xilinx XADC Core 271 12.1 Overview of XADC 271 12.2 XADC core development 273 12.3 XADC core device driver 278 12.4 Sampler FPro System 281 12.5 Additional Project Ideas 291 12.6 Bibliographic notes 292 12.7 Suggested experiments 292 13 Pulse Width Modulation Core 295 13.1 Introduction 295 13.2 PWM Design 296 13.3 PWM core development 299 13.4 PWM driver 302 13.5 Testing 303 13.6 Project ideas 304 13.7 Suggested experiments 305 14 Debouncing core and LED-Mux Core 307 14.1 Debouncing Core 307 14.2 LED-Mux Core 313 14.3 Project Ideas 319 14.4 Suggested Experiments 320 15 SPI Core 323 15.1 Overview 323 15.3 SPI Core Development 333 15.4 SPI Driver 336 15.5 Test 338 15.6 Project Ideas 341 15.7 Bibliographic notes 342 15.8 Suggested Experiments 342 16 I2C Core 347 16.1 Overview 347 16.2 I2C Controller 350 16.3 I2C Core Development 360 16.4 I2C Driver 361 16.5 Test 365 16.6 Project Idea 366 16.7 Bibliographic notes 367 16.8 Suggested experiments 367 17 PS2 Core 371 17.1 Introduction 371 17.2 PS2 Controller 373 17.3 PS2 core development 383 17.4 PS2 driver 384 17.5 Test 393 17.6 Bibliographic notes 394 17.7 Suggested experiments 394 18 Sound I: DDFS Core 397 18.1 Introduction 397 18.2 Design and implementation 397 18.3 Fixed-point arithmetic 400 18.4 DDFS Construction 402 18.5 DAC (digital-to-analog converter) 404 18.6 DDFS core development 407 18.7 DDFS driver 409 18.8 Testing 412 18.9 Bibliographic notes 413 18.10 Suggested experiments 413 19 Sound II: ADSR Core 415 19.1 Introduction 415 19.2 ADSR envelope generator 416 19.3 ADSR core development 421 19.4 ADRS driver 423 19.5 Testing 429 19.6 Project Idea 430 19.7 Bibliographic notes 431 19.8 Suggested experiments 431 PART IV EMBEDDED SOC III: VIDEO CORES 20 Introduction to Video System 435 20.1 Introduction to a video display 435 20.2 Stream interface 437 20.3 VGA Synchronization 439 20.4 Bar test-pattern generator 448 20.5 Color-to-grayscale conversion circuit 449 20.6 Demo video system 451 20.7 Advanced video standards 452 20.8 Bibliographic notes 453 20.9 Suggested experiments 454 21 FPro Video Subsystem 457 21.1 Organization of video subsystem 457 21.2 FPro video IP core 461 21.3 Example video cores 466 21.4 FPro video synchronization core 470 21.5 Daisy video subsystem 479 21.6 Vanilla daisy FPro system 486 21.7 Video driver and testing program 490 21.8 Bibliographic notes 493 21.9 Suggested experiments 493 22 Sprite Core 497 22.1 Introduction 497 22.2 Basic design 498 22.3 Mouse pointer core 500 22.4 “Ghost” character core 505 22.5 Sprite core driver and testing program 513 22.6 Bibliographic notes 516 22.7 Suggested experiments 516 23 On-Screen-Display Core 519 23.1 Introduction to tile graphics 519 23.2 Basic OSD design 521 23.3 OSD core 524 23.4 OSD core driver and testing program 530 23.5 Bibliographic notes 532 23.6 Suggested experiments 532 24 VGA Frame Buffer Core 535 24.1 Overview 535 24.2 Frame buffer core 536 24.3 Register map 540 24.4 Driver and testing program 542 543 24.5 Project Ideas 545 24.6 Bibliographic notes 547 24.7 Suggested experiments 547 PART V EPILOGUE 25 What Next 553 References 557 Appendix A: Tutorials 561 A.1 Overview of Xilinx Vivado IDE 561 A.2 Short tutorial on Vivado hardware development 565 A.3 Short tutorial on Vivado simulation 570 A.4 Tutorial on IP instantiation 574 A.5 Short tutorial on FPro system development 580 A.6 Bibliographic notes 587 Topic Index 589

Read more less

Book SynopsisA concise and original presentation of the fundamentals for new to the subject electrical engineers This book has been written for students on electrical engineering courses who don t necessarily possess prior knowledge of electrical circuits.Table of ContentsImportant Units xi Conventions with Examples xiii Preface xv About the Companion Website xix 1 Introduction 1 1.1 Circuits and Important Quantities 1 1.1.1 Electric Charge 1 1.1.2 Electric Potential (Voltage) 3 1.1.3 Electric Current 4 1.1.4 Electric Voltage and Current in Electrical Circuits 5 1.1.5 Electric Energy and Power of a Component 6 1.1.6 dc and AC Signals 7 1.1.7 Transient State and Steady State 8 1.1.8 Frequency in Circuits 9 1.2 Resistance and Resistors 9 1.2.1 Current Types, Conductance, and Ohm’s Law 10 1.2.2 Good Conductors and Insulators 10 1.2.3 Semiconductors 11 1.2.4 Superconductivity and Perfect Conductivity 11 1.2.5 Resistors as Circuit Components 12 1.3 Independent Sources 13 1.4 Dependent Sources 14 1.5 Basic Connections of Components 15 1.6 Limitations in Circuit Analysis 19 1.7 What You Need to Know before You Continue 20 2 Basic Tools: Kirchhoff’s Laws 23 2.1 Kirchhoff’s Current Law 23 2.2 Kirchhoff’s Voltage Law 24 2.3 When Things Go Wrong with KCL and KVL 36 2.4 Series and Parallel Connections of Resistors 40 2.4.1 Series Connection 40 2.4.2 Parallel Connection 41 2.5 When Things Go Wrong with Series/Parallel Resistors 45 2.6 What You Need to Know before You Continue 46 3 Analysis of Resistive Networks: Nodal Analysis 47 3.1 Application of Nodal Analysis 47 3.2 Concept of Supernode 59 3.3 Circuits with Multiple Independent Voltage Sources 72 3.4 Solving Challenging Problems Using Nodal Analysis 74 3.5 When Things Go Wrong with Nodal Analysis 86 3.6 What You Need to Know before You Continue 90 4 Analysis of Resistive Networks: Mesh Analysis 93 4.1 Application of Mesh Analysis 93 4.2 Concept of Supermesh 107 4.3 Circuits with Multiple Independent Current Sources 121 4.4 Solving Challenging Problems Using the Mesh Analysis 122 4.5 When Things Go Wrong with Mesh Analysis 135 4.6 What You Need to Know before You Continue 137 5 Black-Box Concept 139 5.1 Thévenin and Norton Equivalent Circuits 139 5.2 Maximum Power Transfer 158 5.3 Shortcuts in Equivalent Circuits 173 5.4 When Things Go Wrong with Equivalent Circuits 176 5.5 What You Need to Know before You Continue 178 6 Transient Analysis 181 6.1 Capacitance and Capacitors 181 6.2 Inductance and Inductors 191 6.3 Time-Dependent Analysis of Circuits in Transient State 195 6.3.1 Time-Dependent Analysis of RC Circuits 195 6.3.2 Time-Dependent Analysis of RL Circuits 204 6.3.3 Impossible Cases 207 6.4 Switching and Fixed-Time Analysis 208 6.5 Parallel and Series Connections of Capacitors and Inductors 218 6.5.1 Connections of Capacitors 218 6.5.2 Connections of Inductors 220 6.6 When Things Go Wrong in Transient Analysis 222 6.7 What You Need to Know before You Continue 224 7 Steady-State Analysis of Time-Harmonic Circuits 227 7.1 Steady-State Concept 227 7.2 Time-Harmonic Circuits with Sinusoidal Sources 228 7.2.1 Resistors Connected to Sinusoidal Sources 229 7.2.2 Capacitors Connected to Sinusoidal Sources 230 7.2.3 Inductors Connected to Sinusoidal Sources 231 7.2.4 Root-Mean-Square Concept 232 7.3 Concept of Phasor Domain and Component Transformation 234 7.3.1 Resistors in Phasor Domain 236 7.3.2 Capacitors in Phasor Domain 236 7.3.3 Inductors in Phasor Domain 237 7.3.4 Impedance Concept 238 7.4 Special Circuits in Phasor Domain 243 7.4.1 RC Circuits in Phasor Domain 243 7.4.2 RL Circuits in Phasor Domain 244 7.4.3 RLC Circuits in Phasor Domain 246 7.4.4 Other Combinations 247 7.5 Analysis of Complex Circuits at Fixed Frequencies 248 7.6 Power in Steady State 259 7.6.1 Instantaneous and Average Power 259 7.6.2 Complex Power 260 7.6.3 Impedance Matching 266 7.7 When Things Go Wrong in Steady-State Analysis 271 7.8 What You Need to Know before You Continue 274 8 Selected Components of Modern Circuits 275 8.1 When Connections Are via Magnetic Fields: Transformers 275 8.2 When Components Behave Differently from Two Sides: Diodes 278 8.3 When Components Involve Many Connections: OP-AMPs 284 8.4 When Circuits Become Modern: Transistors 288 8.5 When Components Generate Light: LEDs 293 8.6 Conclusion 294 9 Practical Technologies in Modern Circuits 295 9.1 Measurement Instruments 295 9.2 Three-Phase Power Delivery 297 9.3 AD and DA Converters 300 9.4 Logic Gates 303 9.5 Memory Units 307 9.6 Conclusion 309 10 Next Steps 311 10.1 Energy Is Conserved, Always! 311 10.2 Divide and Conquer Complex Circuits 313 10.3 Appreciate the Package 314 10.4 Consider Yourself as a Circuit Element 316 10.5 Safety First 317 11 Photographs of Some Circuit Elements 321 A Appendix 325 A.1 Basic Algebra Identities 325 A.2 Trigonometry 325 A.3 Complex Numbers 325 B Solutions to Exercises 327 Index 401

Read more less

LTspice® for Linear Circuits Introduce yourself to the industry-leading software in electronic circuit simulation The simulation of electronic circuits is a crucial tool in modern electrical engineering. Many currently available software toolkits for circuit simulation are expensive, or nominally free but with significant restrictions on features and applications. LTspice®, a software distributed by semiconductor manufacturer Analog Devices, is not only the most widely used SPICE-based circuit simulator in the industry, but also free and unrestricted. LTspice®for Linear Circuits provides a comprehensive introduction to this software and its circuit simulation capabilities. Focusing on the fostering of practical knowledge, the book develops a six-step strategy for solving circuit analysis problems, beginning with the formulation of the problem, and proceeding through the simulation and the review of results. Readable and built around an easy-to-use, accessible software, LTspice® for Linear Circuits is an essential tool for any would-be electrical engineer. LTspice® for Linear Circuits readers will also find: Practical examples of circuit analysis problems and their solutions Detailed treatment of problems involving DC Circuits, First-Order Circuits, AC Circuits, Frequency Response and more Educational content from an author with decades of experience teaching electrical circuits LTspice®for Linear Circuits is perfect for undergraduates in electrical engineering and adjacent subjects, as well as anyone looking for an introduction to this widely used software.

Read more less

Book SynopsisThis book addresses the difficulty of obtaining a quality solution, that is, pre optimal or even optimal, in a reasonable time from a central processing unit (CPU). As polynomial problems can be treated by exact methods, the problem posed concerns non-polynomial problems, for which it is necessary to develop efficient algorithms based on heuristics or meta-heuristics. Chapter 3 of this book demonstrates how to develop such algorithms, which are characterized by: an initialization of argued solutions (sometimes, the global optimum can be obtained from such an initialization); a non-random generation of solutions (to avoid generating the same solution several times, or even generating solutions that cannot be achieved); avoidance of being trapped by a local optimum; good use of CPU time by reducing the size of the space of solutions to be explored (which is often very large for such problems) without compromising the quality of the solution; plus a reasoned displacement from one solution to another, to improve the quality of the solution as the processing is carried out. These aspects are applied to concrete applications in the design of integrated circuits and systems at various levels. To do this and to help the reader better understand this problem, Chapters 1 and 2 present basic notions on computational complexity, and the design of integrated circuits and systems.Table of ContentsPreface ix Chapter 1. Basic Notions on Computational Complexity and Approximate Techniques 1 1.1. Computational complexity 1 1.1.1. Introduction 1 1.1.2. Big O notation 2 1.1.3. Ω Notation 3 1.1.4. Calculation of T(n) 4 1.2. Language computability 10 1.2.1. Turing machine and class P 10 1.2.2. Non-deterministic algorithm and class NP 12 1.2.3. NP-complete problems 16 1.2.4. NP-hard problems 27 1.2.5. NP-intermediate problems 31 1.2.6. Co-NP problems 33 1.2.7. Class hierarchy 34 1.3. Heuristics and metaheuristics 35 1.3.1. Definitions 35 1.3.2. Graph theory 36 1.3.3. Branch and bound technique 37 1.3.4. Tabu search technique 41 1.3.5. Simulated annealing technique 43 1.3.6. Genetic and evolutionary algorithms 45 1.4. Conclusion 48 Chapter 2. Basic Notions on the Design of Digital Circuits and Systems 49 2.1. Introduction 49 2.2. History of VLSI circuit design 49 2.2.1. Prediffused circuit 49 2.2.2. Sea of gates 49 2.2.3. Field-programmable gate array – FPGA 51 2.2.4. Elementary pre-characterized circuit (standard cells) 52 2.2.5. Full-custom circuit 53 2.2.6. Silicon compilation 54 2.3. System design level 57 2.3.1. Synthesis 57 2.3.2. Floorplanning 64 2.3.3. Analysis 65 2.3.4. Verification 66 2.4. Register transfer design level 69 2.4.1. Synthesis 69 2.4.2. Analysis 90 2.4.3. Verification 91 2.5. Module design level 92 2.5.1. Synthesis 92 2.5.2. Analysis 93 2.5.3. Verification 98 2.6. Gate design level 99 2.6.1. Synthesis 99 2.6.2. Analysis 111 2.6.3. Verification 112 2.7. Transistor level 112 2.7.1. NMOS and CMOS technologies 112 2.7.2. Theory of MOS transistor (current IDS) 114 2.7.3. Transfer characteristics of the inverter 117 2.7.4. Static analysis of the inverter 118 2.7.5. Threshold voltage of the inverter 119 2.7.6. Estimation of the rise and fall times of a capacitor 120 2.8. Interconnections 124 2.8.1. Synthesis of interconnections 126 2.8.2. Synthesis of networks-on-chip 140 2.9. Conclusion 151 Chapter 3. Case Study: Application of Heuristics and Metaheuristics in the Design of Integrated Circuits and Systems 153 3.1. Introduction 153 3.2. System level 154 3.2.1. Synthesis of systems-on-chip (SoCs) with low energy consumption 154 3.2.2. Heuristic application to dynamic voltage and frequency scaling (DVFS) for the design of a real-time system subject to energy constraint 160 3.3. Register transfer level 174 3.3.1. Integer linear programming applied to the scheduling of operations of a data flow graph (DFG) 174 3.3.2. The scheduling of operations in a controlled data flow graph (considering the speed–power consumption tradeoff) 176 3.3.3. Efficient code assignment to the states of a finite state machine (aimed at reaching an effective control part in terms of surface, speed and power consumption) 176 3.3.4. Synthesis of submicron transistors and interconnections for the design of high-performance (low-power) circuits subject to power (respectively time) and surface constraints 196 3.4. Module level 207 3.4.1. Design of low-power digital circuits 207 3.4.2. Reduction of memory access time for the design of embedded systems 219 3.5. Gate level 227 3.5.1. Estimation of the average and maximal power consumption of a digital circuit 227 3.5.2. Automated layout generation of some regular structures (shifters, address decoders, PLAs) 234 3.5.3. Automated layout generation of digital circuits according to the River PLA technique 238 3.6. Interconnections 239 3.6.1. Low-power buffer insertion technique for the design of submicron interconnections with delay and surface constraints 239 3.6.2. Data encoding and decoding for low-power aided design of submicron interconnections 250 3.6.3. High-level synthesis of networks-on-chip subject to bandwidth, surface and power consumption constraints 253 3.7. Conclusion 263 References 267 Index 273

Read more less

Book SynopsisThis book will present the theoretical and technological elements of nanosystems. Among the different topics discussed, the authors include the electromechanical properties of NEMS, the scaling effects that give these their interesting properties for different applications and the current manufacturing processes. The authors aim to provide useful tools for future readers and will provide an accurate picture of current and future research in the field.Table of ContentsPREFACE vii PHYSICAL CONSTANTS ix NOTATIONS xi CHAPTER 1. FROM MEMS TO NEMS 1 1.1. Micro- and nanoelectromechanical systems: an overview 1 1.2. Conclusion 9 CHAPTER 2. TRANSDUCTION ON THE NANOMETRIC SCALE AND THE NOTION OF NOISE 13 2.1. Mechanical transfer function 14 2.2. Transduction principles 20 2.2.1. The actuation of nanostructures 23 2.2.2. Detection 31 2.3. Self-oscillation and noises 49 2.4. Conclusion 58 CHAPTER 3. MONOLITHIC INTEGRATION OF NEMS WITH THEIR READOUT ELECTRONICS 61 3.1. Foreword 61 3.1.1. Why integrate NEMS with their readout electronics? 61 3.1.2. What are the differences between MEMS-CMOS and NEMS-CMOS? 62 3.2. The advantages of and main approaches to monolithic integration 64 3.2.1. A comparison of integration schemes and their electrical performance 64 3.2.2. Closed-loop NEMS-CMOS oscillators: the essential building block for NEMS-based frequency sensors 69 3.2.3. Overview of the main achievements from the perspective of manufacturing technology 70 3.3. Analysis of some significant achievements from the perspective of transduction 75 3.3.1. Examples of capacitive NEMS-CMOS 75 3.3.2. Examples of piezoresistive NEMS-CMOS 82 3.3.3. Alternative approaches 85 3.4. Conclusions and future perspectives 86 CHAPTER 4. NEMS AND SCALING EFFECTS 89 4.1. Introduction 89 4.1.1. Intrinsic losses 96 4.1.2. Extrinsic losses 97 4.2. Near field effect in a nanostructure: Casimir force 102 4.2.1. Intuitive explanation of the Casimir force 102 4.2.2. The problem 105 4.2.3. Rigorous calculation of the Casimir force between two silicon slabs 107 4.2.4. Impact of the Casimir force in a nano-accelerometer 113 4.2.5. Conclusion 117 4.3. Example of “intrinsic” scaling effects: electrical conduction laws 117 4.3.1. Electrical resistivity 117 4.3.2. Piezoresistive effect 125 4.4. Optomechanical nano-oscillators and quantum optomechanics 136 4.5. Conclusion 147 CHAPTER 5. CONCLUSION AND APPLICATION PROSPECTS: FROM FUNDAMENTAL PHYSICS TO APPLIED PHYSICS 149 APPENDIX 167 BIBLIOGRAPHY 175 INDEX 193

Read more less

Book SynopsisThe Wave Concept Iterative Procedure (WCIP) method has found an increasing number of users within electromagnetic theory and applications to planar circuits, antennas and diffraction problems. This book introduces in detail this new formulation of integral methods, based on the use of a wave concept with two bounded operators, and applications in a variety of domains in electromagnetics. This approach presents a number of benefits over other integral methods, including overcoming the problem of singularity, and reduced computing time. Through the presentation of mathematical equations to characterize studied structures and explanation of the curves obtained, via validated examples, the authors provide a thorough background to electromagnetism as well as a professional reference to students and researchers.Table of ContentsPreface ix Chapter 1. General Principles of the Wave Concept Iterative Process 1Henri BAUDRAND, Med Karim AZIZI, Mohammed TITAOUINE 1.1. Introduction 1 1.2. The iterative wave method 3 1.3. General definition of waves 5 1.4. Application to planar circuits 5 1.5. Applications to quasi-periodic structures 6 1.6. Circuits with localized components 7 1.7. General principles of quasi-periodic circuits 7 1.8. The significance of using auxiliary sources 8 1.8.1. Description of the environment 9 1.9. Unidimensional circuits 9 1.10. Application: transmission line 14 1.11. Comparison of current density for different cell lengths 14 1.12. Bi-dimensional circuits 16 1.13. Two-source bi-dimensional circuits 16 1.14. Three-source bi-dimensional circuits 22 1.15. Validation examples 25 1.16. Lenses and meta-materials 34 1.17. Conclusion 41 Chapter 2. Formulation and Validation of the WCIP Applied to the Analysis of Multilayer Planar Circuits 43Alexandre Jean René SERRES and Georgina Karla DE FREITAS SERRES 2.1. Introduction 43 2.2. WCIP formulation 45 2.2.1. Multilayer formulation 45 2.2.2. Simulation results 48 2.3. Real and ideal polarizers within planar structures using WCIP 52 2.3.1. Formulation 52 2.3.2. Results 55 2.4. Amplifier structure of compact micro-waves 57 2.4.1. Formulation of the amplifier interface 57 2.4.2. The simulation results 59 Chapter 3. Applications of the WCIP Method to Frequency Selective Surfaces (FSS) 63Mohammed TITAOUINE and Henri BAUDRAND 3.1. Introduction 64 3.2. Formulation of the iterative WCIP method 65 3.2.1. Determining the diffraction operator 68 3.2.2. Determining the reflection operator 70 3.2.3. The fast modal transform FMT and its inverse FMT−1 72 3.2.4. FSS multilayer devices 72 3.2.5. Multi-level plated FSSs 72 3.3. Application of the iterative WCIP method to different FSSs 74 3.3.1. Dielectric short-circuited FSS rings 74 3.3.2. FSSs charged by lumped elements and active FSSs 76 3.3.3. Multi-frequency band FSSs 79 3.3.4. Double-layer FSS plating 80 3.3.5. Triple-layer plating 82 3.3.6. Thick FSSs 83 3.4. Anisotropic FSS 95 3.5. Measurement system 96 3.6. Conclusion 97 3.7. Acknowledgments 98 Chapter 4. WCIP Applied to Substrate Integrated Circuits: Substrate Integrated Waveguide (SIW) and Substrate Integrated Non-Radiative Dielectic (SINRD) Circuits 99Nathalie RAVEU and Ahmad ISMAIL ALHZZOURY 4.1. Introduction 99 4.2. Formulation of WCIP for SIC circuits 100 4.2.1. The definition of 103 4.2.2. The definition of 103 4.3. Results for SIW circuits 104 4.3.1. Waveguides 104 4.3.2. Bandpass filter 106 4.4. Results for the SINRD circuits 108 4.4.1. Waveguides 110 4.4.2. Bandpass filter 111 4.5. Conclusion 112 Chapter 5. WCIP Convergence 115Nathalie RAVEU 5.1. Introduction 115 5.2. Summary of WCIP 116 5.2.1. Representation of homogeneous materials around the interface 117 5.2.2. Description of boundary conditions at the interface 118 5.2.3. System to solve 118 5.3. Improvement of WCIP by mathematical techniques 119 5.3.1. Number of modes/number of meshes 120 5.3.2. GMRES/Richardson 121 5.3.3. Selecting the initial value 122 5.4. Improvement of WCIP by physical considerations 124 5.4.1. Simplification of waves at the interface 124 5.4.2. Choice of reference impedance 125 5.4.3. Boundary conditions on the metallic mesh 126 5.5. Conclusions 127 Chapter 6. Application of WCIP to Diffraction Problems 129Noemen AMMAR, Taoufik AGUILI and Henri BAUDRAND 6.1. Introduction 129 6.1.1. Diffraction by multilayer cylindrical structures 130 6.1.2. Descriptors for spectral components of reflection operators 132 6.1.3. The modal coefficients ext n Γ and int n Γ 133 6.1.4. Modal coefficients pass n Γ 134 6.1.5. Spatial diffraction operator 136 6.1.6. Excitation source 137 6.1.7. Iterative process 138 6.2. Application 138 6.2.1. Dielectric cylinder diffraction 139 6.2.2. Diffraction by metallic strips 143 6.2.3. Coaxial multi-strip structure 148 6.2.4. Diffraction by two dielectric co-axials 156 6.2.5. Diffraction by structures of any shape 159 6.3. Coupling simulation 160 6.3.1. Different operators involved 162 6.3.2. The case of two pixels on a single fictitious cylinder 163 6.3.3. The case where the two pixels are part of two coaxial cylinders 164 6.3.4. Spatial descriptors of diffraction operators 167 6.3.5. The iterative process 169 6.3.6. Computation of the remote location electric field 169 6.3.7. Application 170 6.4. Conclusion 183 Bibliography 185 List of Authors 195 Index 197

Read more less

Book SynopsisElectronic and electromechanical control of machinery and equipment in the factory environment has been commonplace for many years and is steadily finding its place in the model engineer's workshop. This book gives the theoretical and practical details of electronic circuits that can be used to control machinery for the model engineer and the 'inventor'. There has recently been a huge expansion in computer and electronic control which model engineers have found desirable, yet expensive. Here, the author provides the vital information for the model engineer to build his own control units using a modular, or 'building block', approach. Very clear easy-to-follow circuit diagrams and instructions are at the heart of the book, enabling the model engineer to analyse his requirements and assemble the building blocks using readily available components and commonplace workshop skills. The book brings modern machinery control technology within reach of the model engineer, the robotics enthusiast and the experimenter.Trade ReviewThere must be hundreds of books on Electronics but very few written specifically with the Model Engineer in mind. The control of machine tools by computer (CNC), previously the sole preserve of the professional engineer is now gaining ground rapidly with the amateur machinist. This has been due to reduced hardware costs and engineers prepared to 'have a go' for themselves. This book covers in considerable detail all the information required to carry out a successful conversion of existing equipment or to assist in the design of new machines. The traditional 'mechanical' engineer can no longer ignore the electromechanical aspect and this book will be a most welcome addition to any library. The 24 chapters cover a wide range of topics from Basic Electromagnetic Theory thro' to making your own PCB's, via Stepper Motors, Servos etc. on the way. This book provides an informative and absorbing read into the subject without being over technical, and will provide a handy reference for anyone wishing to gain expert knowledge of this rapidly expanding aspect of modern machine shop practice. The book would be an excellent primer for any young engineer or student contemplating a career in this fascinating branch of modern production engineering - Engineering in MiniatureTable of ContentsBasic Electromagnetic Theory. Stepper Drive Motor. DC Motor Drive. The Servo System. Relays. Solenoids & Related Devices. Other Electromagnetic Devices. Interference Suppression. Heatsinks. Fuses & Circuit Breakers. Inputs. Light Emitting Diodes. Speed Measurement in the Workshop. Power Supplies & Regulators. Power Supplies from Batteries. NVRs & Interlocks. Ancillery Test & Driver Modules. Basic Electronic Building Blocks. Practical & Cost Effective Building. Etching Processes. Using Stripboard for Prototypes. Pin Outs & Specifications. Information Sources.

Read more less

Book SynopsisThis Springer Handbook comprehensively covers the topic of semiconductor devices, embracing all aspects from theoretical background to fabrication, modeling, and applications.Nearly 100 leading scientists from industry and academia were selected to write the handbook's chapters, which were conceived for professionals and practitioners, material scientists, physicists and electrical engineers working at universities, industrial R&D, and manufacturers.Starting from the description of the relevant technological aspects and fabrication steps, the handbook proceeds with a section fully devoted to the main conventional semiconductor devices like, e.g., bipolar transistors and MOS capacitors and transistors, used in the production of the standard integrated circuits, and the corresponding physical models. In the subsequent chapters, the scaling issues of the semiconductor-device technology are addressed, followed by the description of novel concept-based semiconductor devices. The last section illustrates the numerical simulation methods ranging from the fabrication processes to the device performances.Each chapter is self-contained, and refers to related topics treated in other chapters when necessary, so that the reader interested in a specific subject can easily identify a personal reading path through the vast contents of the handbook.Table of ContentsFabrication, characterization, and scaling issues.- Crystal growth.- Silicon oxidation.- Epitaxy.- Physical/chemical vapor deposition.- Lithography.- Etching.- Ion implantation.- Thermal diffusion.- Interconnects.- Diagnostic techniques.- Bipolar and MOS devices.- p-n and Schottky-barrier diodes.- MOS capacitors and charge-coupled devices.- Bipolar and MOS transistors.- Power devices.- Non-volatile memories.- Sensors.- Photodetectors.- Light sources.- Semiconductor lasers.- Measuring techniques.- New-generation devices.- Devices in 2D-layered materials.- Resonant-tunneling hetero-structures.- Nanotube and nanoribbon field-effect transistors.- Phase-Change Memories.- Resistive Memories.- Spin-transfer devices.- Piezoelectric devices.- Process and device modeling.- Numerical methods for the process steps.- Compact models.- Drift-diffusion models.- Hydrodynamic models.- Spherical-Harmonic expansion.- Quantum ballistic models.- Non-equilibrium Green function.- Finite-difference and exponential-fitting schemes.

Read more less

Book SynopsisThis conference proceedings summarizes invited publications from the two IDES (Institute of Doctors Engineers and Scientists) International conferences, both held in Bangalore/India.

Read more less

Book Synopsis

Read more less