Computer architecture and logic design Books
O'Reilly Media Nginx Cookbook
Book SynopsisNGINX is one of the most widely used web servers available today, in part because of its capabilities as a load balancer and reverse proxy server for HTTP and other network protocols. This revised cookbook provides easy-to-follow examples of real-world problems in application delivery.
£35.99
Cambridge University Press Elements of Logical Reasoning
Book SynopsisSome of our earliest experiences of the conclusive force of an argument come from school mathematics: faced with a mathematical proof, we cannot deny the conclusion once the premises have been accepted. Behind such arguments lies a more general pattern of 'demonstrative arguments' that is studied in the science of logic. Logical reasoning is applied at all levels, from everyday life to advanced sciences, and a remarkable level of complexity is achieved in everyday logical reasoning, even if the principles behind it remain intuitive. Jan von Plato provides an accessible but rigorous introduction to an important aspect of contemporary logic: its deductive machinery. He shows that when the forms of logical reasoning are analysed, it turns out that a limited set of first principles can represent any logical argument. His book will be valuable for students of logic, mathematics and computer science.Trade Review'Elements of Logical Reasoning fills a gap by providing some much needed explanation and motivation to an otherwise dry literature.' Henry Towsner, The Mathematical IntelligencerTable of ContentsPart I. First Steps in Logical Reasoning: 1. Starting points; 2. Rules of proof; 3. Natural deduction; 4. Proof search; 5. Classical natural deduction; 6. Proof search in classical logic; 7. The semantics of propositional logic; Part II. Logical Reasoning with the Quantifiers: 8. The quantifiers; 9. Derivations in predicate logic; 10. The semantics of predicate logic; Part III. Beyond Pure Logic: 11. Equality and axiomatic theories; 12. Elements of the proof theory of arithmetic; Part IV. Complementary Topics: 13. Normalization and cut elimination; 14. Deductive machinery from Aristotle to Heyting.
£22.99
Cambridge University Press Mathematical Logic and Computation
Book SynopsisThis book presents mathematical logic from the syntactic point of view, with an emphasis on aspects that are fundamental to computer science. It is an excellent introduction for graduate students and advanced undergraduates interested in logic in mathematics, computer science, and philosophy, and an invaluable reference for professional logicians.Trade Review'Avigad provides a much needed introduction to mathematical logic that foregrounds the role of syntax and computability in our understanding of consistency and inconsistency. The result provides a jumping off point to any of the fields of modern logic, not only teaching the technical groundwork, but also providing a window into how to think like a logician.' Henry Towsner, University of Pennsylvania'This book by one of the most knowledgeable researchers in the field covers a remarkably broad selection of material without sacrificing depth. Its clear organization and unified approach - focused on a syntactic approach and on the role of computation - make it suitable for a wide range of introductory logic sequences at the upper-level undergraduate and graduate level, as well as a valuable resource for background material in more advanced logic courses.' Denis Hirschfeldt, University of Chicago'… an excellent addition to the literature, with plenty more than enough divergences and side-steps from the more well-trodden paths through the material to be consistently interesting … this is most certainly a book to make sure your library gets.' Peter Smith, Logic MattersTable of ContentsPreface; 1. Fundamentals; 2. Propositional Logic; 3. Semantics of Propositional Logic; 4. First-Order Logic; 5. Semantics of First-Order Logic; 6. Cut Elimination; 7. Properties of First-Order Logic; 8. Primitive Recursion; 9. Primitive Recursive Arithmetic; 10. First-Order Arithmetic; 11. Computability 12. Undecidability and Incompleteness; 13. Finite Types; 14. Arithmetic and Computation; 15. Second-Order Logic and Arithmetic; 16. Subsystems of Second-Order Arithmetic; 17. Foundations; Appendix; References; Notation; Index.
£56.99
Cambridge University Press Model Checking Quantum Systems
Book SynopsisModel checking is one of the most successful verification techniques and has been widely adopted in traditional computing and communication hardware and software industries. This book provides the first systematic introduction to model checking techniques applicable to quantum systems, with broad potential applications in the emerging industry of quantum computing and quantum communication as well as quantum physics. Suitable for use as a course textbook and for self-study, graduate and senior undergraduate students will appreciate the step-by-step explanations and the exercises included. Researchers and engineers in the related fields can further develop these techniques in their own work, with the final chapter outlining potential future applications.Trade Review'This book gives a thorough account of the principles of model checking for quantum systems. It covers the basics of verifying qualitative properties such as reachability as well as quantitative properties on quantum Markov chains. This is the first comprehensive work on this young and exciting research field.' Joost-Pieter Katoen, RWTH Aachen University'The authors have been, from the start of the quantum computer science endeavour, at the forefront of research in logical methods for quantum computing. This book provides the best possible introduction to quantum model checking, by the pioneers of the field. Bob Coecke, University of Oxford'A brief final chapter offering conclusions and future prospects will be of wider interest. This work is intended as an introduction for researchers entering the field of quantum computing, and is suitable as a textbook for physics or computer science graduate students … Recommended.' M. C. Ogilvie, Choice MagazineTable of Contents1. Introduction; 2. Basics of Model Checking; 3. Basics of Quantum Theory; 4. Model Checking; 5. Model Checking Quantum Markov Chains; 6. Model Checking Super-operator-valued Markov Chains; 7. Conclusions and Prospects.
£53.19
Cambridge University Press The Dialogical Roots of Deduction
Book SynopsisThis comprehensive account of the concept and practices of deduction is the first to bring together perspectives from philosophy, history, psychology and cognitive science, and mathematical practice. Catarina Dutilh Novaes draws on all of these perspectives to argue for an overarching conceptualization of deduction as a dialogical practice: deduction has dialogical roots, and these dialogical roots are still largely present both in theories and in practices of deduction. Dutilh Novaes'' account also highlights the deeply human and in fact social nature of deduction, as embedded in actual human practices; as such, it presents a highly innovative account of deduction. The book will be of interest to a wide range of readers, from advanced students to senior scholars, and from philosophers to mathematicians and cognitive scientists.Trade Review'The Dialogical Roots of Deduction displays a formidable command of an impressive range of sources from ancient and mediaeval logic to the latest work in cognitive science. The depth of Catarina Dutilh Novaes's scholarship is evident throughout as she defends a novel and provocative thesis: that deduction as dialogue is conceptually and historically prior to its conventional monologue presentation. I expect the book to be influential and widely discussed.' Andrew Aberdein, Florida Institute of Technology'Reframing the philosophy of logic, this pathbreaking book develops a historically informed and philosophically powerful new conception of how the pragmatic foundations of logical deductive relations, and so the semantics of logical concepts, can be found in dialogic social practices that suitably balance cooperation and competition.' Bob Brandom, University of Pittsburgh'Philosophers and scientists working on human cognition have much to gain from assimilating the careful research put into this book.' Tricia Mae Barcelita, Metascience'Dutilh Novaes has already made a substantial contribution to this literature, and her new book develops this program in new and exciting directions by drawing on a tradition of deductive reasoning that descends from the public debates of the Athenian democracy, through a central strand in Western intellectual history, and into current scientific research into human cognition. Philosophers and scientists working on human cognition have much to gain from assimilating the careful research put into this book.' Preston Stovall, Metascience'This book is required reading not only for those interested in the history and philosophy of logic. It has something to teach any of us who are interested in what we are doing when we reason together. The lessons we learn will help us address some of our old questions from new perspectives, and will leave us asking fresh questions, too.' Greg Restall, MINDTable of ContentsPreface; Part I. The Philosophy of Deduction: 1. The trouble with deduction; 2. Back to the roots of deduction; 3. The Prover-Skeptic dialogues; 4. Deduction as a dialogical notion; Part II. The History of Deduction: 5. Deduction in mathematics and dialectic in Ancient Greece; 6. Aristotle's syllogistic, and other ancient logical traditions; 7. Logic and deduction in the Middle Ages and the modern period; Part III. Deduction and Cognition: 8. How we reason, individually and in groups; 9. The ontogeny of deductive reasoning; 10. The phylogeny of deductive reasoning; 11. A dialogical account of proofs in mathematical practice; Conclusions.
£23.74
John Wiley & Sons Inc 802.1aq Shortest Path Bridging Design and
Book SynopsisFacilitates both the understanding and adoption of 802.1aq as a networking solution 802.1aq Shortest Path Bridging (SPB) is a technology that greatly simplifies the creation and configuration of carrier, enterprise, and cloud computing networksby using modern computing power to deprecate signaling, and to integrate multicast, multipath routing, and large-scale virtualization. It is arguably one of the most significant enhancements in Ethernet''s history. 802.1aq Shortest Path Bridging Design and Evolution explains both the what and the why of the technology standard being set today. It covers which decisions were elective and which were dictated by the design goals by using a multipart approach that first explains what SPB is, before transitioning into narrative form to describe the design processes and decisions behind it. To make SPB accessible to the data networking professional from multiple perspectives, the book: Provides a RTable of Contents Figures vii Acknowledgments ix Introduction xi Abbreviations xvii 1. IEEE 802.1aq in a Nutshell: Antecedents and Technology 1 2. Why SPB Looks as It Does 36 3. Why the SPB Control Plane Looks as It Does 74 4. Practical Deployment Considerations 130 5. Applications of SPB 150 6. Futures 158 Conclusion 186 References 188 Index 190
£54.86
John Wiley & Sons Inc Fundamentals of Digital Logic and
Book SynopsisUpdated to reflect the latest advances in the field, the Sixth Edition of Fundamentals of Digital Logic and Microcontrollers further enhances its reputation as the most accessible introduction to the basic principles and tools required in the design of digital systems. Features updates and revision to more than half of the material from the previous edition Offers an all-encompassing focus on the areas of computer design, digital logic, and digital systems, unlike other texts in the marketplace Written with clear and concise explanations of fundamental topics such as number system and Boolean algebra, and simplified examples and tutorials utilizing the PIC18F4321 microcontroller Covers an enhanced version of both combinational and sequential logic design, basics of computer organization, and microcontrollers Table of ContentsPreface xiii 1: Introduction to Digital Systems 1 1.1 Explanation of Terms 2 1.2 Design Levels 6 1.3 Combinational and Sequential Circuits 7 1.4 Digital Integrated Circuits 7 1.4.1 Diodes 7 1.4.2 Transistors 8 1.4.3 MOS Transistors 14 1.5 Integrated Circuits (ICs) 18 1.6 CAD (Computer-Aided Design) 19 1.7 Evolution of the Microcontroller 20 1.8 Typical Microcontroller Applications 21 1.8.1 A Simple Microcontroller Application 22 1.8.2 Embedded Controllers 23 2: Number Systems and Codes 25 2.1 Number Systems 25 2.1.1 General Number Representation 25 2.1.2 Converting Numbers from One Base to Another 28 2.2 Unsigned and Signed Binary Numbers 30 2.3 Codes 34 2.3.1 Binary-Coded-Decimal Code (8421 Code) 34 2.3.2 Alphanumeric Codes 35 2.3.3 Excess-3 Code 36 2.3.4 Gray Code 37 2.3.5 Unicode 39 2.4 Fixed-Point and Floating-Point Representations 40 2.5 Arithmetic Operations 41 2.5.1 Binary Arithmetic 41 2.5.2 BCD Arithmetic 51 2.6 Error Correction and Detection 53 Questions and Problems 55 3: Boolean Algebra and Digital Logic Gates 59 3.1 Basic Logic Operations 59 3.1.1 NOT Operation 59 3.1.2 OR operation 60 3.1.3 AND operation 62 3.2 Other Logic Operations 64 3.2.1 NOR operation 64 3.2.2 NAND operation 64 3.2.3 Exclusive-OR operation (XOR) 65 3.2.4 Exclusive-NOR Operation (XNOR) 66 3.3 IEEE Symbols for Logic Gates 67 3.4 Positive and Negative Logic 68 3.5 Boolean Algebra 69 3.5.1 Boolean Identities 70 3.5.2 Simplification Using Boolean Identities 72 3.5.3 Consensus Theorem 74 3.5.4 Complement of a Boolean Function 75 3.6 Standard Representations 76 3.7 Karnaugh Maps 80 3.7.1 Two-Variable K-map 81 3.7.2 Three-Variable K-map 82 3.7.3 Four-Variable K-map 85 3.7.4 Prime Implicants 87 3.7.5 Expressing a Boolean function in Product-of-sums (POS) form using a K-map 89 3.7.6 Don’t Care Conditions 91 3.7.7 Five-Variable K-map 95 3.8 Quine–McCluskey Method 96 3.9 Implementation of Digital Circuits with NAND, NOR, and Exclusive-OR/Exclusive-NOR Gates 97 3.9.1 NAND Gate Implementation 98 3.9.2 NOR Gate Implementation 99 3.9.3 XOR / XNOR Implementations 102 Questions and Problems 106 4: Combinational Logic 109 4.1 Basic Concepts 109 4.2 Analysis of a Combinational Logic Circuit 109 4.3 Design of a Combinational Circuit 110 4.4 Multiple-Output Combinational Circuits 112 4.5 Typical Combinational Circuits 114 4.5.1 Comparators 114 4.5.2 Decoders 118 4.5.3 Encoders 122 4.5.4 Multiplexers 127 4.5.5 Demultiplexers 129 4.5.6 Binary / BCD Adders and Binary Subtractors 129 4.6 IEEE Standard Symbols 136 4.7 Read-Only Memories (ROMs) 138 4.8 Programmable Logic Devices (PLDs) 140 4.9 Commercially Available Field Programmable Devices (FPDs) 144 4.10 HARDWARE DESCRIPTION LANGUAGE (HDL) 146 4.11 Verilog basics 148 4.11.1 Verilog keywords 148 4.11.2 A typical Verilog Segment 148 4.11.3 Verilog operators 151 4.11.4 Verilog Constants 152 4.11.5 Modeling logical conditions in a circuit 152 4.11.6 Verilog if-else and case-endcase structures 153 4.11.7 A typical Verilog Simulator 153 4.12 Verilog modeling examples for combinational circuits 155 4.12.1 Structural modeling 155 4.12.2 Dataflow modeling 161 4.12.3 Behavioral modeling 163 Questions and Problems 168 5: Sequential Logic 173 5.1 Basic Concepts 173 5.2 Latches and Flip-Flops 173 5.2.1 SR Latch 174 5.2.2 Gated SR Latch 176 5.2.3 Gated D Latch 176 5.2.4 Edge-Triggered D Flip-Flop 177 5.2.5 JK Flip-Flop 180 5.2.6 T Flip-Flop 181 5.3 Flip-flop timing parameters for edge-triggered flip-flops 181 5.4 Preset and Clear Inputs 182 5.5 Summary of the gated SR latch and the Flip-Flops 182 5.6 Analysis of Synchronous Sequential Circuits 185 5.7 Types of Synchronous Sequential Circuits 188 5.8 Minimization of States 188 5.9 Design of Synchronous Sequential Circuits 190 5.10 Design of Counters 196 5.11 Examples of Synchronous Sequential Circuits 201 5.11.1 Registers 201 5.11.2 Modulo-n Counters 203 5.11.3 Random-Access Memory (RAM) 206 5.12 Algorithmic State Machines (ASM) Chart 207 5.13 Asynchronous Sequential Circuits 214 5.14 Verilog description of typical synchronous sequential circuits 217 Questions and Problems 235 6: CPU, MEMORY, AND I/O 243 6.1 Design of the CPU 243 6.1.1 Register Design 244 6.1.2 Arithmetic Logic Unit (ALU) 244 6.1.3 ALU Design 255 6.1.4 Control Unit Design 257 6.2 Memory Organization 280 6.2.1 Types of Main memory 283 6.2.2 READ and WRITE Timing Diagrams 285 6.2.3 Main Memory Organization 287 6.3 Input/Output (I/O) 290 6.3.1 Simple I/O Devices 292 6.3.2 Programmed I/O 293 6.3.3 Interrupt I/O 295 6.4 CPU design using Verilog 296 Questions and Problems 309 7: Microcontroller Basics 317 7.1 Basic Blocks of a Microcontroller 317 7.1.1 System Bus 318 7.1.2 Clock Signals 319 7.2 Microcontroller Architectures 320 7.3 Basic Concept of Pipelining 321 7.4 RISC vs. CISC 323 7.5 Functional Representation of a Typical RISC Microcontroller—The PIC18F4321 324 7.6 Basics of Programming Languages 324 7.6.1 Machine Language 326 7.6.2 Assembly Language 327 7.6.3 High-Level Language 327 7.7 Choosing a Programming Language 328 7.8 Introduction to C Language 329 7.8.1 Data Types 332 7.8.2 Bit Manipulation Operators 333 7.8.3 Control Structures 334 7.8.4 The switch Construct 338 7.8.5 The while Construct 338 7.8.6 The for Construct 340 7.8.7 The do-while Construct 341 7.8.8 Structures and Unions 341 7.8.9 Functions in C 342 7.8.10 Macros 343 Questions and Problems 344 8: PIC18F Hardware and Interfacing Using C: Part 1 345 8.1 PIC18F Pins and Signals 345 8.1.1 Clock 346 8.1.2 PIC18F Reset 350 8.1.3 A Simplified Setup for the PIC18F4321 350 8.2 PIC18F4321 programmed I/O using C 351 8.2.1 PIC 18F4321 I/O ports 351 8.2.2 Interfacing LEDs (Light Emitting Diodes) and Seven-segment Displays 354 8.2.3 Microchip MPLAB C18 compiler and the PICkit3 interface 355 8.2.4 Configuration commands 356 8.3 PIC18F Interrupts 359 8.3.1 PIC18F Interrupt Types 359 8.3.2 PIC18F External Interrupts in Default Mode 359 8.3.3 Interrupt Registers and Priorities 361 8.3.4 Setting the Triggering Levels of INTn Pin Interrupts 362 8.3.5 Programming the PIC18 interrupts using C 363 Questions and Problems 369 9: PIC18F Hardware and Interfacing Using C: Part 2 373 9.1 PIC18F Timers 373 9.1.1 Timer0 375 9.1.2 Timer1 378 9.1.3 Timer2 382 9.1.4 Timer3 384 9.2 PIC18F Interface to an LCD (Liquid Crystal Display) 390 9.3 Analog Interface 394 9.3.1 On-chip A/D Converter 395 9.3.2 Interfacing an External D/A (Digital-to-Analog) Converter to the PIC18F4321 403 9.4 Serial Interface 405 9.4.1 Synchronous Serial Data Transmission 405 9.4.2 Asynchronous Serial Data Transmission 405 9.4.3 PIC18F Serial I/O 406 9.5 PIC18F4321 Capture/Compare/PWM (CCP) Modules 413 9.5.1 CCP Registers 413 9.5.2 CCP Modules and Associated Timers 413 9.5.3 PIC18F4321 Capture Mode 413 9.5.4 PIC18F4321 Compare Mode 416 9.5.5 PIC18F4321 PWM (Pulse Width Modulation) Mode 417 9.6 DC Motor Control 419 Questions and Problems 425 Appendix A: Answers to Selected Problems 429 Appendix B: Glossary 439 Appendix C: Tutorial For Compiling and Debugging A C-Program Using The MPLAB 451 Appendix D: Interfacing The PIC18F4321 to A Personal Computer or A Laptop Using PICkit™ 3 479 D.1 Initial Hardware Setup For The PIC18F4321 479 D.2 Connecting The Personal Computer (Pc) or The Laptop to The PIC18F4321 Via PICkit3 480 D.3 Programming The Pic18f4321 From A Personal Computer or A Laptop Using The PICkit3 482 Bibliography 485 Credits 487 Index 489
£106.16
John Wiley & Sons Inc Learning Computer Architecture with Raspberry Pi
Book SynopsisUse your Raspberry Pi to get smart about computing fundamentals In the 1980s, the tech revolution was kickstarted by a flood of relatively inexpensive, highly programmable computers like the Commodore. Now, a second revolution in computing is beginning with the Raspberry Pi. Learning Computer Architecture with the Raspberry Pi is the premier guide to understanding the components of the most exciting tech product available. Thanks to this book, every Raspberry Pi owner can understand how the computer works and how to access all of its hardware and software capabilities. Now, students, hackers, and casual users alike can discover how computers work with Learning Computer Architecture with the Raspberry Pi. This book explains what each and every hardware component does, how they relate to one another, and how they correspond to the components of other computing systems. You''ll also learn how programming works and how the operating system relates to tTable of ContentsIntroduction 1 Cambridge 1 Cut to the Chase 3 The Knee in the Curve 4 Forward the Foundation 5 Chapter 1 The Shape of a Computer Phenomenon 7 Growing Delicious, Juicy Raspberries 7 System-on-a-Chip 10 An Exciting Credit Card-Sized Computer 12 What Does the Raspberry Pi Do? 14 Meeting and Greeting the Raspberry Pi Board 14 GPIO Pins 15 Status LEDs 16 USB Receptacles 18 Ethernet Connection 18 Audio Out 19 Composite Video 21 CSI Camera Module Connector 21 HDMI 22 Micro USB Power 22 Storage Card 23 DSI Display Connection 24 Mounting Holes 25 The Chips 25 The Future 25 Chapter 2 Recapping Computing 27 The Cook as Computer 28 Ingredients as Data 28 Basic Actions 30 The Box That Follows a Plan 31 Doing and Knowing 31 Programs are Data 32 Memory 33 Registers 34 The System Bus 36 Instruction Sets 36 Voltages, Numbers and Meaning 37 Binary: Counting in 1s and 0s 37 The Digit Shortage 40 Counting and Numbering and 0 40 Hexadecimal as a Shorthand for Binary 41 Doing Binary and Hexadecimal Arithmetic 43 Operating Systems: The Boss of the Box 44 What an Operating System Does 44 Saluting the Kernel 46 Multiple Cores 46 Chapter 3 Electronic Memory 47 There Was Memory Before There Were Computers 47 Rotating Magnetic Memory 48 Magnetic Core Memory 50 How Core Memory Works 50 Memory Access Time 52 Static Random Access Memory (SRAM) 53 Address Lines and Data Lines 54 Combining Memory Chips into Memory Systems 56 Dynamic Random Access Memory (DRAM) 59 How DRAM Works 60 Synchronous vs. Asynchronous DRAM 62 SDRAM Columns, Rows, Banks, Ranks and DIMMs 64 DDR, DDR2 DDR3 and DDR4 SDRAM 66 Error-Correcting Code (ECC) Memory 69 The Raspberry Pi Memory System 70 Power Reduction Features 70 Ball-Grid Array Packaging 71 Cache 72 Locality of Reference 72 Cache Hierarchy 72 Cache Lines and Cache Mapping 74 Direct Mapping 76 Associative Mapping 78 Set-Associative Cache 79 Writing Cache Back to Memory 81 Virtual Memory 81 The Virtual Memory Big Picture 82 Mapping Virtual to Physical 83 Memory Management Units: Going Deeper 84 Multi-Level Page Tables and the TLB 88 The Raspberry Pi Swap Problem 88 Watching Raspberry Pi Virtual Memory 90 Chapter 4 ARM Processors and Systems-on-a-Chip 93 The Incredible Shrinking CPU 93 Microprocessors 94 Transistor Budgets 95 Digital Logic Primer 95 Logic Gates 96 Flip-Flops and Sequential Logic 97 Inside the CPU 99 Branching and Flags 101 The System Stack 102 System Clocks and Execution Time 105 Pipelining 106 Pipelining in Detail 108 Deeper Pipelines and Pipeline Hazards 109 The ARM11 Pipeline 112 Superscalar Execution 113 More Parallelism with SIMD 115 Endianness 118 Rethinking the CPU: CISC vs. RISC 119 RISC's Legacy 121 Expanded Register Files 122 Load/Store Architecture 122 Orthogonal Machine Instructions 123 Separate Caches for Instructions and Data 123 ARMs from Little Acorns Grow 124 Microarchitectures, Cores and Families 125 Selling Licenses Rather Than Chips 125 ARM11 126 The ARM Instruction Set 126 Processor Modes 129 Modes and Registers 131 Fast Interrupts 137 Software Interrupts 137 Interrupt Priority 138 Conditional Instruction Execution 139 Coprocessors 142 The ARM Coprocessor Interface 143 The System Control Coprocessor 143 The Vector Floating Point (VFP) Coprocessor 144 Emulating Coprocessors 145 ARM Cortex 145 Multiple-Issue and Out-Of-Order Execution 146 Thumb 2 147 Thumb EE 147 big.LITTLE 147 The NEON Coprocessor for SIMD 148 ARMv8 and 64-Bit Computing 148 Systems on a Single Chip 150 The Broadcom BCM2835 SoC 150 Broadcom's Second- and Third-Generation SoC Devices 151 How VLSI Chips Happen 151 Processes, Geometries and Masks 152 IP: Cells, Macrocells and Cores 153 Hard and Soft IP 154 Floorplanning, Layout and Routing 154 Standards for On-Chip Communication: AMBA 155 Chapter 5 Programming 159 Programming from a Height 159 The Software Development Process 160 Waterfall vs. Spiral vs. Agile 162 Programming in Binary 165 Assembly Language and Mnemonics 166 High-Level Languages 167 Après BASIC, Le Deluge 170 Programming Terminology 171 How Native-Code Compilers Work 173 Preprocessing 174 Lexical Analysis 175 Semantic Analysis 175 Intermediate Code Generation 176 Optimisation 176 Target Code Generation 176 Compiling C: A Concrete Example 177 Linking Object Code Files to Executable Files 183 Pure Text Interpreters 184 Bytecode Interpreted Languages 186 P-Code 186 Java 187 Just-In-Time (JIT) Compilation 189 Bytecode and JIT Compilation Beyond Java 191 Android, Java and Dalvik 191 Data Building Blocks 192 Identifiers, Reserved Words, Symbols and Operators 192 Values, Literals and Named Constants 193 Variables, Expressions and Assignment 193 Types and Type Definitions 194 Static and Dynamic Typing 196 Two's Complement and IEEE 754 198 Code Building Blocks 200 Control Statements and Compound Statements 200 If/Then/Else 200 Switch and Case 202 Repeat Loops 205 While Loops 205 For Loops 207 The Break and Continue Statements 208 Functions 210 Locality and Scope 211 Object-Oriented Programming 214 Encapsulation 217 Inheritance 219 Polymorphism 221 OOP Wrapup 224 A Tour of the GNU Compiler Collection Toolset 224 gcc as Both Compiler and Builder 225 Using Linux Make 228 Chapter 6 Non-Volatile Storage 231 Punched Cards and Tape 232 Punched Cards 232 Tape Data Storage 232 The Dawn of Magnetic Storage 235 Magnetic Recording and Encoding Schemes 236 Flux Transitions 237 Perpendicular Recording 238 Magnetic Disk Storage 240 Cylinders, Tracks and Sectors 240 Low-Level Formatting 242 Interfaces and Controllers 244 Floppy Disk Drives 246 Partitions and File Systems 247 Primary Partitions and Extended Partitions 247 File Systems and High-Level Formatting 249 The Future: GUID Partition Tables (GPTs) 249 Partitions on the Raspberry Pi SD Card 250 Optical Discs 252 CD-Derived Formats 254 DVD-Derived Formats 254 Ramdisks 255 Flash Storage 257 ROMs, PROMs and EPROMs 257 Flash as EEPROM 258 Single-Level vs. Multi-Level Storage 260 NOR vs. NAND Flash 261 Wear Levelling and the Flash Translation Layer 265 Garbage Collection and TRIM 267 SD Cards 268 eMMC 270 The Future of Non-Volatile Storage 271 Chapter 7 Wired and Wireless Ethernet 273 The OSI Reference Model for Networking 274 The Application Layer 276 The Presentation Layer 276 The Session Layer 278 The Transport Layer 278 The Network Layer 279 The Data Link Layer 281 The Physical Layer 282 Ethernet 282 Thicknet and Thinnet 283 The Basic Ethernet Idea 283 Collision Detection and Avoidance 285 Ethernet Encoding Systems 286 PAM-5 Encoding 290 10BASE-T and Twisted-Pair Cabling 291 From Bus Topology to Star Topology 292 Switched Ethernet 293 Routers and the Internet 296 Names vs. Addresses 296 IP Addresses and TCP Ports 297 Local IP Addresses and DHCP 300 Network Address Translation 302 Wi-Fi 304 Standards within Standards 305 Facing the Real World 305 Wi-Fi Equipment in Use 309 Infrastructure Networks vs. Ad Hoc Networks 311 Wi-Fi Distributed Media Access 312 Carrier Sense and the Hidden Node Problem 314 Fragmentation 315 Amplitude Modulation, Phase Modulation and QAM 316 Spread-Spectrum Techniques 319 Wi-Fi Modulation and Coding in Detail 320 How Wi-Fi Connections Happen 323 Wi-Fi Security 325 Wi-Fi on the Raspberry Pi 326 Even More Networking 329 Chapter 8 Operating Systems 331 Introduction to Operating Systems 333 History of Operating Systems 333 The Basics of Operating Systems 336 The Kernel: The Basic Facilitator of Operating Systems 343 Operating System Control 344 Modes 345 Memory Management 346 Virtual Memory 347 Multitasking 347 Disk Access and File Systems 348 Device Drivers 349 Enablers and Assistants to the Operating System 349 Waking Up the OS 349 Firmware 353 Operating Systems for Raspberry Pi 354 NOOBS 354 Third-Party Operating Systems 356 Other Available Operating Systems 356 Chapter 9 Video Codecs and Video Compression 359 The First Video Codecs 360 Exploiting the Eye 361 Exploiting the Data 363 Understanding Frequency Transform 367 Using Lossless Encoding Techniques 371 Changing with the Times 373 The Latest Standards from MPEG 374 H.265 378 Motion Search 378 Video Quality 381 Processing Power 382 Chapter 10 3D Graphics 383 A Brief History of 3D Graphics 383 The Graphical User Interface (GUI) 384 3D Graphics in Video Games 386 Personal Computing and the Graphics Card 387 Two Competing Standards 390 The OpenGL Graphics Pipeline 391 Geometry Specification and Attributes 393 Geometry Transformation 396 Lighting and Materials 400 Primitive Assembly and Rasterisation 403 Pixel Processing (Fragment Shading) 405 Texturing 407 Modern Graphics Hardware 411 Tiled Rendering 411 Geometry Rejection 413 Shading 415 Caching 416 Raspberry Pi GPU 417 Open VG 421 General Purpose GPUs 423 Heterogeneous Architectures 423 OpenCL 425 Chapter 11 Audio 427 Can You Hear Me Now? 427 MIDI 428 Sound Cards 428 Analog vs. Digital 429 Sound and Signal Processing 430 Editing 431 Compression 431 Recording with Effects 432 Encoding and Decoding Information for Communication 433 1-Bit DAC 434 I2S 436 Raspberry Pi Sound Input/Output 437 Audio Output Jack 437 HDMI 438 Sound on the Raspberry Pi 438 Raspberry Pi Sound on Board 439 Manipulating Sound on the Raspberry Pi 439 Chapter 12 Input/Output 447 Introducing Input/Output 448 I/O Enablers 451 Universal Serial Bus 452 USB Powered Hubs 455 Ethernet 457 Universal Asynchronous Receiver/Transmitters 458 Small Computer Systems Interface 459 Parallel ATA 459 Serial Advanced Technology Attachment 460 RS-232 Serial 460 High Definition Media Interface 461 I2S 462 I2C 463 Raspberry Pi Display, Camera Interface and JTAG 464 Raspberry Pi GPIO 464 GPIO Overview and the Broadcom SoC 465 Meeting the GPIO 466 Programming GPIO 473 Alternative Modes 479 GPIO Experimentation the Easy Way 480 Index 481
£20.40
John Wiley & Sons Inc 3D IC and RF SiPs Advanced Stacking and Planar
Book SynopsisAn interdisciplinary guide to enabling technologies for 3D ICs and 5G mobility, covering packaging, design to product life and reliability assessments Features an interdisciplinary approach to the enabling technologies and hardware for 3D ICs and 5G mobility Presents statistical treatments and examples with tools that are easily accessible, such as Microsoft's Excel and Minitab Fundamental design topics such as electromagnetic design for logic and RF/passives centric circuits are explained in detail Provides chapter-wise review questions and powerpoint slides as teaching tools Table of Contents1 MM and MTM for Mobility 1 1.1 Convergence in Communications and the Future, 5G 3 1.1.1 From 1980 (1G) to 2010 (4G) 3 1.1.2 LTE-A and Rel 10 in 2010s 6 1.1.3 The Future: 5G and IoT (Targeting 2020) 8 1.2 Review of Key Products in Communication Networks 14 1.2.1 Wired Communications 14 1.2.2 Wireless Communications 21 1.3 MM and MTM, an Intro to Hardware Technology 31 1.3.1 Moore’s Law 31 1.3.2 More Than Moore 43 1.3.3 MTM Packaging Map and MM MTM Business Model 53 2 Interconnects 67 2.1 Hierarchy of Interconnection 69 2.1.1 On Chip (Level 0) Interconnections 69 2.1.2 Peripheral Pads on Semiconductor ICs (Level 0) 72 2.1.3 Al pads (Wirebond and Flip Chip) 73 2.1.4 Cu/Low K Re-Distribution Using Damascene Techniques (Flip Chip) 74 2.1.5 Au Pads (III–V) 77 2.1.6 Level 1 Interconnections: WB and FC—Why FC Interconnections are Preferred? 78 2.2 Level 1, Interconnection Gap in FC-PBGA, and Level 0.5 80 2.2.1 Wirebonds 80 2.2.2 Flip Chip Bumps with UBM 85 2.2.3 TSV and Microbumps, Cu or Au Stud Bumps (Level 0.5) 91 2.3 Changing Dynamics of Semiconductor Manufacturing 100 2.3.1 Bumping Itself is a Business 100 2.3.2 Cu/Low-K in BEOL 102 2.3.3 Wafer Fab Foundry and OSAT are Competing for Their Business Shares 102 3 State of the Art IC Packages, Modules, and Substrates 111 3.1 Single-Chip Packages (SCPs): Standardized Packages 113 3.1.1 Lead Frame Based: SO, QFP/QFN, and TAB 114 3.1.2 Organic Interposer Based: BGA/CSP and LGA 114 3.1.3 Known Good Bare Die 120 3.1.4 Single-Chip Packaging Processes 121 3.1.5 IC Testing 123 3.2 Advanced IC Substrates and Assembly 124 3.2.1 MLO Substrates for ICs 126 3.2.2 Multi-Layered Organic (MLO) for IC Packages 127 3.3 Customized Assemblies: MCP/MCMs and Modules 130 3.3.1 Multi-Chip Module (MCM) or Multi-Chip Package (MCP) 131 3.3.2 Modules 132 4 Passives Technology 139 4.1 Thick-Film Ceramic Technology (TFC) for MLC 146 4.1.1 Green Tapes 146 4.1.2 Thick-Film Fabrication 149 4.1.3 LTCC EPs, Thick-Film IPD, and LTCC-Based RF Modules 151 4.1.4 SMT (or SMD) 155 4.2 MLO Passives by Laminate Organic (LO) 156 4.2.1 MLO-Based RF Modules 156 4.2.2 Laminates 156 4.2.3 MLO Fabrication 157 4.2.4 MLO EPs and RF Modules 159 4.3 On-Chip Passives 166 4.3.1 RF Isolation (BCM4330) 166 4.3.2 Monolithic FEOL On-Chip Passives 168 4.3.3 Rs, Ls, and Cs in BEOL Layers 170 4.3.4 Goals 172 4.4 Thin-Film Multilayer (TFM) and IPD 173 4.5 Summary on Passives Fabrication Technologies: Solutions for RF-Passives Systems 191 5 Electrical Design for 5G Hardware—Digital Focus 199 5.1 Introduction to PCB 201 5.2 Signal Transmission Techniques: Singled-Ended and Differential Signals 202 5.2.1 Single-Ended and Differential 202 5.3 Co-Design Examples 216 5.3.1 Interconnection RF Models and Library 216 5.3.2 Chip-Package and Chip-Package-Board Co-Designs 219 5.4 Wide I/O Memory Using TSVs 228 5.4.1 JEDEC Memory Standards 230 5.4.2 Data Structure Using TSV-Based Wide I/O 230 6 Electrical Design for 5G Hardware—RF Focus 239 6.1 PHY, Modulated RF Carriers; a PoP Possible? 240 6.1.1 Frequency Bands and Wave Propagation Characteristics 240 6.1.2 Narrow-Band Process and CW Carrier for Digital Signals 242 6.2 Antennas 244 6.2.1 Two Often Encountered RF Passive Structures in Modern Portable Electronics: Antenna and Its Feed 244 6.2.2 Types of Antennas: Linear, Microstrip-Patch, and Multi-Element Antenna 245 6.2.3 Active-Integrated Antennas and Measurement of Antenna Performance 251 6.3 RF Functional Components 256 6.3.1 Bandpass Filters 256 6.3.2 Baluns 257 6.3.3 Switches and Duplexers 262 6.4 EMI/EMC 263 6.4.1 Sources of Interference 264 6.4.2 Diagnostic and Regulations Conformation Techniques 264 6.4.3 Containment Techniques 267 7 Product, Process Development, and Control 271 7.1 Business Processes 272 7.1.1 Strategic Management (Product and Process Development) 272 7.1.2 Design and Manufacturing; Outsourced or Not 273 7.2 History of Statistical Approach for Quality Management 273 7.2.1 Quality Guidelines and Standards 274 7.2.2 Semiconductor Process Development and Characterization 274 7.3 APQP—An Iterative Process for Product and Process Development 275 7.3.1 Translate Product Ideas Into Processes 275 7.4 FMEA, Control Plan, and Initial Process Study 276 7.4.1 RPN 276 7.4.2 Locating the Root Causes 281 7.4.3 Pre-Launch Control Plan 283 7.4.4 Initial Process Study 284 7.5 PPAP and SPC 287 7.5.1 PPAP 287 7.5.2 SPC 287 8 Product Life and Reliability Assessment 291 8.1 Product Life Prediction 292 8.1.1 Calculate MTTF from Processes and Theoretical Distributions 293 8.1.2 Practices to Obtain the Expected Product Life 296 8.1.3 Activation Energy 300 8.2 Reliability Assessment 301 8.2.1 Assessment Variables for Reliability Tests 302 8.2.2 Reliability Assessment Practices 303 8.2.3 Discussions on Weibull Analysis and Weibull Plotting 309 9 Hardware Solutions for 5G Mobility 317 9.1 5G Mobility Products and Planar Solutions 318 9.1.1 High-Density and Logic Products 319 9.1.2 RF-Passives Systems 326 9.1.3 A Summary: WLP and LPP Used for Both HD&L and RF-Passives Products 333 9.2 Advanced Interconnection and Future Business Model 336 9.2.1 Advanced Interconnection 336 9.2.2 New Business Model 341 9.3 Finale—What’s Not 343 9.3.1 New from Wafer Foundries 343 9.3.2 System and Architectural Design of Mobile Handsets 345 9.3.3 Thermo-Mechanical and Thermal Science 349 9.3.4 Sensors and IoT 349 A Failure Mechanisms and Failure Analysis 357 A.1 Failure Mechanisms, or Macroscopic Models 358 A.1.1 Silicon Oxide Breakdown 359 A.1.2 Stress-Induced Migration (SM) 360 A.1.3 Electro-Migration (EM) and Hillocks 360 A.1.4 Spiking 362 A.1.5 IMC, Purple plague (Gold-Al Intermetallics) 363 A.1.6 Fatigue and Creeping 364 A.1.7 Die Cracking 366 A.1.8 Delamination and Popcorning 366 A.1.9 Corrosion 367 A.2 Failure Analysis (FA) Techniques and FA Tools 368 A.2.1 De-Processing (or De-Capping) Techniques 368 A.2.2 Microscopic and Analytical Tools 369 B ANOVA 375 B.1 One-Way ANOVA 376 B.2 Two-Way ANOVA 377 C Gauge R&R and DOE 381 C.1 GR&R 381 C.1.1 AIAG’s Xbar/Range Method for Gauge R&R Study 381 C.1.2 Minitab 383 C.1.3 GR&R Casted in the ANOVA Format 383 C.1.4 Criteria 384 C.2 DOE 384 C.2.1 DOE Guidelines 385 C.2.2 2k Runs, Unreplicated Case 386 C.2.3 Fractional Factorial Designs, 2k-p Run, p = 1, 2,.., < k 399 D Statistics Tables 409 D.1 F Distribution 409 D.2 Poisson Table of Expected # of Occurrences at a Confidence Level (C.L.) 409 D.3 MR Percentile Table 409
£104.36
John Wiley & Sons Inc Advances in Embedded and FanOut Wafer Level
Book SynopsisExamines the advantages of Embedded and FO-WLP technologies, potential application spaces, package structures available in the industry, process flows, and material challenges Embedded and fan-out wafer level packaging (FO-WLP) technologies have been developed across the industry over the past 15 years and have been in high volume manufacturing for nearly a decade. This book covers the advances that have been made in this new packaging technology and discusses the many benefits it provides to the electronic packaging industry and supply chain. It provides a compact overview of the major types of technologies offered in this field, on what is available, how it is processed, what is driving its development, and the pros and cons. Filled with contributions from some of the field''s leading experts,Advances in Embedded and Fan-Out Wafer Level Packaging Technologies begins with a look at the history of the technology. It then goes on to examine the biggest tecTable of ContentsPreface xvii List of Contributors xxiii Acknowledgments xxvii 1 History of Embedded and Fan-Out Packaging Technology 1Michael Topper, Andreas Ostmann, Tanja Braun, and Klaus-Dieter Lang 2 FO-WLP Market and Technology Trends 39E. Jan Vardaman 3 Embedded Wafer-Level Ball Grid Array (eWLB) Packaging Technology Platform 55Thorsten Meyer and Steffen Krohnert 4 Ultrathin 3D FO-WLP eWLB-PoP (Embedded Wafer-Level Ball Grid Array-Package-on-Package) Technology 77S.W. Yoon 5 NEPES’ Fan-Out Packaging Technology from Single die, SiP to Panel-Level Packaging 97Jong Heon (Jay) Kim 6 M-Series Fan-Out with Adaptive Patterning 117Tim Olson and Chris Scanlan 7 SWIFTR Semiconductor Packaging Technology 141Ron Huemoeller and Curtis Zwenger 8 Embedded Silicon Fan-Out (eSiFOR) Technology for Wafer-Level System Integration 169Daquan Yu 9 Embedding of Active and Passive Devices by Using an Embedded Interposer: The i2 Board Technology 185Thomas Gottwald, Christian Roessle, and Alexander Neumann 10 Embedding of Power Electronic Components: The Smart p2 Pack Technology 201Thomas Gottwald and Christian Roessle 11 Embedded Die in Substrate (Panel-Level) Packaging Technology 217Tomoko Takahashi and Akio Katsumata 12 Blade: A Chip-First Embedded Technology for Power Packaging 241Boris Plikat and Thorsten Scharf 13 The Role of Liquid Molding Compounds in the Success of Fan-Out Wafer-Level Packaging Technology 261Katsushi Kan, Michiyasu Sugahara, and Markus Cichon 14 Advanced Dielectric Materials (Polyimides and Polybenzoxazoles) for Fan-Out Wafer-Level Packaging (FO-WLP) 271T. Enomoto, J.I. Matthews, and T. Motobe 15 Enabling Low Temperature Cure Dielectrics for Advanced Wafer-Level Packaging 317Stefan Vanclooster and Dimitri Janssen 16 The Role of Pick and Place in Fan-Out Wafer-Level Packaging 347Hugo Pristauz, Alastair Attard, and Harald Meixner 17 Process and Equipment for eWLB: Chip Embedding by Molding 371Edward Furgut, Hirohito Oshimori, and Hiroaki Yamagishi 18 Tools for Fan-Out Wafer-Level Package Processing 403Nelson Fan, Eric Kuah, Eric Ng, and Otto Cheung 19 Equipment and Process for eWLB: Required PVD/Sputter Solutions 419Chris Jones, Ricardo Gaio, and Jose Castro 20 Excimer Laser Ablation for the Patterning of Ultra-fine Routings 441Habib Hichri, Markus Arendt, and Seongkuk Lee 21 Temporary Carrier Technologies for eWLB and RDL-First Fan-Out Wafer-Level Packages 457Thomas Uhrmann and Boris Povaay 22 Encapsulated Wafer-Level Package Technology (eWLCSP): Robust WLCSP Reliability with Sidewall Protection 471S.W. Yoon 23 Embedded Multi-die Interconnect Bridge (EMIB): A Localized, High Density, High Bandwidth Packaging Interconnect 487Ravi Mahajan, Robert Sankman, Kemal Aygun, Zhiguo Qian, Ashish Dhall, Jonathan Rosch, Debendra Mallik, and Islam Salama 24 Interconnection Technology Innovations in 2.5D Integrated Electronic Systems 501Paragkumar A. Thadesar, Paul K. Jo, and Muhannad S. Bakir References 515 Index 521
£105.26
John Wiley & Sons Inc Systems Engineering Neural Networks
Book SynopsisSYSTEMS ENGINEERING NEURAL NETWORKS A complete and authoritative discussion of systems engineering and neural networks In Systems Engineering Neural Networks, a team of distinguished researchers deliver a thorough exploration of the fundamental concepts underpinning the creation and improvement of neural networks with a systems engineering mindset. In the book, you'll find a general theoretical discussion of both systems engineering and neural networks accompanied by coverage of relevant and specific topics, from deep learning fundamentals to sport business applications. Readers will discover in-depth examples derived from many years of engineering experience, a comprehensive glossary with links to further reading, and supplementary online content. The authors have also included a variety of applications programmed in both Python 3 and Microsoft Excel. The book provides: A thorough introduction to neural networks, introduced as key element of complex systems Practical discussions of sTable of ContentsABOUT THE AUTHORS ACKNOWLEDGEMENTS 7 HOW TO READ THIS BOOK 8 Part I 9 1 A BRIEF INTRODUCTION 9 THE SYSTEMS ENGINEERING APPROACH TO ARTIFICIAL INTELLIGENCE (AI) 14 SOURCES 18 CHAPTER SUMMARY 18 QUESTIONS 19 2 DEFINING A NEURAL NETWORK 20 BIOLOGICAL NETWORKS 22 FROM BIOLOGY TO MATHEMATICS 24 WE CAME A FULL CIRCLE 25 THE MODEL OF McCULLOCH-PITTS 25 THE ARTIFICIAL NEURON OF ROSENBLATT 26 FINAL REMARKS 33 SOURCES 35 CHAPTER SUMMARY 36 QUESTIONS 37 3 ENGINEERING NEURAL NETWORKS 38 A BRIEF RECAP ON SYSTEMS ENGINEERING 40 THE KEYSTONE: SE4AI AND AI4SE 41 ENGINEERING COMPLEXITY 41 THE SPORT SYSTEM 45 ENGINEERING A SPORT CLUB 51 OPTIMISATION 52 AN EXAMPLE OF DECISION MAKING 56 FUTURISM AND FORESIGHT 60 QUALITATIVE TO QUANTITATIVE 61 FUZZY THINKING 64 IT IS ALL IN THE TOOLS 74 SOURCES 77 CHAPTER SUMMARY 77 QUESTIONS 78 Part II 79 4 SYSTEMS THINKING FOR SOFTWARE DEVELOPMENT 79 PROGRAMMING LANGUAGES 82 ONE MORE THING: SOFTWARE ENGINEERING 94 CHAPTER SUMMARY 101 QUESTIONS 102 SOURCES 102 5 PRACTICE MAKES PERFECT 103 EXAMPLE 1: COSINE FUNCTION 105 EXAMPLE 2: CORROSION ON A METAL STRUCTURE 112 EXAMPLE 3: DEFINING ROLES OF ATHLETES 127 EXAMPLE 4: ATHLETE’S PERFORMANCE 134 EXAMPLE 5: TEAM PERFORMANCE 142 A human-defined-system 142 Human Factors 143 The sport team as system of interest 144 Impact of Human Error on Sports Team Performance 145 EXAMPLE 6: TREND PREDICTION 156 EXAMPLE 7: SYMPLEX AND GAME THEORY 163 EXAMPLE 8: SORTING MACHINE FOR LEGO® BRICKS 168 Part III 174 6 INPUT/OUTPUT, HIDDEN LAYER AND BIAS 174 INPUT/OUTPUT 175 HIDDEN LAYER 180 BIAS 184 FINAL REMARKS 186 CHAPTER SUMMARY 187 QUESTIONS 188 7 ACTIVATION FUNCTION 189 TYPES OF ACTIVATION FUNCTIONS 191 ACTIVATION FUNCTION DERIVATIVES 194 ACTIVATION FUNCTIONS RESPONSE TO W AND b VARIABLES 200 FINAL REMARKS 202 CHAPTER SUMMARY 204 QUESTIONS 205 SOURCES 205 8 COST FUNCTION, BACK-PROPAGATION AND OTHER ITERATIVE METHODS 206 WHAT IS THE DIFFERENCE BETWEEN LOSS AND COST? 209 TRAINING THE NEURAL NETWORK 212 BACK-PROPAGATION (BP) 214 ONE MORE THING: GRADIENT METHOD AND CONJUGATE GRADIENT METHOD 218 ONE MORE THING: NEWTON’S METHOD 221 CHAPTER SUMMARY 223 QUESTIONS 224 SOURCES 224 9 CONCLUSIONS AND FUTURE DEVELOPMENTS 225 GLOSSARY AND INSIGHTS 233
£88.65
John Wiley & Sons Inc Security Patterns in Practice
Book SynopsisLearn to combine security theory and code to produce secure systems Security is clearly a crucial issue to consider during the design and implementation of any distributed software architecture. Security patterns are increasingly being used by developers who take security into serious consideration from the creation of their work.
£36.80
Taylor & Francis Ltd Exascale Scientific Applications
Book SynopsisFrom the Foreword:The authors of the chapters in this book are the pioneers who will explore the exascale frontier. The path forward will not be easy... These authors, along with their colleagues who will produce these powerful computer systems will, with dedication and determination, overcome the scalability problem, discover the new algorithms needed to achieve exascale performance for the broad range of applications that they represent, and create the new tools needed to support the development of scalable and portable science and engineering applications. Although the focus is on exascale computers, the benefits will permeate all of science and engineering because the technologies developed for the exascale computers of tomorrow will also power the petascale servers and terascale workstations of tomorrow. These affordable computing capabilities will empower scientists and engineers everywhere. Thom H. Dunning, Jr., Pacific Northwest National Laboratory and University Trade Review"Numerical simulation is now a need in many fields of science, technology, and industry. The complexity of the simulated systems coupled with the massive use of data makes the HPC essential to move towards predictive simulations. Advances in computer architecture have so far permitted scientific advances, but at the cost of continually adapting algorithms and applications. The next technological breaks force us to rethink the applications by taking energy consumption into account. These profound modifications require not only anticipation and sharing but also a paradigm shift in application design to ensure the sustainability of developments by guaranteeing a certain independence of the applications to the profound modifications of the architectures: it is the passage from optimal performance to the portability of performance. It is the challenge of this book to demonstrate by example the approach that one can adopt for the development of applications offering a portability of the performances in spite of the profound changes of the computing architectures."— Christophe Calvin, CEA, Fundamental Research Division, Scalay, France"This comprehensive summary of applications targeting Exascale at the three DoE labs is a must read."— Rio Yokota, Tokyo Institute of Technology, Tokyo, Japan"Three editors, one from each of the High Performance Computer Centers at Lawrence Berkeley, Argonne, and Oak Ridge National Laboratories, have complied a very useful set of chapters aimed at describing software developments for the next generation exa-scale computers. Such a book is needed for scientists and engineers to see where the field is going and how they will be able to exploit such architectures for their own work. The book will also benefit students as it provides insights into how to develop software for such computer architectures. Overall, this book fills an important need in showing how to design and implement algorithms for exa-scale architectures which are heterogeneous and have unique memory systems. The book discusses issues with developing user codes for these architectures and how to address these issues including actual coding examples.’ — Dr. David A. Dixon, Robert Ramsay Chair, The University of Alabama, USA"Numerical simulation is now a need in many fields of science, technology, and industry. The complexity of the simulated systems coupled with the massive use of data makes the HPC essential to move towards predictive simulations. Advances in computer architecture have so far permitted scientific advances, but at the cost of continually adapting algorithms and applications. The next technological breaks force us to rethink the applications by taking energy consumption into account. These profound modifications require not only anticipation and sharing but also a paradigm shift in application design to ensure the sustainability of developments by guaranteeing a certain independence of the applications to the profound modifications of the architectures: it is the passage from optimal performance to the portability of performance. It is the challenge of this book to demonstrate by example the approach that one can adopt for the development of applications offering a portability of the performances in spite of the profound changes of the computing architectures."— Christophe Calvin, CEA, Fundamental Research Division, Scalay, France"This comprehensive summary of applications targeting Exascale at the three DoE labs is a must read."— Rio Yokota, Tokyo Institute of Technology, Tokyo, Japan"Three editors, one from each of the High Performance Computer Centers at Lawrence Berkeley, Argonne, and Oak Ridge National Laboratories, have complied a very useful set of chapters aimed at describing software developments for the next generation exa-scale computers. Such a book is needed for scientists and engineers to see where the field is going and how they will be able to exploit such architectures for their own work. The book will also benefit students as it provides insights into how to develop software for such computer architectures. Overall, this book fills an important need in showing how to design and implement algorithms for exa-scale architectures which are heterogeneous and have unique memory systems. The book discusses issues with developing user codes for these architectures and how to address these issues including actual coding examples.’ — Dr. David A. Dixon, Robert Ramsay Chair, The University of Alabama, USATable of Contents1. Portable Methodologies for Energy Optimization on Large-Scale Power-Constrained Systems 2. Performance Analysis and Debugging Tools at Scale 3. Exascale Challenges in Numerical Linear and Multilinear Algebras 4. Exposing Hierarchical Parallelism in the FLASH Code for Supernova Simulation on Summit and Other Architectures 5. NAMD: Scalable Molecular Dynamics Based on the Charm++ Parallel Runtime System 6. Developments in Computer Architecture and the Birth and Growth of Computational Chemistry 7. On Preparing the Super Instruction Architecture and Aces4 for Future Computer Systems 8. Transitioning NWChem to the Next Generation of Manycore Machines 9. Exascale Programming Approaches for Accelerated Climate Modeling for Energy 10. Preparing the Community Earth System Model for Exascale Computing 11. Large Eddy Simulation of Reacting Flow Physics and Combustion 12. S3D-Legion: An Exascale Software for Direct Numerical Simulation of Turbulent Combustion with Complex Multicomponent Chemistry 13. Data and Work_ow Management for Exascale Global Adjoint Tomography 14. Scalable Structured Adaptive Mesh Refinement with Complex Geometry 15. Extreme Scale Unstructured Adaptive CFD for Aerodynamic Flow Control 16. Lattice Quantum Chromodynamics and Chroma 17. PIC Codes on the Road to Exascale Architectures 18. Extreme-Scale De Novo Genome Assembly 19. Exascale Scientific Applications: Programming Approaches for Scalability, Performance, and Portability: KKRnano 20. Real-Space Multiple-Scattering Theory and Its Applications at Exascale 21 Development of QMCPACK for Exascale Scientific Computing 22. Preparing an Excited-State Materials Application for Exascale 23. Global Gyrokinetic Particle-in-Cell Simulation 24. The Fusion Code XGC: Enabling Kinetic Study of Multiscale Edge Turbulent Transport in ITER
£117.00
CRC Press Handbook on Mobile and Ubiquitous Computing
Book SynopsisConsolidating recent research in the area, the Handbook on Mobile and Ubiquitous Computing: Status and Perspective illustrates the design, implementation, and deployment of mobile and ubiquitous systems, particularly in mobile and ubiquitous environments, modeling, database components, and wireless infrastructures.Supplying an overarching perspective, the book is ideal for researchers, graduate students, and industry practitioners in computer science and engineering interested in recent developments in mobile and ubiquitous computing. It discusses new trends in intelligent systems, reviews sensory input and multimedia information, and examines embedded real-time systems. With coverage that spans security, privacy, and trust, the book is divided into six parts: Mobile and Ubiquitous Computingâillustrates the concepts, design, implementation, and deployment of mobile and ubiquitous systems Smart Environments and Agent SystemsâdiscTable of ContentsMobile and Ubiquitous Computing. Smart Environments and Agent Systems. Human–Computer Interaction (HCI) and Multimedia Computing. Security, Privacy, and Trust Management. Embedded Real-Time Systems. Networking Sensing and Communications.
£46.54
Taylor & Francis Ltd 5G LTE Narrowband Internet of Things NBIoT
Book SynopsisThis book explains the 3GPP technical specifications for the upcoming 5G Internet of Things (IoT) technology based on latest release which is Release 15. It details the LTE protocol stack of an IoT device, architecture and framework, how they are functioning and communicate with cellular infrastructure, and supported features and capability. NB-IoT is designed to connect a large number of devices in a wide range of application domains forming so-called Internet of Things (IoT). Connected devices are to communicate through cellular infrastructure. This technology is new within the 3GPP specifications and is part of upcoming new wireless technology known as 5G.Table of ContentsPreface. Acknowledgments. Author. List of Abbreviations. 1. Internet of Things. 2. 4G and 5G Systems. 3. Radio Resource Control Sublayer. 4. Packet Data Convergence Protocol Sublayer. 5. Radio Link Control Sublayer. 6. Medium Access Control Sublayer. 7. Physical SublayerTable of ContentsPreface. Acknowledgments. Author. List of Abbreviations. 1. Internet of Things. 2. 4G and 5G Systems. 3. Radio Resource Control Sublayer. 4. Packet Data Convergence Protocol Sublayer. 5. Radio Link Control Sublayer. 6. Medium Access Control Sublayer. 7. Physical Sublayer. 8. Quality of Service Architecture. 9. Use Cases and Deployment. References. Index.
£74.09
Taylor & Francis Ltd FrequencyDomain Receiver Design for Doubly
Book SynopsisFrequency-Domain Receiver Design for Doubly-Selective Channels discusses broadband wireless transmission techniques, which are serious candidates to be implemented in future broadband wireless and cellular systems, aiming at providing high and reliable data transmission and concomitantly high mobility. This book provides an overview of the channel impairments that may affect performance of single carrier and multi-carrier block transmission techniques in mobile environments. Moreover, it also provides a new insight into the new receiver designs able to cope with double selectivity that affects present and future broadband high speed mobile communication systems. Trade Review"The book presents a strong analytical rigor and very interesting solutions to some of the most important challenges that wireless communication engineers face. All the analytical derivations and innovative results are well supported by a large set of figures which turns the book a very useful tool. It also presents an important revision of existing techniques, which clearly enrich its quality."— João Guerreiro, Instituto de Telecomunicações, Lisbon, Portugal"The book covers a timely and important topic for current and future wireless communication systems." — Imad Barhumi, United Arab Emirates University, Al Ain, Abu Dhabi"Advanced receiver designs for frequency selective channels was, from the beginning, a disruptive idea which opened horizons to up-until-then unimaginable data rates and system capacities in wireless systems. This book offers a fresh look at receiver designs, and looks at its combination with SC-FDE and OFDM, and the impact at the system-level. Receiver designs remains a pillar of high-speed systems beyond 4G which incorporate massive MIMO and network coding at the physical layer."—Mário Marques da Silva, Universidade Autónoma de Lisboa, Portugal"There are not many books addressing the treatment of Doubly Selective Channels, and none devoted especially to the design of frequency domain receivers….this book appears to treat both block based single carrier and multicarrier communications, comparing them both in detail, on the contrary of most books devoted to multicarrier, with special emphasis on OFDM, although the growing importance of SC-FDE for uplink transmissions. This book seems to fill this void, providing a current view on the state-of-the-art." — Marco Alexandre Cravo Gomes, University of Coimbra, Portugal"This book addresses the state of the art in OFDM and SC-FDE bock transmission schemes. It includes an easy to read overview accompanied by a formal definition of the block transmission schemes and channels models. The most interesting parts cover advanced analytical tools for channel estimation and receiver design for asynchronous networks and for multipath channels with strong Doppler effects. Asynchronous access is envisioned in the transmission schemes for future 5G systems. On the other end, Doppler effects are gaining importance as higher carrier frequencies and broader bands are used. Given the tutorial presentation, these physical layer models can be quite helpful in the design and analysis of cross-layer optimized systems."—Luis Bernardo, Instituto de Telecomunicações, Lisbon, Portugal"Frequency-Domain Receiver Design for Doubly Selective Channels summarizes extensive research work on wireless communication between OFDM and SC-FDE and suggests the optimum approach. In so doing, it might revolutionize wireless communication technology."—IEEE Microwave Magazine, July/August 2018Table of ContentsList of Abbreviations. List of Symbols. Introduction. Motivation and Scope. Book Structure. Fading. Large Scale Fading. Path-Loss. Shadowing. Small Scale Fading. The Multipath Channel. Time-Varying Channel. Block Transmission Techniques. Transmission Structure of a Multicarrier Modulation. Receiver Structure of a Multicarrier Modulation. Multi-Carrier Modulations or Single Carrier Modulations. OFDM Modulations. Analytical Characterization of the OFDM Modulations. Transmission Structure. Reception Structure. SC-FDE Modulations. Transmission Structure. Receiving Structure. Comparative Analysis Between OFDM and SC-FDE. DFE Iterative Receivers. IB-DFE Receiver Structure. IB-DFE with Soft Decisions. Turbo FDE Receiver. Approaching the Matched Filter Bound. Matched Filter Bound. Approaching the Matched Filter Bound. Analytical Computation of the MFB. System Characterization. Performance Results. Performance Results without Channel Coding. Performance Results with Channel Coding. Efficient Channel Estimation for Single Frequency Networks. System Characterization. Channel Estimation. Channel Estimation Enhancement. Decision-Directed Channel Estimation. Performance Results. Conclusions. Asynchronous Single Frequency Networks. SFN Channel Characterization. Impact of Carrier Frequency Offset Effects. Channel and CFO Estimation. Frame Structure. Tracking the Variations of the Equivalent Channel. Adaptive Receivers for SFN with Different CFOs. Method I Method II Method III. Performance Results. Multipath Channels with Strong Doppler Effects. Doppler Frequency Shift due to Movement. Modeling Short-Term Channel Variations. Generic Model for Short-Term Channel Variations. A Novel Model for Short-Term Channel Variations. Channel Estimation and Tracking. Channel Estimation. Tracking of the Channel Variations. Using the Sampling Theorem to Track the Channel Variations. Novel Tracking Technique. Receiver Design. Performance Results.Important Statistical Parameters. Rayleigh Distribution. Rician Distribution. Nakagami-m Distribution. Complex Baseband Representation. Minimum Error Variance.
£137.75
McGraw Hill Education India Loose Leaf for Fundamentals of Digital Logic with
Book Synopsis
£174.60
Cambridge University Press Computer Architecture for Scientists
Book SynopsisThe dramatic increase in computer performance has been extraordinary, but not for all computations: it has key limits and structure.Software architects, developers, and even data scientists need to understand how exploit the fundamental structure of computer performance to harness it for future applications. Ideal for upper level undergraduates, Computer Architecture for Scientists covers four key pillars of computer performance and imparts a high-level basis for reasoning with and understanding these concepts: Small is fast how size scaling drives performance; Implicit parallelism how a sequential program can be executed faster with parallelism; Dynamic locality skirting physical limits, by arranging data in a smaller space; Parallelism increasing performance with teams of workers. These principles and models provide approachable high-level insights and quantitative modelling without distracting low-level detail. Finally, the text covers the GPU and machine-learning accelerators tTrade Review'Andrew Chien's Computer Architecture for Scientists: Principles and Practice is a timely and much-needed treatment of how computer architecture impacts the scalability and performance of the computing systems and the data-driven processes that operate at the upper levels of the software stack. Aimed at software engineers and data scientists, this book provides a holistic and principled coverage of technology-agnostic concepts that govern the interplay between hardware capabilities and software performance. Understanding this interplay is crucial as it allows practitioners not only to reason about the performance of the systems they develop, but in fact to design these systems in a way that leverages the architectural features of the hardware systems on which they are built.' Azer Bestavros, Associate Provost for Computing and Data Sciences, Boston University'This is a very timely book on computer architecture aimed at the new generation of computational scientists and data scientists. The end of Dennard Scaling, coupled with the breakthrough of Deep Neural Networks in Machine Learning, has led to the need for a radical re-think in the teaching of computer architecture. Andrew Chien's book addresses this need and gives scientific software developers a high-level understanding of the emerging computer architectures and the design principles they require to obtain maximum computer performance from their programs.' Tony Hey, Chief Data Scientist, Rutherford Appleton Lab, U.K.'Hurray for Computer Architecture for Scientists! Finally, a book aimed squarely at the rising complexities at the intersection of Moore's Law scaling of technology and the dizzying array of diverse computer architectures that have resulted. General versus special-purpose, programmable versus configurable, and a growing basket of colors and flavors of parallelism. While these make sense to working computer architects and chip designers – what of scientists and engineers just trying to get stuff done? Chien does a splendid job of translating and demystifying why and how computer architectures matter, how users can understand them, and use these insights to wrestle them into submission to do good science.' Rob A. Rutenbar, Distinguished Professor of Computer Science and Electrical and Computer Engineering, University of Pittsburgh'Andrew Chien's book connects the dots from interdependent architectural choices to underlying calculus of performance and in the process strikes a balance between high-level view of the machine and its realizations. It is essential that users of these tools have an intimate understanding of the principles and mechanisms that make computing machines deliver efficient and high performance without becoming hardware designers themselves. The book provides such insights through its succinctly stated principles that both educate and enlighten about fundamental abstractions in computing.' Rajesh Gupta, Professor of Computer Science and Engineering, University of California, San DiegoTable of ContentsPreface; 1. Computing and the transformation of society; 2. Instruction sets, software, and instruction execution; 3. Processors: small is fast and scaling; 4. Sequential abstraction, but parallel implementation; 5. Memories: exploiting dynamic locality; 6. The general-purpose computer; 7. Beyond sequential: parallelism in multi-core and the Cloud; 8. Accelerators: customized architectures for performance; 9. Computing performance: past, present, and future; References, Index.
£49.99
Taylor & Francis Ltd Process Algebra for Parallel and Distributed
Book SynopsisCollects the Latest Research Involving the Application of Process Algebra to ComputingExploring state-of-the-art applications, Process Algebra for Parallel and Distributed Processing shows how one formal method of reasoningprocess algebrahas become a powerful tool for solving design and implementation challenges of concurrent systems. Parallel ProgrammingDivided into three parts, the book begins by parallelizing an algorithm for the Cell Broadband Engine processor of IBM, Sony, and Toshiba. It also develops a runtime environment that can be ported to different parallel platforms and describes the formal model of action systems. Distributed SystemsThe next part presents a process algebra (mCRL2) that targets distributed applications, looks at how to turn prose descriptions into unambiguous specifications, extends pi-calculus to create a service-oriented mobility abstract machTable of ContentsParallel Programming. Distributed Systems. Embedded Systems. Index.
£117.00
Taylor & Francis Ltd VMware ESX Essentials in the Virtual Data Center
Book SynopsisFlexible and efficient, VMware ESX is the tool of choice for enterprise data centers looking to make the most of the latest virtualization methods. However, to date, no single manual provides users with a systematic way to understand and take full advantage of all its features and options.Novel Solutions for Every Level of the IT ChainVMware ESX Essentials in the Virtual Data Center answers that need. Written by pioneers and established experts in the field of virtualization with years of hands-on experience, it details the product and outlines innovative ways to use virtualization within the organization. With novel solutions for every level of the IT chain, this text is a complete guide to the design, operation, and management of the ESX product.Featuring technical information, best practices, and technology breakdowns needed to answer real business challenges, this succinct volume Shows how to install ESX, either Table of ContentsBASIC CONCEPTS. Introduction to Virtualization. Types of Server Virtualization Technologies. Server Virtualization Concepts. IMPLEMENTING VMware ESX SERVER. The VMware ESX Server Platform, Installation Step-By-Step. Configuration. Creating a Virtual Machine. Advanced Platform Topics. VMware INFRASTRUCTURE AND THE VIRTUAL DATA CENTER. Introduction. Creating a Virtual Data Center. Management.
£66.49
Taylor & Francis Inc Introduction to Grid Computing
Book SynopsisA Thorough Overview of the Next Generation in ComputingPoised to follow in the footsteps of the Internet, grid computing is on the verge of becoming more robust and accessible to the public in the near future. Focusing on this novel, yet already powerful, technology, Introduction to Grid Computing explores state-of-the-art grid projects, core grid technologies, and applications of the grid.After comparing the grid with other distributed systems, the book covers two important aspects of a grid system: scheduling of jobs and resource discovery and monitoring in grid. It then discusses existing and emerging security technologies, such as WS-Security and OGSA security, as well as the functions of grid middleware at a conceptual level. The authors also describe famous grid projects, demonstrate the pricing of European options through the use of the Monte Carlo method on grids, and highlight different paraTrade ReviewThe book illustrates the state-of-the-art technologies and research activities in the field of Grid computing. ... a number of Grid applications are carefully treated. ... Written in a tutorial style, the book can be successfully used as support for Grid computing lectures. Particularly useful are in this direction the three annexes giving details about the two most popular Grid middleware systems, Globus Toolkit and gLite. -Zentralblatt MATH 1167Table of ContentsIntroduction to Grid Computing. Data Management. Grid Scheduling and Information Services. Security in Grid Computing. Grid Middleware. Architectural Overview of Grid Projects. Monte Carlo Method. Partial Differential Equations. Appendices. Glossary. Index.
£94.99
Taylor & Francis Inc BioInspired Computing and Networking
Book SynopsisSeeking new methods to satisfy increasing communication demands, researchers continue to find inspiration from the complex systems found in nature. From ant-inspired allocation to a swarm algorithm derived from honeybees, Bio-Inspired Computing and Networking explains how the study of biological systems can significantly improve computing, networking, and robotics. Containing contributions from leading researchers from around the world, the book investigates the fundamental aspects and applications of bio-inspired computing and networking. Presenting the latest advances in bio-inspired communication, computing, networking, clustering, optimization, and robotics, the book considers state-of-the-art approaches, novel technologies, and experimental studies, including bio-inspired: Optimization of dynamic NP-hard problems Top-down controller design for distributing a robot swarm among multiple tasks Self-organTable of ContentsAnimal Behaviors and Animal Communications. Animal Models for Computing and Communications: Past Approaches and Future Challenges. Social Behaviors of the California Sea Lion, Bottlenose Dolphin, and Orca Whale. Bio-Inspired Computing and Robots. Social Insect Societies for the Optimization of Dynamic NP-Hard Problems. Bio-Inspired Locomotion Control of the Hexapod Robot Gregor III. BEECLUST: A Swarm Algorithm Derived from Honeybees: Derivation of the Algorithm, Analysis by Mathematical Models, and Implementation on a Robot Swarm. Self-Organizing Data and Signals Cellular Systems. Bio-Inspired Process Control. Multirobot Search Using Bio-Inspired Cooperation and Communication Paradigms. Abstractions for Planning and Control of Robotic Swarms. Ant-Inspired Allocation: Top-Down Controller Design for Distributing A Robot Swarm among Multiple Tasks. Human Peripheral Nervous System Controlling Robots. Bio-Inspired Communications and Networks. Adaptive Social Hierarchies: From Nature to Networks. Chemical Relaying Protocols. Attractor Selection as Self-Adaptive Control Mechanism for Communication Networks. Topological Robustness of Biological Systems for Information Networks—Modularity. Biologically Inspired Dynamic Spectrum Access in Cognitive Radio Networks. Weakly Connected Oscillatory Networks for Information Processing. Modeling the Dynamics of Cellular Signaling for Communication Networks. A Biologically Inspired QoS-Aware Architecture for Scalable, Adaptive, and Survivable Network Systems.
£180.50
Xlibris IT Architecture in Action
£23.00
Taylor & Francis Inc EnergyAware Memory Management for Embedded
Book SynopsisEnergy-Aware Memory Management for Embedded Multimedia Systems: A Computer-Aided Design Approach presents recent computer-aided design (CAD) ideas that address memory management tasks, particularly the optimization of energy consumption in the memory subsystem. It explains how to efficiently implement CAD solutions, including theoretical methods and novel algorithms. The book covers various energy-aware design techniques, including data-dependence analysis techniques, memory size estimation methods, extensions of mapping approaches, and memory banking approaches. It shows how these techniques are used to evaluate the data storage of an application, reduce dynamic and static energy consumption, design energy-efficient address generation units, and much more.Providing an algebraic framework for memory management tasks, this book illustrates how to optimize energy consumption in memory subsystems using CAD solutions. The algorithmic style ofTable of ContentsComputer-Aided Design for the Energy Optimization in the Memory Architecture of Embedded Systems. The Power of Polyhedra. Computation of Data Storage Requirements for Affine Algorithmic Specifications. Polyhedral Techniques for Parametric Memory Requirement Estimation. Storage Allocation for Streaming-Based Register File. Optimization of the Dynamic Energy Consumption and Signal Mapping in Hierarchical Memory Organizations. Leakage Current Mechanisms and Estimation in Memories and Logic. Leakage Control in SoCs. Energy-Efficient Memory Port Assignment. Energy-Efficient Address-Generation Units and Their Design Methodology. Index.
£180.50
Taylor & Francis Inc Emerging Wireless Networks
Book SynopsisAn authoritative collection of research papers and surveys, Emerging Wireless Networks: Concepts, Techniques, and Applications explores recent developments in next-generation wireless networks (NGWNs) and mobile broadband networks technologies, including 4G (LTE, WiMAX), 3G (UMTS, HSPA), WiFi, mobile ad hoc networks, mesh networks, and wireless sensor networks. Focusing on improving the performance of wireless networks and provisioning better quality of service and quality of experience for users, it reports on the standards of different emerging wireless networks, applications, and service frameworks.The book begins by appraising the management challenges in emerging wireless networks. It examines the state-of-the-art in mobility management for IP-based mobile networks, at both the network and link layers. Proposing an integrated network architecture design for NGWNsincluding wireless local, metropolitan, and wide area networksit analyzes WLAN/3GTable of ContentsMOBILITY MANAGEMENT AND NETWORKS CONVERGENCE. Management Challenges for Emerging Wireless Networks. Mobility Management for All-IP Mobile Networks. Integrated Network Architecture Design for Next-Generation Wireless Systems. WLAN/3G Convergence and Advanced Mobility Features. CROSS-LAYER DESIGN AND SESSION CONTINUITY. Mobile VPNs Architectures: Challenges and Issues. Cross-Layer Handover for Mobile WiMAX Networks. Service Continuity Support in Self-Organizing IMS Networks. Vehicular Communication Networks – Challenges, Solutions and Services. RESOURCE MANAGEMENT AND COGNITIVE NETWORKS. Network Coding Approach to Improve TCP Throughput in Wireless Networks. Network Selection and Spectrum Sharing for Cognitive Radio Systems. Network Selection and Congestion Avoidance Control. Efficient Spectrum Band Packing for Hosting Multiple Wireless Systems.
£180.50
Taylor & Francis Inc Reliable Control and Filtering of Linear Systems
Book SynopsisMore and more, the advanced technological systems of today rely on sophisticated control systems designed to assure greater levels of safe operation while optimizing performance. Rather than assuming always perfect conditions, these systems require adaptive approaches capable of coping with inevitable system component faults. Conventional feedback control designs do not offer that capability and can result in unsatisfactory performance or even instability, which is totally unacceptable in complex systems such as aircraft, spacecraft, and nuclear power plants where safety is a paramount concern. Reliable Control and Filtering of Linear Systems with Adaptive Mechanisms presents recent research results that are advancing the field. It shows how adaptive mechanisms can be successfully introduced into the traditional reliable control/filtering, so that, based on the online estimation of eventual faults, the proposed adaptive reliable controller/filter parameters aTable of ContentsIntroduction and Preview. Preliminaries. Reliable H '" Control of Linear Systems with Adaptive Mechanism against Actuator Faults. Reliable H", Control of Linear Systems with Adaptive Mechanism against Sensor Failures. Adaptive Reliable H
£128.25
Taylor & Francis Inc Game Theory in Communication Networks
Book SynopsisA mathematical tool for scientists and researchers who work with computer and communication networks, Game Theory in Communication Networks: Cooperative Resolution of Interactive Networking Scenarios addresses the question of how to promote cooperative behavior in interactive situations between heterogeneous entities in communication networking scenarios. It explores network design and management from a theoretical perspective, using game theory and graph theory to analyze strategic situations and demonstrate profitable behaviors of the cooperative entities.The book promotes the use of Game Theory to address important resource management and security issues found in next generation communications networks, particularly heterogeneous networks, for cases where cooperative interactive networking scenarios can be formulated. It provides solutions for representative mechanisms that need improvement by presenting a theoretical step-by-step approach. The text begiTable of ContentsGAMES OF TWO PLAYERS. Network Selection and User-Network Interaction. Payment-Partition Between Two Cooperating Networks. Inter-Technology Handover. Context-Aware Security Provisioning Against a Single Intruder. GAMES OF MULTIPLE PLAYERS. Network Selection and Auctions Between Multiple Networks. Network Synthesis to Support Large Traffic Demands. Admission Control for Simultaneous Service Requests. CASE STUDIES.
£126.00
Taylor & Francis Inc Performance Evaluation of Computer and
Book SynopsisThis book is written for computer engineers and scientists active in the development of software and hardware systems. It supplies the understanding and tools needed to effectively evaluate the performance of individual computer and communication systems. It covers the theoretical foundations of the field as well as specific software packages being employed by leaders in the field.Trade Review… written by a scientist successful in performance evaluation, it is based on his experience and provides many ideas not only to laymen entering the field, but also to practitioners looking for inspiration. The work can be read systematically as a textbook on how to model and test the derived hypotheses on the basis of simulations. Also, separate parts can be studied, as the chapters are self-contained. … the book can be successfully used either for self-study or as a supplementary book for a lecture. I believe that different types of readers will like it: practicing engineers and researchers dealing with new solutions, as well as graduate students starting their adventures in the jungle of performance evaluation. —Piotr Cholda, in IEEE Communications Magazine, October 2011Table of ContentsMethodologyWhat is Performance Evaluation ? Factors Evaluation Methods The Scientific Method Performance Patterns Summarizing Performance Data, Confidence IntervalsSummarized Performance DataConfidence IntervalsThe Independence AssumptionPrediction IntervalWhich Summarization To Use?Other Aspects of Confidence/Prediction IntervalsProofs Model FittingModel Fitting CriteriaLinear Regression Linear Regression with Norm Minimization Choosing a DistributionHeavy TailProofs TestsThe Neyman Pearson FrameworkLikelihood Ratio TestsANOVAAsymptotic ResultsOther TestsProofs ForecastingWhat is Forecasting ? Linear Regression The Overfitting ProblemDifferencing the DataFitting Differenced Data to an ARMA ModelSparse ARMA and ARIMA ModelsProofs Discrete Event SimulationWhat is a Simulation?Simulation TehniquesComputing the Accuracy of Stochastic SimulationsMonte Carlo SimulationRandom Number GeneratorsHow to Sample from a DistributionImportance SamplingProofs Palm Calculus, or the Importance of the ViewpointAn Informal IntroductionPalm CalculusOther Useful Palm Calculus ResultsSimulation Defined as Stochastic RecurrenceApplication to Markov Chain Models and the PASTA PropertyAppendix: Quick Review of Markov ChainsProofsReview Questions Queuing Theory for Those Who Cannot WaitDeterministic AnalysisOperational Laws For Queuing SystemsClassical Results for a Single QueueDefinitions for Queuing NetworksThe Product-Form Theorem Computational AspectsWhat This Tells UsMathematical Details About Product-Form Queuing NetworksCase Study Proofs Each chapter concludes with a Review that includes review questions.
£92.00
Taylor & Francis Inc Desktop Grid Computing
Book SynopsisDesktop Grid Computing presents common techniques used in numerous models, algorithms, and tools developed during the last decade to implement desktop grid computing. These techniques enable the solution of many important sub-problems for middleware design, including scheduling, data management, security, load balancing, result certification, and fault tolerance.The book's first part covers the initial ideas and basic concepts of desktop grid computing. The second part explores challenging current and future problems. Each chapter presents the sub-problems, discusses theoretical and practical issues, offers details about implementation and experiments, and includes references to further reading and notes.One of the first books to give a thorough and up-to-date presentation of this topic, this resource describes various approaches and models as well as recent trends that underline the evolution of deTrade ReviewI think that this book is a necessity-a necessity for researchers, teachers, students, and for people concerned by this topic in the industry. ... I hope that readers of this book will feel the extraordinary freedom that researchers in desktop grids or volunteer computing enjoy. I hope that students will engage themselves in this research domain and continue to reinvent it. -Franck Cappello, Co-Director, INRIA-Illinois Joint Laboratory on PetaScale ComputingTable of ContentsTHE BIRTH: Volunteer Computing and BOINC. Open, Scalable and Self-Regulated Federations of Desktop Grids with OurGrid. The XtremWebCH Volunteer Computing Platform. XtremWeb-HEP: Designing Desktop Grid for the EGEE Infrastructure. A Volunteer Computing Platform Experience for Neuromuscular Disease Problems. How to Work with XtremWeb, Condor, BOINC on Top of BonjourGrid. How to Work with PastryGrid. THE MATURITY AND BEYOND: Challenges in Designing Scheduling Policies in Volunteer Computing. Modeling and Optimizing Availability of Non-Dedicated Resources. Security and Result Certification. Data-Intensive Computing on Desktop Grids. Roles of Desktop Grids in Hybrid Distributed Computing Infrastructures. Supporting Web 2.0 Communities by Volunteer Desktop Grids. Programming Applications for Desktop Grids. Network Awareness in Volunteer Networks. Bibliography. Index.
£166.25
CRC Press Distributed Sensor Networks
Book SynopsisThe best-selling Distributed Sensor Networks became the definitive guide to understanding this far-reaching technology. Preserving the excellence and accessibility of its predecessor, Distributed Sensor Networks, Second Edition once again provides all the fundamentals and applications in one complete, self-contained source. Ideal as a tutorial for students or as research material for engineers, the book gives readers up-to-date, practical insight on all aspects of the field.Revised and expanded, this second edition incorporates contributions from many veterans of the DARPA ISO SENSIT program as well as new material from distinguished researchers in the field. Image and Sensor Signal Processing focuses on software issues and the history and future of sensor networks. The book also covers information fusion and power management.Readers of this book may also be interested in Distributed Sensor Networks, Second Edition: SensorTable of ContentsOverview. Distributed Sensing and Signal Processing. Information Fusion. Power Management. Index.
£194.75
Taylor & Francis Inc Distributed Sensor Networks
Book SynopsisThe best-selling Distributed Sensor Networks became the definitive guide to understanding this far-reaching technology. Preserving the excellence and accessibility of its predecessor, Distributed Sensor Networks, Second Edition once again provides all the fundamentals and applications in one complete, self-contained source. Ideal as a tutorial for students or as research material for engineers, the book gives readers up-to-date, practical insight on all aspects of the field.Revised and expanded, this second edition incorporates contributions from many veterans of the DARPA ISO SENSIT program as well as new material from distinguished researchers in the field. Sensor Networking and Applications focuses on sensor deployment and networking, adaptive tasking, self-configuration, and system control. In the expanded applications section, the book draws on the insight of practitioners in the field. Readers of this Table of ContentsSensor Deployment. Adaptive Tasking. Self-Configuration. System Control. Engineering Examples. Index.
£194.75
Taylor & Francis Inc Multicore Technology
Book SynopsisThe saturation of design complexity and clock frequencies for single-core processors has resulted in the emergence of multicore architectures as an alternative design paradigm. Nowadays, multicore/multithreaded computing systems are not only a de-facto standard for high-end applications, they are also gaining popularity in the field of embedded computing. The start of the multicore era has altered the concepts relating to almost all of the areas of computer architecture design, including core design, memory management, thread scheduling, application support, inter-processor communication, debugging, and power management. This book gives readers a holistic overview of the field and guides them to further avenues of research by covering the state of the art in this area. It includes contributions from industry as well as academia.Table of ContentsArchitecture and Design Flow: MORA: High-Level FPGA Programming Using a Many-Core Framework. Implementing Time-Constrained Applications on a Predictable MPSoc. SESAM: A Virtual Prototyping Solution to Design Multicore Architectures. Parallelism and Optimization: Verified Multicore Parallelism Using Atomic Verifiable Operations. Accelerating Critical Section Execution with Multicore Architectures. Memory Systems: TMbox: A Flexible and Reconfigurable Hybrid Transactional Memory System. EM2. CAFÉ: Cache-Aware Fair and Efficient Scheduling for CMPs. Debugging: Software Debugging Infrastructure for Multicore Systems-on-Chip. Networks-on-Chip: On Chip Interconnects for Multicore Architectures. Routing in Multicore NoCs. Efficient Topologies for 3-D Networks-on-Chip. Network-on-Chip Performance Evaluation Using an Analytical Method. Bibliography. Index.
£185.25
Xlibris VLSI HighSpeed IO Circuits
£39.78
Author Solutions Inc VLSI HighSpeed IO Circuits
£44.53
Taylor & Francis Ltd Drupal Web Profiles
Book SynopsisDemystifying one of the most popular content management systems in use today, Drupal Web Profiles offers a complete introduction to the installation, configuration, and administration of Drupal versions 6 and 7. Filled with worked examples, step-by-step instructions, and hands-on projects, it provides readers with the tools to develop effective business web solutions using Drupal. The book supplies easy-to-follow instruction on the primary aspects of the Drupal frameworkfrom basic installation, configuration, and administration to creating new functionality with custom modules and themes. Defining key Drupal terminology in a way that users and developers can easily understand, this project-based guide explains how to: Create an installation environment for Drupal as well as how to carry out the actual installation Build web applications using Drupal builds and profiles Add new content to a Drupal site and describe, Table of ContentsIntroduction to Drupal. Adding, Classifying and Viewing Content. Administering Drupal. Creating Drupal Themes. Creating Drupal Modules. Building a Community Site with Drupal Commons. Building a Conference Site with COD. Creating a News Publishing Site with OpenPublish. Creating an Intranet with Open Atrium. Creating a Learning Management System with ELMS. Monitoring, Optimizing, and Analyzing a Drupal Site.
£56.04
Taylor & Francis Inc HighSpeed Photonics Interconnects
Book SynopsisDramatic increases in processing power have rapidly scaled on-chip aggregate bandwidths into the Tb/s range. This necessitates a corresponding increase in the amount of data communicated between chips, so as not to limit overall system performance. To meet the increasing demand for interchip communication bandwidth, researchers are investigating the use of high-speed optical interconnect architectures. Unlike their electrical counterparts, optical interconnects offer high bandwidth and negligible frequency-dependent loss, making possible per-channel data rates of more than 10 Gb/s. High-Speed Photonics Interconnects explores some of the groundbreaking technologies and applications that are based on photonics interconnects.From the Evolution of High-Speed I/O Circuits to the Latest in Photonics Interconnects Packaging and LasersFeaturing contributions by experts from academia and industry, the book brings together in one volumeTrade Review"This book provides reviews of a topic of increasing importance: high-speed optical interconnects. The coverage combines topics not often assembled in book format, and the authors are active researchers in the field. It saves the reader arduous hours that would otherwise be spent searching and reviewing reams of published literature to get up to speed on these rapidly evolving topics."—Tony Chan Carusone, Department of Electrical and Computer Engineering, University of Toronto, Canada"… a very good overview of the most cutting-edge interconnect technologies as they apply to computer and communication networks. … The importance now being placed on interconnects as part of an integrated solution for a better and more prolific information processing paradigm is an absolute necessity. Not only because the of the overall power consumption issues we face, but because a world-wide, exponentially expanding interconnect medium will ultimately unite our thoughts, goals and expressions as a global society. This will allow ever newer architectures and models to be conceived, perhaps based on biological systems - where we have consistently found that (our) whole is greater than the sum of (our) parts."—David Rolston, Reflex Photonics Inc., Quebec, Canada"This book provides reviews of a topic of increasing importance: high-speed optical interconnects. The coverage combines topics not often assembled in book format, and the authors are active researchers in the field. It saves the reader arduous hours that would otherwise be spent searching and reviewing reams of published literature to get up to speed on these rapidly evolving topics."—Tony Chan Carusone, Department of Electrical and Computer Engineering, University of Toronto, Canada"… a very good overview of the most cutting-edge interconnect technologies as they apply to computer and communication networks. … The importance now being placed on interconnects as part of an integrated solution for a better and more prolific information processing paradigm is an absolute necessity. Not only because the of the overall power consumption issues we face, but because a world-wide, exponentially expanding interconnect medium will ultimately unite our thoughts, goals and expressions as a global society. This will allow ever newer architectures and models to be conceived, perhaps based on biological systems - where we have consistently found that (our) whole is greater than the sum of (our) parts."—David Rolston, Reflex Photonics Inc., Quebec, CanadaTable of ContentsEnergy-Efficient Photonic Interconnects for Computing Platforms. Low-Loss, High-Performance Chip-to-Chip Electrical Connectivity Using Air-Clad Copper Interconnects. Silicon Photonic Bragg Gratings. Lasers for Optical Interconnects. Vertical-Cavity Surface-Emitting Lasers for Interconnects. High-Speed Photodiodes and Laser Power Converters for the Applications of Green Optical Interconnect. Quantum-Dot Nanophotonics for Photodetection. Rolled-Up Semiconductor Tube Optical Cavities.
£185.25
Taylor & Francis Inc Encyclopedia of Computer Science and Technology
Book SynopsisWith breadth and depth of coverage, the Encyclopedia of Computer Science and Technology, Second Edition has a multi-disciplinary scope, drawing together comprehensive coverage of the inter-related aspects of computer science and technology. The topics covered in this encyclopedia include: General and reference Hardware Computer systems organization Networks Software and its engineering Theory of computation Mathematics of computing Information systems Security and privacy Human-centered computing Computing methodologies Applied computing Professional issues Leading figures in the history of computer science The encyclopedia is structured according to the ACM Computing Classification System (CCS), first published in 1988 but subsequently revised in 2012. This classification system is the most comprehensive and is considered the de facto ontolo
£1,852.50
Taylor & Francis Inc Fundamentals of Parallel Multicore Architecture
Book SynopsisAlthough multicore is now a mainstream architecture, there are few textbooks that cover parallel multicore architectures. Filling this gap, Fundamentals of Parallel Multicore Architecture provides all the material for a graduate or senior undergraduate course that focuses on the architecture of multicore processors. The book is also useful as a reference for professionals who deal with programming on multicore or designing multicore chips.The text's coverage of fundamental topics prepares students to study research papers in the multicore architecture area. The text offers many pedagogical features, including: Sufficiently short chapters that can be comfortably read over a weekend Introducing each concept by first describing the problem and building intuition that leads to the need for the concept Did you know? boxes that present mini case studies, alternative points of view, examples, and other interesting facts or diTrade Review"This text provides a lucid and comprehensive treatment of hardware/software foundations of parallel architectures by a leading expert in the area."—Rajeev Balasubramonian, University of Utah "This book does an excellent job covering parallel multicore architectures and their programming models. It covers these topics in the crucial context of advanced memory hierarchy designs. The text is accessible to senior undergraduate students and graduate students in computer science and computer engineering. … a self-contained reference for the target audience; the text is comprehensive and strikes a good balance between the principles and in-depth details of modern multicore architecture designs."—Robert van Engelen, Florida State University "The author first discusses the basic hardware and history of multicore architectures, then discusses the basic ideas of how to analyze code to determine parallelism (and the basic concepts of different parallelism techniques), and then discusses the specifics of how to write shared memory parallel programs, and so on. In this way, the topics become increasingly focused on the desired content of the book, that of the details in constructing multicore architectures. This book is well organized and thought out, and I imagine that it [will be] well received by students."—Daniel R. Reynolds, Southern Methodist University "… this book would be appealing to students and practitioners who would like to get an in-depth understanding of multicore architecture and designing efficient programs for these architectures."—Purushotham Bangalore, University of Alabama at Birmingham Table of ContentsPerspectives on Multicore Architectures. Perspectives on Parallel Programming. Shared Memory Parallel Programming. Parallel Programming for Linked Data Structures. Introduction to Memory Hierarchy Organization. Introduction to Shared Memory Multiprocessors. Basic Cache Coherence Issues. Hardware Support for Synchronization. Memory Consistency Models. Advanced Cache Coherence Issues. Interconnection Network Architecture. SIMT Architecture. Ask the Experts.
£94.99
Taylor & Francis Inc Mobile Evolution
Book SynopsisThis book presents insights, interpretations, concepts, and interdependent viewsin the landscape of mobile connectivity and servicethat emphasize the significance of a harmonious interplay, cooperation, and coalescing of a variety of interdisciplinary domains of science and art.Mobile Evolution: Insights on Connectivity and Service explores the forward-looking and enabling capabilities of mobile connectivity and service in the context of long term evolution (LTE) systems and multimedia services, as viewed through a lens of human experience. It provides information and guidelines pertaining to the strategies and technologies associated with the next-generation mobile ecosystem.The book examines the intersection between the technology and the human dimension in the context of the ever-changing landscape. It arms you with ideas that you can apply to design, innovation, strategy, and business models for the various facets of mobile communication connectivity and sTable of ContentsGenesis of Personal Communications. Elements of Standardization. Connectivity. Service. Interdependence: Renaissance of Multifaceted Convergence
£63.64
Taylor & Francis Inc Simulation Technologies in Networking and
Book SynopsisSimulation is a widely used mechanism for validating the theoretical models of networking and communication systems. Although the claims made based on simulations are considered to be reliable, how reliable they really are is best determined with real-world implementation trials.Simulation Technologies in Networking and Communications: Selecting the Best Tool for the Test addresses the spectrum of issues regarding the different mechanisms related to simulation technologies in networking and communications fields. Focusing on the practice of simulation testing instead of the theory, it presents the work of more than 50 experts from around the world. Considers superefficient Monte Carlo simulations Describes how to simulate and evaluate multicast routing algorithms Covers simulation tools for cloud computing and broadband passive optical networks Reports on recent developments in simulation tools for WSNs Examines modTable of ContentsSimulation Technologies for Wired Networks. Simulation Technologies for Wireless Networks. Simulation for Communications Technologies. Simulation versus Practical Implementation. Simulation versus Theoretical Modeling.
£126.00
Apple Academic Press Inc. Interconnections for Computer Communications and
Book SynopsisThis book introduces different interconnection networks applied to different systems. Interconnection networks are used to communicate processing units in a multi-processor system, routers in communication networks, and servers in data centers. Queuing techniques are applied to interconnection networks to support a higher utilization of resources. There are different queuing strategies, and these determine not only the performance of the interconnection network, but also the set of requirements to make them work effectively and their cost. Routing algorithms are used to find routes to destinations and directions in what information travels. Additional properties, such as avoiding deadlocks and congestion, are sought. Effective routing algorithms need to be paired up with these networks. The book will introduce the most relevant interconnection networks, queuing strategies, and routing algorithm. It discusses their properties and how these leverage the performance of the whole iTrade Review"The organization of the book is very convenient. It is easy to read each part separately. Moving around the book is easy with a table of contents at the beginning of the book and separate tables of contents starting each chapter. In addition, every chapter ends with sample exercises. All parts of the book are richly illustrated with numerous figures. According to the saying that one image is worth a thousand words, drawings make it much easier for a reader to follow the discussion.The book ends with a very solid bibliography containing 191 positions. The largest part of the bibliography gathers positions from the 1990s and 2000s, but some positions from the three most recent years are also included. Interested readers will then be able to broaden their self-studies on interconnection networks. The bibliography is followed by the useful terms index. In my opinion, this book is mostly aimed at undergraduate students interested in modern telecommunication and computer networks. Nevertheless, graduate students will also find this book a helpful textbook for their learning efforts."—IEEE Communications Magazine, July 2017 IssueTable of ContentsPart I: Processor Interconnections. Multiprocessor Interconnection Networks. Routing. Part II: Data Networks. Internet Protocol (IP) Address Lookup. Packet Classification. Basics of Packet Switching. Input-Queued Switches. Shared-Memory Packet Switches. Load-Balancing Switches. Clos-Network Packet Switches. Buffer Management in Routers. Part III: Data-Center Networks. Data Center Networks.
£147.25
APress Salesforce Architects Handbook A Comprehensive
Book SynopsisChapter 1: Salesforce Architecture.- Chapter 2: The Art of Artifacts.- Chapter 3: Salesforce Application Architecture.- Chapter 4: Salesforce Data Architecture.- Chapter 5: Salesforce Security Architecture.- Chapter 6: Salesforce Integration Architecture.- Chapter 7: Salesforce Identity and Access Management Architecture.- Chapter 8: Salesforce Mobile Architecture.- Chapter 9: Salesforce Development and Deployment Lifecycle.- Appendix A: Salesforce Authorization Flows.- Appendix B: Integration Patterns.- Appendix C: Salesforce Sample Artifacts.-Table of Contents
£46.74
APress Practical EventDriven Microservices Architecture
Book SynopsisIn the simplest terms, event-driven architectures are like onions; they are manageable as a single layer (like a monolith) but when you get into them, they begin to cascade apart and you quickly realize that there are many complex layers (distributed microservices architecture). And that's when the tears begin. This prescriptive guide takes you through the steps of moving a platform with millions of users from a monolith to a microservices event-driven architecture. You will learn about the challenges and complexities that arise in high-throughput environments that often contain upwards of hundreds of microservices. This book is designed to be your single best resource for learning how to apply event-driven architectures in real-world scenarios and offers hundredsof patterns to overcome the common and not so common challenges. While event-driven architectures have been the standard for decoupled, pluggable, evolutionary architectures for years, they have onlyrecently been adopted bTable of ContentsChapter 1. Embracing event-driven architectures 1.1. The truth about monoliths 1.1.1. Anatomy of a typical monolith 1.1.2. It's not all bad 1.1.3. When monoliths become the business constrictor knot 1.1.4. Using event-driven architectures to move away from a monolith 1.2. What are microservices and how do they relate to event-driven 1.3. SOA, microservice, and event-driven architectures 1.4. The promise of event-driven microservices 1.5. When should you use event-driven microservices? 1.6. Overview of the challenges in event-driven architectures 1.7. Summary Chapter 2. Moving from a monolith to an event-driven architecture 2.1. Is migrating to an event-driven architecture your best option? 2.2. How to decide where to start 2.3. Using an event-driven approach to migrate data 2.4. Using change data capture (CDC) 2.4.1. Event-driven and change data capture (CDC), a real-world example 2.5. Event-driven as a source of truth for both systems 2.6. Managing dependencies between the two systems 2.6.1. Dependency from new event-driven services to the monolith 2.6.2. Dependency from the monolith to new event-driven services 2.7. Gradually moving traffic 2.8. Two-way synchronization and living with two sources of truth 2.9. Summary Chapter 3. Defining an event-driven microservice and its boundaries 3.1. Building event-driven microservices 3.1.1. Durable vs. ephemeral message brokers and GDPR 3.1.2. Message types 3.1.3. When to use documents over events 3.1.4. Common event-driven messaging patterns 3.1.5. Event-driven service topologies 3.1.6. Common event-driven pitfalls and anti-patterns 3.2. Organizing event-driven microservice boundaries 3.3. Brief and practical introduction to domain-driven design and bounded contexts 3.4. The impact of aggregate size and common pitfalls 3.5. Request-driven vs. event-driven services 3.6. Adding functionality to an existing microservice vs. creating a new one 3.7. Summary Chapter 4. Event-driven structural patterns and high-level processes 4.1. The challenges of transactional consistency in distributed systems 4.1.1. Why abandon a monolithic database in the first place? 4.1.2. The limitations of distributed transactions 4.1.3. Managing multi-step processes with Sagas 4.2. Event-driven orchestration pattern 4.3. Event-driven choreography pattern 4.4. Orchestration, choreography, or both? 4.5. Data retrieval in event-driven architectures and associated patterns 4.5.1. CQS, CQRS and when to use them 4.5.2. The different flavors of CQRS 4.5.3. When and how to use event sourcing 4.5.4. Using command sourcing and its applicability 4.6. Building multiple read models 4.7. The pitfall of microservice spaghetti architectures and how to avoid it 4.8. Summary Chapter 5. How to manage eventual consistency 5.1. The impacts of eventual consistency and the need for alignment with the business 5.2. Using event schema to leverage eventual consistency 5.3. Applying domain boundaries to leverage eventual consistency 5.4. Event versioning to manage delays 5.5. Saving state to avoid eventual consistency 5.6. End-to-end argument: a real-world use case 5.7. For most use cases, it's not eventual if nobody notices 5.7.1. Autoscaling use case with Prometheus and Kafka 5.8. Tradeoffs of each solution 5.9. Summary Chapter 6. Dealing with event-driven concurrency and out of order messages 6.1. Why is concurrency different in a monolith from an event-driven architecture? 6.2. Pessimistic vs. optimistic concurrency, when and when not to use 6.2.1. Pessimistic vs. optimistic approaches 6.2.2. Solving concurrency by implementation and by architecture 6.3. Using optimistic concurrency 6.4. Using pessimistic concurrency 6.4.1. Distributed locks 6.4.2. Database transactions 6.5. Dealing with out-of-order events 6.5.1. How can events lose their order? 6.5.2. Solving out of order events with versioning 6.6. Using end-to-end message partitioning to handle concurrency and guarantee message ordering 6.6.1. The relevance of message routing and partitioning 6.6.2. Real-world example of message routing using Kafka 6.6.3. Using end-to-end partitioning 6.6.4. Limitations of end-to-end partitioning 6.7. Summary Chapter 7. Achieving resilience and event processing reliability in event-driven microservices 7.1. Common failures in microservice architectures and how they relate to event-driven architectures 7.1.1. Cascading failures and event-driven services 7.1.2. Load balancing and rate limiters in event-driven services 7.2. Understanding message delivery semantics 7.3. Avoiding inconsistencies when saving state and publishing events 7.3.1. Event stream as the only source of truth 7.3.2. Outbox pattern 7.3.3. Transactions and compensating actions 7.4. Applying ACID 2.0 as a resilience strategy 7.5. Avoiding message leak 7.6. Applying common resilience patterns 7.6.1. Retries 7.6.2. Circuit breakers 7.7. Recovering data and repairing state 7.8. Bulkhead pattern 7.9. Summary Chapter 8. Choosing the correct event schema design 8.1. Event storming 8.2. Event headers and envelopes 8.2.1. Headers vs envelopes 8.2.2. Relevant event contextual information 8.3. Town crier events 8.4. Bee events 8.5. The event schema goldilocks principle 8.6. Denormalized event schema 8.7. Schema evolution 8.7.1. Event stream versioning 8.7.2. Using a downscaler/upscaler 8.8. Summary Chapter 9. How to leverage the user interface 9.1. Using an aggregating layer 9.2. Backends for frontends 9.3. UI Decomposition 9.3.1. Application decomposition 9.3.2. Page decomposition 9.3.3. Section decomposition 9.4. The limitations of API composition 9.5. Task-based UIs 9.6. Event-driven APIs 9.7. Summary Chapter 10. Overcoming the challenges in quality assurance 10.1. The only happens in production syndrome 10.2. Component tests vs integration tests 10.3. The correct mix of component validation and production validations 10.4. Monitoring and alarmistic from the ground up 10.5. Summary Chapter 11. Organizational cost of event-driven microservices 11.1. The epic journey to be onboarded 11.2. When implementation overhead impacts time to market 11.3. Dependencies management 11.4. Summary
£49.49
APress Everyday Enterprise Architecture
Book SynopsisDiscover what needs to happen in enterprise-architecture practice-and not just its outcomes, but also the activities from which those outcomes would arise. This book reveals how business and enterprise architects can deliver fast solutions to an always-on-the-go business world.To begin, you''ll review a new technique called context-space mapping, which provides a structured method for sense-making across the entire context of an enterprise. Throughout the book, you''ll concentrate on the routine practices that underpin each of the architecture disciplines. Working step-by-step through a real 10-day architecture project, this book explores the activities that underpin the strategy, structures and solutions in the real-time turmoil of an enterprise architect''s everyday work. You''ll explore how and why and when the various documents, artefacts and items of ''theory-stuff'' come into the practice - all those mainstream methods, frameworkTable of Contents Chapter 1: Introduction Chapter Goal: Describe the purpose of the book, how to use it, and what the various elements are No of pages 4 Sub -Topics 1. Main project: How to use architecture ideas and activities to describe what actually happens in a real enterprise-architecture project, and the business-reasons and business-value for each of those activities 2. Secondary project: Worked-example 3. Application: How to adapt each chapter’s content to our own work Chapter 2: Day 1: Get Started Chapter Goal: Show how to get started on a project, and summarise how the allocated ten days will be used No of pages 16 Sub -Topics 1 Do an initial assessment 2 Show how to use the project-diary and other tools 3 Show how to do an initial assessment 4 Show how to apply any ‘lessons-learned’ in our own projects Chapter 3: Day 2: Purpose, scope and context Chapter Goal: Set up and start the main and secondary projects No of pages: 16 Sub - Topics 1 Introduce the main project as exploring ‘the architecture of architecture’ 2 Show how to use the step-by-step action-task sequence 3 Introduce the secondary project: customer-breakdown at a bank 4 Show how to use the same step-by-step-step sequence for the bank content Chapter 4: Day 3: What’s going on? Chapter Goal: Learn how to do an architecture-assessment No of pages : 18 Sub - Topics: 1 Explore how to do a ‘to-be’ (futures) assessment 2 Explore how to do an ‘as-was’ (past) assessment 3 Explore how to identify issues that need to be addressed 4 Learn how to cope with the challenges and stresses of the work Chapter 5: Day 4: What do we want? Chapter Goal: Learn how to establish a baseline No of pages: 12 Sub - Topics: 1 Explore how to do an ‘as-is’ (present) assessment 2 How to do social-enquiry with stakeholders 3 How to tackle the politics of architecture 4 Architecture as decision-support for stakeholders, not decision-making Chapter 6: Day 5: What’s the difference? Chapter Goal: How to identify gaps where change is needed No of pages 14 Sub -Topics 1 Identify and build the skillsets needed for comparison-assessments 2 How to do comparisons to identify gaps (including hidden-gaps) 3 How to prioritise gaps and derive requirements 4 How and why to avoid the temptation to rush to ‘solutions’ Chapter 7: Day 6: How do we get from here to there? Chapter Goal: Guiding the transition to solution-design No of pages 10 Sub -Topics 1 How to identify the roles and specialisms needed for solution-design 2 How to identify, work with and hand over to the change-team 3 How to refine and simplify change-requirements 4 Politics reminder: architecture is decision-support, not decision-making Chapter 8: Day 7: Step-by-step details Chapter Goal: Learn the relative roles and relations between architecture and design No of pages 12 Sub -Topics 1 Role of architect as generalist, to connect specialists together 2 How to develop and use sense-making skills 3 Role of architect to assist in finding missing-detail 4 How to identify common missing-detail (system-failure, timescale, decommission) Chapter 9: Day 8: Putting it into practice Chapter Goal: What to do when the stakeholders themselves are the solutions No of pages 14 Sub -Topics 1 How to design a change-programme for stakeholders 2 How to deliver and guide a change-programme for stakeholders 3 How to guide stakeholders in sensemaking and decision-making 4 Introduce sense-making tools such as context-space mapping Chapter 10: Day 9: What did we achieve? Chapter Goal: How to do and use an after-action review No of pages 12 Sub -Topics 1 Purpose and value of an after-action review 2 Elements of an after-action review 3 How to do and document an after-action review 4 How to derive new change-tasks from an after-action review Chapter 11: Day 10: How To Review and Learn Chapter Goal: How to review and learn from our own projects No of pages 10 Sub -Topics 1 Reprise on how to do and assess an after-action review 2 How to derive our own insights from work done with others 3 How to apply and test those insights for our own architecture-practice 4 How to derive and enact change-tasks for our own continuous-improvement Appendix 1: The architecture information-stores Chapter Goal: How to capture, retrieve and reuse architectural information No of pages 6 Sub -Topics 1 Identify types, roles and uses of architecture-information 2 Identify how and why to store each type of architectural information 3 Identify how to retrieve and reuse each type of architectural information 4 Identify how and when to delete architectural information Appendix 2: More on context-space mapping Chapter Goal: Present context-space mapping as a sensemaking tool for architecture No of pages 18 Sub -Topics 1 Describe purpose and underlying principles for context-space mapping 2 Explore how context-space mapping works as a sensemaking method 3 Provide detailed worked-examples of context-space mapping 4 Show outcomes and value of context-space mapping in sensemaking Appendix 3: Resources Chapter Goal: Provide additional support for the practices in this book No of pages 2 Sub -Topics 1 Example books and other publications 2 Websites and other online resources
£41.24
O'Reilly Media Hack and HHVM
Book SynopsisHow can you take advantage of the HipHop Virtual Machine (HHVM) and the Hack programming language, two new technologies that Facebook developed to run their web servers? With this practical guide, Owen Yamauchi-a member of Facebook's core Hack and HHVM teams-shows you how to get started with these battle-tested open-source tools.
£23.99
O'Reilly Media Frontend Architecture for Design Systems
Book SynopsisThis practical book takes experienced web developers through the new discipline of frontend architecture, including the latest tools, standards, and best practices that have elevated frontend web development to an entirely new level.
£20.39
O'Reilly Media ProductionReady Microservices
Book SynopsisIn this practical book, author Susan Fowler presents a set of microservice standards in depth, drawing from her experience standardizing over a thousand microservices at Uber. You'll learn how to design microservices that are stable, reliable, scalable, fault tolerant, performant, monitored, documented, and prepared for any catastrophe.
£25.59
O'Reilly Media Building EventDriven Microservices
Book SynopsisWith this practical guide, you’ll learn how to leverage large-scale data usage across the business units in your organization using the principles of event-driven microservices.
£52.99
