Computer architecture and logic design Books
Springer Nature Switzerland AG Masterclass Enterprise Architecture Management
Book SynopsisThis textbook provides a hands-on introduction to enterprise architecture management. It guides the reader through the applications of methods and tools to typical business problems by presenting enterprise architecture frameworks and by sharing experiences from industry.The structure of the book represents the typical stages of the journey of an enterprise architect. Chapter 1 addresses the central question of what to achieve with the introduction of an enterprise architecture. Chapter 2 then introduces concepts and visualizations for business architecture that help with understanding the business. In chapter 3 the development of an application architecture is outlined, which provides transparency on information systems and their business context. Next, chapter 4 presents visual tools to analyze, improve and eventually optimize the application landscape. Chapter 5 discusses both traditional organizational as well as collaborative approaches to enterprise architecture management. Eventually, several established enterprise architecture frameworks like TOGAF, Zachmann, ArchiMate, and IAF are described in chapter 6. The book concludes with a summary and an outlook on future research potential in chapter 7. Based on their experiences through several years of teaching, the authors introduce students step-by-step to enterprise architecture development and management. Their book is intended as a guide for master classes at universities and includes lots of exercises and references for further reading. Table of Contents1 Introduction.- 2 Understanding Business Architecture.- 3 Developing Application Architecture.- 4 Analysing Enterprise Architecture.- 5 Managing Enterprise Architecture.- 6 Applying Frameworks.- 7 Summary and Outlook.
£52.24
Springer Nature Switzerland AG Formal Verification of Floating-Point Hardware
Book SynopsisThis is the first book to focus on the problem of ensuring the correctness of floating-point hardware designs through mathematical methods. Formal Verification of Floating-Point Hardware Design, Second Edition advances a verification methodology based on a unified theory of register-transfer logic and floating-point arithmetic that has been developed and applied to the formal verification of commercial floating-point units over the course of more than two decades, during which the author was employed by several major microprocessor design companies. The theory is extended to the analysis of several algorithms and optimization techniques that are commonly used in commercial implementations of elementary arithmetic operations. As a basis for the formal verification of such implementations, high-level specifications of the basic arithmetic instructions of several major industry-standard floating-point architectures are presented, including all details pertaining to the handling of exceptional conditions. The methodology is illustrated in the comprehensive verification of a variety of state-of-the-art commercial floating-point designs developed by Arm Holdings. This revised edition reflects the evolving microarchitectures and increasing sophistication of Arm processors, and the variation in the design goals of execution speed, hardware area requirements, and power consumption. Many new results have been added to Parts I—III (Register-Transfer Logic, Floating-Point Arithmetic, and Implementation of Elementary Operations), extending the theory and describing new techniques. These were derived as required in the verification of the new RTL designs described in Part V. Table of ContentsPart I - Register-Transfer Logic.- Basic Arithmetic Functions.- Bit Vectors.- Logical Operations.- Part II - Floating-Point Arithmetic.- Floating-Point Numbers.- Floating-Point Formats.- Rounding.- IEEE-Compliant Square Root.- Part III - Implementation of Elementary Operations.- Addition.- Multiplication.- SRT Division and Square Root.- FMA-Based Division.- Part IV - Comparative Architectures: SSE, x87, and Arm.- SSE Floating-Point Instructions.- x87 Instructions.- Arm Floating-Point.- Instructions.- Part V - Formal Verification of RTL Designs.- The RAC Modeling Language.- Double-Precision Multiplication and Scaling.- Double-Precision Addition and FMA.- Multi-Precision Radix-8 SRT Division.- 64-bit Integer Division.- Multi-Precision Radix-4 SRT Square Root.- Multi-Precision Radix-2 SRT Division.- Fused Multiply-Add of a Graphics Processor.
£107.99
Springer Nature Switzerland AG Logic Functions and Equations: Fundamentals and
Book Synopsis The greatly expanded and updated 3rd edition of this textbook offers the reader a comprehensive introduction to the concepts of logic functions and equations and their applications across computer science and engineering. The authors’ approach emphasizes a thorough understanding of the fundamental principles as well as numerical and computer-based solution methods. The book provides insight into applications across propositional logic, binary arithmetic, coding, cryptography, complexity, logic design, and artificial intelligence.Updated throughout, some major additions for the 3rd edition include: a new chapter about the concepts contributing to the power of XBOOLE; a new chapter that introduces into the application of the XBOOLE-Monitor XBM 2; many tasks that support the readers in amplifying the learned content at the end of the chapters; solutions of a large subset of these tasks to confirm learning success; challenging tasks that need the power of the XBOOLE software for their solution. The XBOOLE-monitor XBM 2 software is used to solve the exercises; in this way the time-consuming and error-prone manipulation on the bit level is moved to an ordinary PC, more realistic tasks can be solved, and the challenges of thinking about algorithms leads to a higher level of education.Table of ContentsPart I Theoretical Foundations 1. Basic Algebraic Structures 2. Logic Functions 3. Logic Equations 4. Boolean Differential Calculus 5. Sets, Lattices, and Classes Logic Functions Part II Applications 6. Logics, Arithmetic, and Special Functions 7. SAT-Problems 8. Extremely Complex Problems 9. Combinational Circuits 10. Sequential Circuits References Index
£56.99
Springer Nature Switzerland AG Model Checking, Synthesis, and Learning: Essays Dedicated to Bengt Jonsson on The Occasion of His 60th Birthday
Book SynopsisThis Festschrift, dedicated to Bengt Jonsson on the occasion of his 60th birthday, contains papers written by many of his friends and collaborators.Bengt has made major contributions covering a wide range of topics including verification and learning. His works on verification, in finite state systems, learning, testing, probabilistic systems, timed systems, and distributed systems reflect both the diversity and the depth of his research. Besides being an excellent scientist, Bengt is also a leader who has greatly influenced the careers of both his students and his colleagues. His main focus throughout his career has been in the area of formal methods, and the research papers dedicated to him in this volume address related topics, particularly related to model checking, temporal logic, and automata learning.Table of ContentsModel Checking, Synthesis, and Learning.- From Linear Temporal Logics to Büchi Automata: The Early and Simple Principle.- Cause-Effect Reaction Latency In Real-Time Systems.- Quantitative Analysis of Interval Markov Chains.- Regular Model Checking: Evolution and Perspectives.- Regular Model Checking Revisited.- High-Level Representation of Benchmark Families for Petri Games.- Towards Engineering Digital Twinsby Active Behaviour Mining.- Never-Stop Context-Free Learning.- A Taxonomy and Reductions for Common Register Automata Formalisms.
£52.24
Springer Nature Switzerland AG Neuromorphic Computing Principles and
Book SynopsisThis book focuses on neuromorphic computing principles and organization and how to build fault-tolerant scalable hardware for large and medium scale spiking neural networks with learning capabilities. In addition, the book describes in a comprehensive way the organization and how to design a spike-based neuromorphic system to perform network of spiking neurons communication, computing, and adaptive learning for emerging AI applications. The book begins with an overview of neuromorphic computing systems and explores the fundamental concepts of artificial neural networks. Next, we discuss artificial neurons and how they have evolved in their representation of biological neuronal dynamics. Afterward, we discuss implementing these neural networks in neuron models, storage technologies, inter-neuron communication networks, learning, and various design approaches. Then, comes the fundamental design principle to build an efficient neuromorphic system in hardware. The challenges that need to be solved toward building a spiking neural network architecture with many synapses are discussed. Learning in neuromorphic computing systems and the major emerging memory technologies that promise neuromorphic computing are then given.A particular chapter of this book is dedicated to the circuits and architectures used for communication in neuromorphic systems. In particular, the Network-on-Chip fabric is introduced for receiving and transmitting spikes following the Address Event Representation (AER) protocol and the memory accessing method. In addition, the interconnect design principle is covered to help understand the overall concept of on-chip and off-chip communication. Advanced on-chip interconnect technologies, including si-photonic three-dimensional interconnects and fault-tolerant routing algorithms, are also given. The book also covers the main threats of reliability and discusses several recovery methods for multicore neuromorphic systems. This is important for reliable processing in several embedded neuromorphic applications. A reconfigurable design approach that supports multiple target applications via dynamic reconfigurability, network topology independence, and network expandability is also described in the subsequent chapters. The book ends with a case study about a real hardware-software design of a reliable three-dimensional digital neuromorphic processor geared explicitly toward the 3D-ICs biological brain’s three-dimensional structure. The platform enables high integration density and slight spike delay of spiking networks and features a scalable design. We present methods for fault detection and recovery in a neuromorphic system as well.Neuromorphic Computing Principles and Organization is an excellent resource for researchers, scientists, graduate students, and hardware-software engineers dealing with the ever-increasing demands on fault-tolerance, scalability, and low power consumption. It is also an excellent resource for teaching advanced undergraduate and graduate students about the fundamentals concepts, organization, and actual hardware-software design of reliable neuromorphic systems with learning and fault-tolerance capabilities.Table of Contents1 Introduction to Neuromorphic Computing Systems.- 2 Neuromorphic System Design Fundamentals.- 3 Learning in Neuromorphic Systems.- 4 Emerging Memory Devices for Neuromorphic Systems.- 5 Communication Networks for Neuromorphic Systems.- 6 Fault-Tolerant Neuromorphic System Design.- 7 Reconfigurable Neuromorphic Computing System.- 8 Case Study: Real Hardware-Software Design of 3D-NoC-based Neuromorphic System.- 9 Survey of Neuromorphic Systems.
£49.49
Springer Nature Switzerland AG Computer Systems: Digital Design, Fundamentals of
Book SynopsisThis updated textbook covers digital design, fundamentals of computer architecture, and ARM assembly language. The book starts by introducing computer abstraction, basic number systems, character coding, basic knowledge in digital design, and components of a computer. The book goes on to discuss information representation in computing, Boolean algebra and logic gates, and sequential logic. The book also presents introduction to computer architecture, Cache mapping methods, and virtual memory. The author also covers ARM architecture, ARM instructions, ARM assembly language using Keil development tools, and bitwise control structure using C and ARM assembly language. The book includes a set of laboratory experiments related to digital design using Logisim software and ARM assembly language programming using Keil development tools. In addition, each chapter features objectives, summaries, key terms, review questions, and problems.Table of ContentsChapter1: Signal and number systems.- Chapter2: Boolean Logics and Logic Gates.- Chapter3: Minterms, Maxterms, Karnaugh Map (K-Map), and Universal Gates.- Chapter4: Combinational Logic.- Chapter5: Synchronous Sequential Logic.- Chapter6: Introduction to Computer Architecture.- Chapter7: Memory.- Chapter8: Assembly Language and ARM Instructions Part I.- Chapter9: ARM Assembly Language Programming Using Keil Development Tools.- Chapter10: ARM Instructions Part II and Instraction Formats.- Chapter11: Bitwise and Control Structures Used for Programming with C and ARM Assembly Language.
£61.74
Springer Nature Switzerland AG Computer Systems: Digital Design, Fundamentals of
Book SynopsisThis updated textbook covers digital design, fundamentals of computer architecture, and ARM assembly language. The book starts by introducing computer abstraction, basic number systems, character coding, basic knowledge in digital design, and components of a computer. The book goes on to discuss information representation in computing, Boolean algebra and logic gates, and sequential logic. The book also presents introduction to computer architecture, Cache mapping methods, and virtual memory. The author also covers ARM architecture, ARM instructions, ARM assembly language using Keil development tools, and bitwise control structure using C and ARM assembly language. The book includes a set of laboratory experiments related to digital design using Logisim software and ARM assembly language programming using Keil development tools. In addition, each chapter features objectives, summaries, key terms, review questions, and problems.Table of ContentsChapter1: Signal and number systems.- Chapter2: Boolean Logics and Logic Gates.- Chapter3: Minterms, Maxterms, Karnaugh Map (K-Map), and Universal Gates.- Chapter4: Combinational Logic.- Chapter5: Synchronous Sequential Logic.- Chapter6: Introduction to Computer Architecture.- Chapter7: Memory.- Chapter8: Assembly Language and ARM Instructions Part I.- Chapter9: ARM Assembly Language Programming Using Keil Development Tools.- Chapter10: ARM Instructions Part II and Instraction Formats.- Chapter11: Bitwise and Control Structures Used for Programming with C and ARM Assembly Language.
£44.99
Springer Nature Switzerland AG Approximate Computing Techniques: From Component-
Book SynopsisThis book serves as a single-source reference to the latest advances in Approximate Computing (AxC), a promising technique for increasing performance or reducing the cost and power consumption of a computing system. The authors discuss the different AxC design and validation techniques, and their integration. They also describe real AxC applications, spanning from mobile to high performance computing and also safety-critical applications. Table of ContentsGeneral introduction Motivations.- Number representations.- Data level approximation.- Dynamic precision scaling.- Hardware level approximation.- Inexact operators.- Computation level approximation - algorithmic level.- Analysis of approximation effect on application quality.- Techniques for finite precision arithmetic.- Compilers and Programming Languages for Approximate Computing.- Design space exploration.- Word-length optimization for fixed-point and floating-point.- HLS of approximate accelerators.- Approximate Computing for IoT Applications.- Approximating Safety-Critical Applications.- Approximate Computing for HPC Applications.
£66.49
Springer Nature Switzerland AG VLSI Physical Design: From Graph Partitioning to
Book SynopsisThe complexity of modern chip design requires extensive use of specialized software throughout the process. To achieve the best results, a user of this software needs a high-level understanding of the underlying mathematical models and algorithms. In addition, a developer of such software must have a keen understanding of relevant computer science aspects, including algorithmic performance bottlenecks and how various algorithms operate and interact. This book introduces and compares the fundamental algorithms that are used during the IC physical design phase, wherein a geometric chip layout is produced starting from an abstract circuit design. This updated second edition includes recent advancements in the state-of-the-art of physical design, and builds upon foundational coverage of essential and fundamental techniques. Numerous examples and tasks with solutions increase the clarity of presentation and facilitate deeper understanding. A comprehensive set of slides is available on the Internet for each chapter, simplifying use of the book in instructional settings.“This improved, second edition of the book will continue to serve the EDA and design community well. It is a foundational text and reference for the next generation of professionals who will be called on to continue the advancement of our chip design tools and design the most advanced micro-electronics.” Dr. Leon Stok, Vice President, Electronic Design Automation, IBM Systems Group“This is the book I wish I had when I taught EDA in the past, and the one I’m using from now on.” Dr. Louis K. Scheffer, Howard Hughes Medical Institute“I would happily use this book when teaching Physical Design. I know of no other work that’s as comprehensive and up-to-date, with algorithmic focus and clear pseudocode for the key algorithms. The book is beautifully designed!”Prof. John P. Hayes, University of Michigan“The entire field of electronic design automation owes the authors a great debt for providing a single coherent source on physical design that is clear and tutorial in nature, while providing details on key state-of-the-art topics such as timing closure.”Prof. Kurt Keutzer, University of California, Berkeley“An excellent balance of the basics and more advanced concepts, presented by top experts in the field.” Prof. Sachin Sapatnekar, University of MinnesotaTable of Contents1 Introduction. 1.1 Electronic Design Automation (EDA). 1.2 VLSI Design Flow. 1.3 VLSI Design Styles. 1.4 Layout Layers and Design Rules. 1.5 Physical Design Optimizations. 1.6 Algorithms and Complexity. 1.7 Graph Theory Terminology. 1.8 Common EDA Terminology. 2 Netlist and System Partitioning. 2.1 Introduction. 2.2 Terminology. 2.3 Optimization Goals. 2.4 Partitioning Algorithms. 2.5 A Framework for Multilevel Partitioning. 2.6 System Partitioning onto Multiple FPGAs. Chapter 2 Exercises.3 Chip Planning. 3.1 Introduction to Floorplanning. 3.2 Optimization Goals in Floorplanning. 3.3 Terminology. 3.4 Floorplan Representations. 3.5 Floorplanning Algorithms. 3.6 Pin Assignment. 3.7 Power and Ground Routing. Chapter 3 Exercises.4 Global and Detailed Placement. 4.1 Introduction. 4.2 Optimization Objectives. 4.3 Global Placement. 4.4 Legalization and Detailed Placement. Chapter 4 Exercises.5 Global Routing. 5.1 Introduction. 5.2 Terminology and Definitions. 5.3 Optimization Goals. 5.4 Representations of Routing Regions. 5.5 The Global Routing Flow. 5.6 Single-Net Routing. 5.7 Full-Netlist Routing. 5.8 Modern Global Routing. Chapter 5 Exercises.6 Detailed Routing. 6.1 Terminology. 6.2 Horizontal and Vertical Constraint Graphs. 6.3 Channel Routing Algorithms. 6.4 Switchbox Routing. 6.5 Over-the-Cell Routing Algorithms. 6.6 Modern Challenges in Detailed Routing. Chapter 6 Exercises.7 Specialized Routing. 7.1 Introduction to Area Routing. 7.2 Net Ordering in Area Routing. 7.3 Non-Manhattan Routing. 7.4 Basic Concepts in Clock Networks. 7.5 Modern Clock Tree Synthesis. Chapter 7 Exercises.8 Timing Closure. 8.1 Introduction. 8.2 Timing Analysis and Performance Constraints. 8.3 Timing-Driven Placement. 8.4 Timing-Driven Routing. 8.5 Physical Synthesis. 8.6 Performance-Driven Design Flow. 8.7 Conclusions. Chapter 8 Exercises. A Solutions to Chapter Exercises. B Example CMOS Cell Layouts.
£66.49
Springer Nature Switzerland AG VLSI Physical Design: From Graph Partitioning to
Book SynopsisThe complexity of modern chip design requires extensive use of specialized software throughout the process. To achieve the best results, a user of this software needs a high-level understanding of the underlying mathematical models and algorithms. In addition, a developer of such software must have a keen understanding of relevant computer science aspects, including algorithmic performance bottlenecks and how various algorithms operate and interact. This book introduces and compares the fundamental algorithms that are used during the IC physical design phase, wherein a geometric chip layout is produced starting from an abstract circuit design. This updated second edition includes recent advancements in the state-of-the-art of physical design, and builds upon foundational coverage of essential and fundamental techniques. Numerous examples and tasks with solutions increase the clarity of presentation and facilitate deeper understanding. A comprehensive set of slides is available on the Internet for each chapter, simplifying use of the book in instructional settings.“This improved, second edition of the book will continue to serve the EDA and design community well. It is a foundational text and reference for the next generation of professionals who will be called on to continue the advancement of our chip design tools and design the most advanced micro-electronics.” Dr. Leon Stok, Vice President, Electronic Design Automation, IBM Systems Group“This is the book I wish I had when I taught EDA in the past, and the one I’m using from now on.” Dr. Louis K. Scheffer, Howard Hughes Medical Institute“I would happily use this book when teaching Physical Design. I know of no other work that’s as comprehensive and up-to-date, with algorithmic focus and clear pseudocode for the key algorithms. The book is beautifully designed!”Prof. John P. Hayes, University of Michigan“The entire field of electronic design automation owes the authors a great debt for providing a single coherent source on physical design that is clear and tutorial in nature, while providing details on key state-of-the-art topics such as timing closure.”Prof. Kurt Keutzer, University of California, Berkeley“An excellent balance of the basics and more advanced concepts, presented by top experts in the field.” Prof. Sachin Sapatnekar, University of MinnesotaTable of Contents1 Introduction. 1.1 Electronic Design Automation (EDA). 1.2 VLSI Design Flow. 1.3 VLSI Design Styles. 1.4 Layout Layers and Design Rules. 1.5 Physical Design Optimizations. 1.6 Algorithms and Complexity. 1.7 Graph Theory Terminology. 1.8 Common EDA Terminology. 2 Netlist and System Partitioning. 2.1 Introduction. 2.2 Terminology. 2.3 Optimization Goals. 2.4 Partitioning Algorithms. 2.5 A Framework for Multilevel Partitioning. 2.6 System Partitioning onto Multiple FPGAs. Chapter 2 Exercises.3 Chip Planning. 3.1 Introduction to Floorplanning. 3.2 Optimization Goals in Floorplanning. 3.3 Terminology. 3.4 Floorplan Representations. 3.5 Floorplanning Algorithms. 3.6 Pin Assignment. 3.7 Power and Ground Routing. Chapter 3 Exercises.4 Global and Detailed Placement. 4.1 Introduction. 4.2 Optimization Objectives. 4.3 Global Placement. 4.4 Legalization and Detailed Placement. Chapter 4 Exercises.5 Global Routing. 5.1 Introduction. 5.2 Terminology and Definitions. 5.3 Optimization Goals. 5.4 Representations of Routing Regions. 5.5 The Global Routing Flow. 5.6 Single-Net Routing. 5.7 Full-Netlist Routing. 5.8 Modern Global Routing. Chapter 5 Exercises.6 Detailed Routing. 6.1 Terminology. 6.2 Horizontal and Vertical Constraint Graphs. 6.3 Channel Routing Algorithms. 6.4 Switchbox Routing. 6.5 Over-the-Cell Routing Algorithms. 6.6 Modern Challenges in Detailed Routing. Chapter 6 Exercises.7 Specialized Routing. 7.1 Introduction to Area Routing. 7.2 Net Ordering in Area Routing. 7.3 Non-Manhattan Routing. 7.4 Basic Concepts in Clock Networks. 7.5 Modern Clock Tree Synthesis. Chapter 7 Exercises.8 Timing Closure. 8.1 Introduction. 8.2 Timing Analysis and Performance Constraints. 8.3 Timing-Driven Placement. 8.4 Timing-Driven Routing. 8.5 Physical Synthesis. 8.6 Performance-Driven Design Flow. 8.7 Conclusions. Chapter 8 Exercises. A Solutions to Chapter Exercises. B Example CMOS Cell Layouts.
£52.24
Springer Nature Switzerland AG 3D Interconnect Architectures for Heterogeneous
Book SynopsisThis book describes the first comprehensive approach to the optimization of interconnect architectures in 3D systems on chips (SoCs), specially addressing the challenges and opportunities arising from heterogeneous integration. Readers learn about the physical implications of using heterogeneous 3D technologies for SoC integration, while also learning to maximize the 3D-technology gains, through a physical-effect-aware architecture design. The book provides a deep theoretical background covering all abstraction-levels needed to research and architect tomorrow’s 3D-integrated circuits, an extensive set of optimization methods (for power, performance, area, and yield), as well as an open-source optimization and simulation framework for fast exploration of novel designs.Table of ContentsPart I Introduction1 Introduction to 3D Technologies 1.1 Motivation for Heterogenous 3D ICs 1.2 3D Technologies 1.3 TSV Capacitances—A Problem Resistant to Scaling 1.4 Conclusion 2 Interconnect Architectures for 3D Technologies 2.1 Interconnect Architectures 2.2 Overview of Interconnect Architectures for 3D ICs 2.3 Three-dimensional Networks on chips 2.4 Conclusion Part II 3D Technology Modeling 3 Power and Performance Formulas 3.1 High-Level Formula for the Power Consumption 3.2 High-Level Formula for the Propagation Delay 3.3 Matrix Formulations 3.4 Evaluation 3.5 Conclusion 4 Capacitance Estimation 4.1 Existing Capacitance Models 4.2 Edge and MOS Effects on the TSV Capacitances 4.3 TSV Capacitance Model 4.4 Evaluation 4.5 Conclusion Part III System Modeling xiii xiv Contents 5 Application and Simulation Models 5.1 Overview of the Modeling Approach 5.2 Application Traffic Model 5.3 Simulation Model of 3D NoCs 5.4 Simulator Interfaces 5.5 Conclusion 6 Bit-level Statistics 6.1 Existing Approaches to Estimate the Bit-Level Statistics for Single Data Streams 6.2 Data-Stream Multiplexing 6.3 Bit-Level Statistics with Data-Stream Multiplexing 6.4 Evaluation 6.5 Conclusion 7 Ratatoskr Framework 7.1 Ratatoskr for Practitioners 7.2 Implementation 7.3 Evaluation 7.4 Case Study: Link Power Estimation and Optimization 7.5 Conclusion Part IV 3D-Interconnect Optimization 8 Low-Power Technique for 3D Interconnects 8.1 Fundamental Idea 8.2 Power-Optimal TSV assignment 8.3 Systematic Net-to-TSV Assignments 8.4 Combination with Traditional Low-Power Codes 8.5 Evaluation 8.6 Conclusion 9 Low-Power Technique for High-Performance 3D Interconnects. 9.1 Edge-Effect-Aware Crosstalk Classification 9.2 Existing Approaches and Their Limitations 9.3 Proposed Technique 9.4 Extension to a Low-Power 3D CAC 9.5 Evaluation 9.6 Conclusion 10 Low-Power Technique for High-Performance 3D Interconnects (Misaligned) 10.1 Temporal-Misalignment Effect on the Crosstalk 10.2 Exploiting Misalignment to Improve the Performance 10.3 Effect on the TSV Power Consumption Contents xv 10.4 Evaluation 10.5 Conclusion 11 Low-Power Technique for Yield-Enhanced 3D Interconnects 11.1 Existing TSV Yield-Enhancement Techniques 11.2 Preliminaries—Logical Impact of TSV Faults 11.3 Fundamental Idea 11.4 Formal Problem Description 11.5 TSV Redundancy Schemes 11.6 Evaluation 11.7 Case Study 11.8 Conclusion Part V NoC Optimization for Heterogeneous 3D Integration 12 Heterogeneous Buffering for 3D NoCs251 12.1 Buffer Distributions and Depths 12.2 Routers with Optimized Buffer Distribution 12.3 Routers with Optimized Buffer Depths 12.4 Evaluation 12.5 Discussion 12.6 Conclusion 13 Heterogeneous Routing for 3D NoCs 13.1 Heterogeneity and Routing 13.2 Modeling Heterogeneous Technologies 13.3 Modeling Communication 13.4 Routing Limitations from Heterogeneity 13.5 Heterogeneous Routing Algorithms 13.6 Heterogeneous Router Architectures 13.7 Low-Power Routing in Heterogeneous 3D ICs 13.8 Evaluation 13.9 Discussion 13.10Conclusion 14 Heterogeneous Virtualisation for 3D NoCs 14.1 Problem Description 14.2 Heterogeneous Microarchitectures Exploiting Traffic Imbalance 14.3 Evaluation 14.4 Conclusion 15 Network Synthesis and SoC Floor Planning 15.1 Fundamental Idea 15.2 Modelling and Optimization 15.3 Mixed-Integer Linear Program 15.4 Heuristic Solution xvi Contents 15.5 Evaluation 15.6 Conclusion Part VI Finale 16 Conclusion 16.1 Putting it all together 16.2 Impact on Future Work A Appendix B Pseudo Codes C Method to Calculate the Depletion-Region Widths D Modeling Logical OR Relations
£94.99
Springer International Publishing AG Processor Microarchitecture: An Implementation Perspective
Book SynopsisThis lecture presents a study of the microarchitecture of contemporary microprocessors. The focus is on implementation aspects, with discussions on their implications in terms of performance, power, and cost of state-of-the-art designs. The lecture starts with an overview of the different types of microprocessors and a review of the microarchitecture of cache memories. Then, it describes the implementation of the fetch unit, where special emphasis is made on the required support for branch prediction. The next section is devoted to instruction decode with special focus on the particular support to decoding x86 instructions. The next chapter presents the allocation stage and pays special attention to the implementation of register renaming. Afterward, the issue stage is studied. Here, the logic to implement out-of-order issue for both memory and non-memory instructions is thoroughly described. The following chapter focuses on the instruction execution and describes the different functional units that can be found in contemporary microprocessors, as well as the implementation of the bypass network, which has an important impact on the performance. Finally, the lecture concludes with the commit stage, where it describes how the architectural state is updated and recovered in case of exceptions or misspeculations. This lecture is intended for an advanced course on computer architecture, suitable for graduate students or senior undergrads who want to specialize in the area of computer architecture. It is also intended for practitioners in the industry in the area of microprocessor design. The book assumes that the reader is familiar with the main concepts regarding pipelining, out-of-order execution, cache memories, and virtual memory. Table of Contents: Introduction / Caches / The Instruction Fetch Unit / Decode / Allocation / The Issue Stage / Execute / The Commit Stage / References / Author BiographiesTable of ContentsIntroduction.- Caches.- The Instruction Fetch Unit.- Decode.- Allocation.- The Issue Stage.- Execute.- The Commit Stage.- References.- Author Biographies.
£26.59
Springer International Publishing AG Resilient Architecture Design for Voltage Variation
Book SynopsisShrinking feature size and diminishing supply voltage are making circuits sensitive to supply voltage fluctuations within the microprocessor, caused by normal workload activity changes. If left unattended, voltage fluctuations can lead to timing violations or even transistor lifetime issues that degrade processor robustness. Mechanisms that learn to tolerate, avoid, and eliminate voltage fluctuations based on program and microarchitectural events can help steer the processor clear of danger, thus enabling tighter voltage margins that improve performance or lower power consumption. We describe the problem of voltage variation and the factors that influence this variation during processor design and operation. We also describe a variety of runtime hardware and software mitigation techniques that either tolerate, avoid, and/or eliminate voltage violations. We hope processor architects will find the information useful since tolerance, avoidance, and elimination are generalizable constructs that can serve as a basis for addressing other reliability challenges as well. Table of Contents: Introduction / Modeling Voltage Variation / Understanding the Characteristics of Voltage Variation / Traditional Solutions and Emerging Solution Forecast / Allowing and Tolerating Voltage Emergencies / Predicting and Avoiding Voltage Emergencies / Eliminiating Recurring Voltage Emergencies / Future Directions on ResiliencyTable of ContentsIntroduction.- Modeling Voltage Variation.- Understanding the Characteristics of Voltage Variation.- Traditional Solutions and Emerging Solution Forecast.- Allowing and Tolerating Voltage Emergencies.- Predicting and Avoiding Voltage Emergencies.- Eliminiating Recurring Voltage Emergencies.- Future Directions on Resiliency.
£26.59
Springer International Publishing AG On-Chip Networks, Second Edition
Book SynopsisThis book targets engineers and researchers familiar with basic computer architecture concepts who are interested in learning about on-chip networks. This work is designed to be a short synthesis of the most critical concepts in on-chip network design. It is a resource for both understanding on-chip network basics and for providing an overview of state of-the-art research in on-chip networks. We believe that an overview that teaches both fundamental concepts and highlights state-of-the-art designs will be of great value to both graduate students and industry engineers. While not an exhaustive text, we hope to illuminate fundamental concepts for the reader as well as identify trends and gaps in on-chip network research. With the rapid advances in this field, we felt it was timely to update and review the state of the art in this second edition. We introduce two new chapters at the end of the book. We have updated the latest research of the past years throughout the book and also expanded our coverage of fundamental concepts to include several research ideas that have now made their way into products and, in our opinion, should be textbook concepts that all on-chip network practitioners should know. For example, these fundamental concepts include message passing, multicast routing, and bubble flow control schemes.Table of ContentsPreface.- Acknowledgments.- Introduction.- Interface with System Architecture.- Topology.- Routing.- Flow Control.- Router Microarchitecture.- Modeling and Evaluation.- Case Studies.- Conclusions.- References.- Authors' Biographies.
£37.85
Springer International Publishing AG The Datacenter as a Computer: Designing
Book SynopsisThis book describes warehouse-scale computers (WSCs), the computing platforms that power cloud computing and all the great web services we use every day. It discusses how these new systems treat the datacenter itself as one massive computer designed at warehouse scale, with hardware and software working in concert to deliver good levels of internet service performance. The book details the architecture of WSCs and covers the main factors influencing their design, operation, and cost structure, and the characteristics of their software base. Each chapter contains multiple real-world examples, including detailed case studies and previously unpublished details of the infrastructure used to power Google's online services. Targeted at the architects and programmers of today's WSCs, this book provides a great foundation for those looking to innovate in this fascinating and important area, but the material will also be broadly interesting to those who just want to understand the infrastructure powering the internet. The third edition reflects four years of advancements since the previous edition and nearly doubles the number of pictures and figures. New topics range from additional workloads like video streaming, machine learning, and public cloud to specialized silicon accelerators, storage and network building blocks, and a revised discussion of data center power and cooling, and uptime. Further discussions of emerging trends and opportunities ensure that this revised edition will remain an essential resource for educators and professionals working on the next generation of WSCs.Table of ContentsAcknowlegements.- Introduction.- Workloads and Software Infrastructure.- WSC Hardware Building Blocks.- Data Center Basics: Building, Power, and Cooling.- Energy and Power Efficiency.- Modeling Costs.- Dealing with Failures and Repairs.- Closing Remarks.- Bibliography.- Author Biographies.
£40.49
Springer International Publishing AG Euro-Par 2022: Parallel Processing: 28th International Conference on Parallel and Distributed Computing, Glasgow, UK, August 22–26, 2022, Proceedings
Book SynopsisThis book constitutes the proceedings of the 33rd International Conference on Parallel and Distributed Computing, Euro-Par 2022, held in GLasgow, UK, in August 2022.The 25 full papers presented in this volume were carefully reviewed and selected from 102 submissions. The conference Euro-Par 2022 covers all aspects of parallel and distributed computing, ranging from theory to practice, scaling from the smallest to the largest parallel and distributed systems, from fundamental computational problems and models to full-fledged applications, from architecture and interface design and implementation to tools, infrastructures and applications. Table of ContentsCompilers, Tools and Environments.- Performance and Power Modeling, Prediction and Evaluation.- Scheduling and Load Balancing.- Data Management, Analytics and Machine Learning.- Cluster and Cloud Computing.- Theory and Algorithms for Parallel and Distributed Processing.- Parallel and Distributed Programming, Interfaces, and Languages.- Multicore and Manycore Parallelism.- Parallel Numerical Methods and Applications.
£53.99
Springer International Publishing AG Guide to Computer Processor Architecture: A
Book SynopsisThis unique, accessible textbook presents a succession of implementations of the open-source RISC-V processor. Implementations are offered in increasing difficulty (non-pipelined, pipelined, deeply pipelined, multi-threaded, multicore).Each implementation is shown as a High-Level Synthesis (HLS) code in C++. This facilitates synthesis and testing on an FPGA-based development board (Such a board can be freely obtained from the Xilinx University Program targeting university professors).The book can be useful for several reasons. First, it is a novel way to introduce computer architecture: The codes given can serve as labs for a processor architecture course. Second, the book content is based on the RISC-V Instruction Set Architecture, which is an open-source machine language promising to become the main machine language to be taught, replacing DLX and MIPS. Third, all the designs are implemented through the HLS tool, which is able to translate a C program into an intellectual property (IP). Lastly, HLS will become the new standard for IP implementations, replacing Verilog/VHDL; already there are job positions tied to HLS, with the argument of rapid IP development.Hence, in addition to offering undergraduates a firm introduction, the textbook/guide can also serve engineers willing to implement processors on FPGA, as well as researchers willing to develop RISC-V based hardware simulators.Bernard Goossens is Professor in the Faculty of Sciences at the Université de Perpignan, France. He is author of the French-language book from Springer, Architecture et microarchitecture des processeurs, 2002.Table of ContentsPart I. Single core processors.- 1. Getting Ready.- 2. Building a RISC-V Processor.- 3. Building a Pipelined RISC-V Processor.- 4. Building a RISC-V Processor with a Multi-cycle Pipeline.- 5. Building a RISC-V Processor with a Multiple Hart Pipeline.- Part II. Multiple core processors.- 6. Connecting IPs.- 7. A Multi-core RISC-V Processor.- 8. A Multi-core RISC-V Processor with Multi-hart Cores.
£42.80
Springer International Publishing AG Completion Detection in Asynchronous Circuits:
Book SynopsisThis book is intended for designers with experience in traditional (clocked) circuit design, seeking information about asynchronous circuit design, in order to determine if it would be advantageous to adopt asynchronous methodologies in their next design project. The author introduces a generic approach for implementing a deterministic completion detection scheme for asynchronous bundled data circuits that incorporates a data-dependent computational process, taking advantage of the average-case delay. The author validates the architecture using a barrel shifter, as shifting is the basic operation required by all the processors. The generic architecture proposed in this book for a deterministic completion detection scheme for bundled data circuits will facilitate researchers in considering the asynchronous design style for developing digital circuits.Table of Contents1) Introduction to asynchronous circuit design2) "Preliminary considerations for asynchronous circuit design"3) "Completion detection schemes for asynchronous design style"4) Case Studies: Barrel shifter and binary adders5) "Generic Architecture of deterministic completion detection scheme"6) "Architecture optimization using deterministic completion detection"7) Simulations
£66.49
Springer International Publishing AG Reversible Computation: 15th International
Book SynopsisThis book constitutes the refereed proceedings of the 15th International Conference on Reversible Computation, RC 2023, held in Giessen, Germany, during July 18–19, 2023.The 11 full papers and 3 short papers included in this book were carefully reviewed and selected from 19 submissions. They were organized in topical sections as follows: Foundations; Reversible Programming; Quantum Computing; and Quantum Circuits.Table of ContentsInvited Paper.- Energy complexity of computation.- Foundations.- Replications in Reversible Concurrent Calculi.- Towards a Taxonomy for Reversible Computation Approaches.- Computational Complexity of Reversible Reaction Systems.- Reversible Programming.- Optimization of Reversible Control Flow Graphs.- Tail recursion transformation for invertible functions.- Saving Memory Space in Deep Neural Networks by Recomputing: A Survey.- Towards a Dereversibilizer: Fewer Asserts, Statically.- Quantum Computing.- Quantum String Matching Unfolded and Extended.- Optimizing Quantum Space using Spooky Pebble Games.- Uncomputation in the Qrisp high-level Quantum Programming Framework.- Quantum Circuits.- Improved Synthesis of Tooli-Hadamard Circuits.- Implementation of a Reversible Distributed Calculus.- Improved Cost-Metric for Nearest Neighbor Mapping of Quantum Circuits to 2-Dimensional Hexagonal Architecture.- Exploiting the Benefits of Clean Ancilla Based Toffoli Gate Decomposition Across Architectures.
£47.49
Springer International Publishing AG OpenMP: Advanced Task-Based, Device and Compiler
Book SynopsisThis book constitutes the proceedings of the 19th International Workshop on OpenMP, IWOMP 2023, held in Bristol, UK, during September 13–15, 2023.The 15 full papers presented in this book were carefully reviewed and selected from 20 submissions. The papers are divided into the following topical sections: OpenMP and AI; Tasking Extensions; OpenMP Offload Experiences; Beyond Explicit GPU Support; and OpenMP Infrastructure and Evaluation.Table of ContentsOpenMP and AI: Advising OpenMP Parallelization via a Graph-Based Approach with Transformers.- Towards Effective Language Model Application in High-Performance Computing.- OpenMP Advisor: A Compiler Tool for Heterogeneous Architectures.- Tasking Extensions: Introducing Moldable Task in OpenMP.- Suspending OpenMP Tasks on Asynchronous Events: Extending the Taskwait Construct.- How to Efficiently Parallelize Irregular DOACROSS Loops Using Fine-Grained Granularity and OpenMP Tasks? The mcf Case.- OpenMP Offload Experiences: The Kokkos OpenMPTarget Backend: Implementation and Lessons Learned.- Fine-Grained Parallelism on GPUs Using OpenMP Target Offloading.- Improving a Multigrid Poisson Solver with Peer-to-Peer Communication and Task Dependencies.- Beyond Explicit GPU Support: Multipurpose Cacheing to accelerate OpenMP Target Regions on FPGAs.- Generalizing Hierarchical Parallelism.- Exploring the Limits of Generic Code Execution on GPUs via Direct (OpenMP) Offload.- OpenMP Infrastructure and Evaluation: Improving Simulations of Task-Based Applications on Complex NUMA Architectures.- Experimental Characterization of OpenMP Offloading Memory Operations and Unified Shared Memory Support.- OpenMP Reverse Offloading Using Shared Memory Remote Procedure Calls.
£47.49
Springer International Publishing AG Introduction to Logic Circuits & Logic Design
Book SynopsisThis textbook for courses in Digital Systems Design introduces students to the fundamental hardware used in modern computers. Coverage includes both the classical approach to digital system design (i.e., pen and paper) in addition to the modern hardware description language (HDL) design approach (computer-based). Using this textbook enables readers to design digital systems using the modern HDL approach, but they have a broad foundation of knowledge of the underlying hardware and theory of their designs. This book is designed to match the way the material is actually taught in the classroom. Topics are presented in a manner which builds foundational knowledge before moving onto advanced topics. The author has designed the presentation with learning goals and assessment at its core. Each section addresses a specific learning outcome that the student should be able to “do” after its completion. The concept checks and exercise problems provide a rich set of assessment tools to measure student performance on each outcome.Table of ContentsIntroduction – Analog Vs. Digital.- Number Systems.- Digital Circuitry & Interfacing.- Combinational Logic Design.- Verilog (Part 1).- MSI Logic.- Sequential Logic Design.- Verilog (Part 2).- Behavioral Modeling of Sequential Logic.- Memory.- Programmable Logic.- Arithmetic Circuits.- Computer System Design.- Appendix A: List of Worked Examples.
£62.99
Springer International Publishing AG Reversible Computation
Book Synopsis
£73.88
De Gruyter High Performance Parallel Runtimes: Design and
Book SynopsisThis book focuses on the theoretical and practical aspects of parallel programming systems for today's high performance multi-core processors and discusses the efficient implementation of key algorithms needed to implement parallel programming models. Such implementations need to take into account the specific architectural aspects of the underlying computer architecture and the features offered by the execution environment.This book briefly reviews key concepts of modern computer architecture, focusing particularly on the performance of parallel codes as well as the relevant concepts in parallel programming models. The book then turns towards the fundamental algorithms used to implement the parallel programming models and discusses how they interact with modern processors. While the book will focus on the general mechanisms, we will mostly use the Intel processor architecture to exemplify the implementation concepts discussed but will present other processor architectures where appropriate. All algorithms and concepts are discussed in an easy to understand way with many illustrative examples, figures, and source code fragments.The target audience of the book is students in Computer Science who are studying compiler construction, parallel programming, or programming systems. Software developers who have an interest in the core algorithms used to implement a parallel runtime system, or who need to educate themselves for projects that require the algorithms and concepts discussed in this book will also benefit from reading it. You can find the source code for this book at https://github.com/parallel-runtimes/lomp.
£65.55
De Gruyter Analog and Hybrid Computer Programming
Book Synopsis As classic digital computers are about to reach their physical and architectural boundaries, interest in unconventional approaches to computing, such as quantum and analog computers, is rapidly increasing. For a wide variety of practical applications, analog computers can outperform classic digital computers in terms of both raw computational speed and energy efficiency. This makes them ideally suited a co-processors to digital computers, thus forming hybrid computers. This second edition of "Analog and Hybrid Computer Programming" provides a thorough introduction to the programming of analog and hybrid computers. It contains a wealth of practical examples, ranging from simple problems such as radioactive decay, harmonic oscillators, and chemical reaction kinetics to advanced topics which include the simulation of neurons, chaotic systems such as a double-pendulum simulation and many more. In addition to these examples, it contains a chapter on special functions which can be used as "subroutines" in an analog computer setup.
£43.20
Springer International Publishing AG FPGAs for Software Programmers
Book SynopsisThis book makes powerful Field Programmable Gate Array (FPGA) and reconfigurable technology accessible to software engineers by covering different state-of-the-art high-level synthesis approaches (e.g., OpenCL and several C-to-gates compilers). It introduces FPGA technology, its programming model, and how various applications can be implemented on FPGAs without going through low-level hardware design phases. Readers will get a realistic sense for problems that are suited for FPGAs and how to implement them from a software designer’s point of view. The authors demonstrate that FPGAs and their programming model reflect the needs of stream processing problems much better than traditional CPU or GPU architectures, making them well-suited for a wide variety of systems, from embedded systems performing sensor processing to large setups for Big Data number crunching. This book serves as an invaluable tool for software designers and FPGA design engineers who are interested in high design productivity through behavioural synthesis, domain-specific compilation, and FPGA overlays. Introduces FPGA technology to software developers by giving an overview of FPGA programming models and design tools, as well as various application examples; Provides a holistic analysis of the topic and enables developers to tackle the architectural needs for Big Data processing with FPGAs; Explains the reasons for the energy efficiency and performance benefits of FPGA processing; Provides a user-oriented approach and a sense for where and how to apply FPGA technology. Table of ContentsIntroduction.- CPUs, GPUs, CGRAs, Vector Processing, Systolic Arrays, FPGAs.- The von Neuman Model versus data stream processing.- FPGAs for software designers.- Languages, libraries, and compilers for specific problems.- Behavioral Compiler Capabilities and optimization strategies.- Mapping Approaches and Tools for Heterogeneous FPGAs.- Automatic Tool Flows.- Design frameworks, tools, and tool interaction.- Hardware Platforms.- Parallel Architectures and Overlays.- FPGA Virtualization.- Applications from a Programmers Point of View.- Future Directions.
£113.99
Springer International Publishing AG Designing with Xilinx® FPGAs: Using Vivado
Book SynopsisThis book helps readers to implement their designs on Xilinx® FPGAs. The authors demonstrate how to get the greatest impact from using the Vivado® Design Suite, which delivers a SoC-strength, IP-centric and system-centric, next generation development environment that has been built from the ground up to address the productivity bottlenecks in system-level integration and implementation. This book is a hands-on guide for both users who are new to FPGA designs, as well as those currently using the legacy Xilinx tool set (ISE) but are now moving to Vivado. Throughout the presentation, the authors focus on key concepts, major mechanisms for design entry, and methods to realize the most efficient implementation of the target design, with the least number of iterations.Table of ContentsChapter 1: State of the Art Programmable Logic 1Chapter 2: Vivado Design Tools 17Chapter 3: IP Flows 23Chapter 4: Gigabit Transceivers 35Chapter 5: Memory Controllers 49Chapter 6: Processor Options 65Chapter 7: Vivado IP Integrator 75Chapter 8: SysGen for DSP 85Chapter 9: Synthesis 97Chapter 10: C Based Design 111Chapter 11: Simulation 127Chapter 12: Clocking 141Chapter 13: Stacked Silicon Interconnect (SSI) 155Chapter 14: Timing Closure 167Chapter 15: Power Analysis and Optimization 179Chapter 16: System Monitor 191Chapter 17: Hardware Debug 205Chapter 18: Emulation Using FPGAs 221Chapter 19: Partial Reconfiguration & Hierarchical Design 239
£98.99
Springer International Publishing AG Modern Data Strategy
Book SynopsisThis book contains practical steps business users can take to implement data management in a number of ways, including data governance, data architecture, master data management, business intelligence, and others. It defines data strategy, and covers chapters that illustrate how to align a data strategy with the business strategy, a discussion on valuing data as an asset, the evolution of data management, and who should oversee a data strategy. This provides the user with a good understanding of what a data strategy is and its limits. Critical to a data strategy is the incorporation of one or more data management domains. Chapters on key data management domains—data governance, data architecture, master data management and analytics, offer the user a practical approach to data management execution within a data strategy. The intent is to enable the user to identify how execution on one or more data management domains can help solve business issues. This book is intended for business users who work with data, who need to manage one or more aspects of the organization’s data, and who want to foster an integrated approach for how enterprise data is managed. This book is also an excellent reference for students studying computer science and business management or simply for someone who has been tasked with starting or improving existing data management.Table of Contents1 Evolution to Modern Data Management.- 2 Big Data and Data Management.- 3 Valuing Data as an Asset.- 4 Physical Asset Management vs. Data Management.- 5 Leading Data Strategy.- 6 Implementing a Data Strategy.- 7 Overview of Data Management Frameworks.- 8 Data Governance.- 9 Data Architecture.- 10 Master Data Management.- 11 Data Quality.- 12 Data Warehousing and Business Intelligence.- 13 Data Analytics.- 14 Data Privacy.- 15 Data Security.- 16 Metadata.- 17 Records Management.
£113.99
Springer International Publishing AG Guide to Data Structures: A Concise Introduction
Book SynopsisThis accessible and engaging textbook/guide provides a concise introduction to data structures and associated algorithms. Emphasis is placed on the fundamentals of data structures, enabling the reader to quickly learn the key concepts, and providing a strong foundation for later studies of more complex topics. The coverage includes discussions on stacks, queues, lists, (using both arrays and links), sorting, and elementary binary trees, heaps, and hashing. This content is also a natural continuation from the material provided in the separate Springer title Guide to Java by the same authors.Topics and features: reviews the preliminary concepts, and introduces stacks and queues using arrays, along with a discussion of array-based lists; examines linked lists, the implementation of stacks and queues using references, binary trees, a range of varied sorting techniques, heaps, and hashing; presents both primitive and generic data types in each chapter, and makes use of contour diagrams to illustrate object-oriented concepts; includes chapter summaries, and asks the reader questions to help them interact with the material; contains numerous examples and illustrations, and one or more complete program in every chapter; provides exercises at the end of each chapter, as well as solutions to selected exercises, and a glossary of important terms.This clearly-written work is an ideal classroom text for a second semester course in programming using the Java programming language, in preparation for a subsequent advanced course in data structures and algorithms. The book is also eminently suitable as a self-study guide in either academe or industry.Trade Review“This text is intended to provide undergraduates using Java with a concise, focused, and relatively simple coverage of some of the basic data structures in use. These include arrays, linked lists, trees, heaps (in arrays), and hash tables. … The book covers the algorithms and data structures well with clear language, abundant diagrams, and good exercises. It could be a good introduction for curricula using Java as a primary teaching language.” (Jeffrey Putnam, Computing Reviews, July, 2018)Table of ContentsPreliminary Concepts Stacks Using Arrays Queues Using Arrays Lists Using Arrays Lists Using Objects and References Ordered Linked Lists Stacks and Queues Using References Binary Trees Sorting Heaps Hashing
£36.95
Springer International Publishing AG Formal Methods: Foundations and Applications: 20th Brazilian Symposium, SBMF 2017, Recife, Brazil, November 29 — December 1, 2017, Proceedings
Book SynopsisThis book constitutes the refereed proceedings of the 20th Brazilian Symposium on Formal Methods, SBMF 2017, which took place in Recifel, Brazil, in November/December 2017.The 16 papers presented together with three invited talks were carefully reviewed and selected from 37 submissions. They are organized in the following topical sections: formal methods integration and experience reports; model checking; refinement and verification; and semantics and languages.The chapter 'Rapidly Adjustable Non-Intrusive Online Monitoring for Multi-core Systems' is published open access under a CC BY 4.0 license.Table of ContentsFormal methods integration and experience reports.- Model checking.- Refinement and verification.- Semantics and languages.
£49.49
Springer-Verlag Berlin and Heidelberg GmbH & Co. KG Job Scheduling Strategies for Parallel
Book SynopsisThis volume contains the papers selected after a very careful refereeing process for presentation during the Workshop on Job Scheduling Stategies for Parallel Processing, held in Santa Barbara, California, as a prelude to the IPPS '95 conference in April 1995.The 19 full papers presented demonstrate that parallel job scheduling takes on a crucial role as multi-user parallel supercomputers become more widespread. All aspects of job scheduling for parallel systems are covered, from the perspectives of academic research, industrial design of parallel systems, as well as user needs. Of particular interest, also for nonexpert readers, is the introductory paper "Parallel Job Scheduling: Issues and Approaches" by the volume editors.Table of ContentsParallel job scheduling: Issues and approaches.- Scheduling on the Tera MTA.- A scalable multi-discipline, multiple-processor scheduling framework for IRIX.- Scheduling to reduce memory coherence overhead on coarse-grain multiprocessors.- Time Space Sharing Scheduling and architectural support.- Demand-based coscheduling of parallel jobs on multiprogrammed multiprocessors.- Multiprocessor scheduling for high-variability service time distributions.- The interaction between memory allocation and adaptive partitioning in message-passing multicomputers.- Analysis of non-work-conserving processor partitioning policies.- Loop-Level Process Control: An effective processor allocation policy for multiprogrammed shared-memory multiprocessors.- A microeconomic scheduler for parallel computers.- On the benefits and limitations of dynamic partitioning in parallel computer systems.- Intelligent fuzzy control to augment scheduling capabilities of network queuing systems.- Parallel processing on dynamic resources with CARMI.- Job scheduling under the Portable Batch System.- The ANL/IBM SP scheduling system.- Requirements of the Cornell Theory Center for resource management and process scheduling.- Job management requirements for nas parallel systems and clusters.- Job characteristics of a production parallel scientific workload on the NASA Ames iPSC/860.
£42.74
Springer Fachmedien Wiesbaden Ordnungen und Verbände: Grundlagen,
Book SynopsisDas Lehrbuch stellt eine grundlegende Einführung in die mathematische Theorie der geordneten Mengen und Verbände dar. Neben wichtigen Begriffen werden allgemeine Vorgehensweisen und Beweistechniken demonstriert, die für dieses Gebiet typisch sind. Auch werden eine Reihe von Anwendungen diskutiert, insbesondere aus der Informatik, wie logische Schaltungen, Semantik von Programmiersprachen und die Untersuchung von Kausalität in verteilten Systemen.Table of ContentsMathematische Grundlagen - Verbände und Ordnungen - Einige wichtige Verbandsklassen - Fixpunkttheorie mit Anwendungen - Vervollständigung und Darstellung mittels Vervollständigung - Wohlgeordnete Mengen und das Auswahlaxiom - Einige Informatik-Anwendungen von Ordnungen und Verbänden
£34.19
Springer Fachmedien Wiesbaden Eigenschaftsorientierte Beschreibung der
Book SynopsisDavid Trachtenherz entwickelt einen Lösungsansatz zur eigenschaftsorientierten Beschreibung der logischen Architektur eingebetteter Systeme, der eine präzise deklarative Spezifikation funktionaler Eigenschaften mit wählbarem Grad der Abstraktion für unterschiedliche Entwicklungsphasen und -ebenen ermöglicht.Table of ContentsLogische Architektur; Formale Grundlagen; Grundlagen eigenschaftsorientierter Architekturbeschreibung; Anschauliche Darstellung eigenschaftsorientierter Architekturspezifikation; Fallstudie ; Ströme und temporale Logik in Isabelle/HOL
£61.19
Springer Fachmedien Wiesbaden Logikkalküle in der Informatik: Wie wird Logik
Book SynopsisIm Mittelpunkt steht das Spannungsverhältnis zwischen einerseits dem herkömmlichen Logikansatz mit Begriffen wie Signatur, Struktur, Wahrheitswert und andererseits dem eher dynamisch ausgerichteten Begriff des Kalküls, also zwischen Semantik und Syntax. Wie dieser Graben überwunden wird, wird für verschiedene auch nicht-klassische Logiken vorgeführt: Prädikatenlogik, modale, temporale, nichtmonotone, epistemische Logik und andere. Dadurch wird insbesondere auch eine einführende Übersicht über Logiken gegeben, die an manchen Stellen der Informatik benötigt werden, zu deren Verständnis man sich aber kein ganzes spezielles Buch anschaffen möchte. Das Buch enthält einen einheitlichen Ansatz für verschiedene Logiken. Table of ContentsAussagenlogik - Prädikatenlogik – SLD-Kalkül – Modale Logik – Temporale Logik – Epistemische Logik – Deontische Logik – Nichtmonotone Logik – Default-Logik
£23.74
Bruckner Tomas. Repin OOP - Learn Object Oriented Thinking and Programming
£33.25
River Publishers Dashboard Design
Book SynopsisInteractive visualization and visual analytics tools have been designed and developed in the past and will be developed in the future as well. In each application domain in which data is measured, generated, and recorded we see a potential candidate for an interactive visualization tool with the goal to find insights and knowledge in the data. This knowledge can be found either visually by humans’ interventions or algorithmically by the machine, in the best case by applying both concepts in combination as in visual analytics. One of the easiest ways to get an interactive visualization tool running is by means of dashboards, typically implemented as webpages that can run in a web browser and are accessible online, creating some kind of web-based solution.This book describes ways to design and implement dashboards based on the programming language Python, the graphics library Plotly, and Dash. The readers can use the provided dashboard codes as a starting point and extend the functionality and features on their desire.Technical topics discussed in the book include: Design in visualization Interaction principles in information visualization User interface design Linking Python, Dash, and Plotly Coding in Python Dashboard examples with Python code. Table of Contents1. Introduction 2. Creating Powerful Dashboards 3. Python, Dash, Plotly, and More 4. Coding in Python 5. Dashboard Examples 6. Challenges and Limitation 7. Conclusion
£94.99
River Publishers Cloud Native Networking Deep-Dive
Book SynopsisThis book demystifies how Kubernetes networking actually works by walking through a simple but practical simulation that mirrors reality as closely as possible, while skipping the gory details.Widespread adoption of container orchestration platforms like Kubernetes have spawned a whole field of industry products, startups and academic research in the field of container networking, typically termed as cloud-native networking. But, what is cloud-native networking? What are the various pieces and how do they fit together?Over recent years, most applications have been deployed on cloud infrastructure. Kubernetes has been the widely adopted orchestrator for these clouds. Application developers in most cases are unaware of the underlying plumbing in Kubernetes that holds their applications running as containers. Networking is an integral part of any Kubernetes environment and efficiently drives the various abstractions provided by it. Needless to say, it greatly effects the performance of applications, which in general have a humongous amount of inter-microservice communication. The impact is even more profound in multiple cloud environments.Table of Contents1. Introduction to Kubernetes Concepts 2. Workers and Containers 3. Container–Container Networking 4. Services 5. Exposing Services 6. Multi-cluster Networking
£52.24
River Publishers 5G Networks
Book SynopsisThis book provides comprehensive coverage of building an end-to-end view on how to architect, design, and orchestrate a 5G capable network that will integrate with 5G RAN, IP transport, datacenters, Telco Cloud, and 5G packet networks. It contains real-world examples with challenges and success strategies for deploying 5G Transport with closed-loop automation. It also focuses on aspects like scale, performance, latency, security, and manageability while building 5G transport for some of the world''s largest 5G networks as well as migration approaches from 4G to 5G transport and core network.5G is an emerging technology that mobile service providers (MNO/MVNO) across the world are embracing. They are willing to invest in enabling their infrastructure for 5G and explore new business opportunities with their enterprise/mobile customers. As per the Gartner survey, the majority of communication service provider (CSP) revenue will come from 5G.5G is going to open the door to new applications such as wireless virtual reality, low latency machine-to-machine communication, smart city infrastructure, autonomous vehicles, IoT deployment, artificial intelligence-based applications, industrial automation and so much more.
£92.14
River Publishers Cryptography and Network Security
Book SynopsisStarting with the historical facts behind the concept of information, which led to the creation of computer networks, Internet of things and cryptocurrencies, the book then arrives at the main definitions of cryptography and network security, the protocols that keep the systems running and the cybercrimes that could disrupt the systems. The basics of information theory, how to measure information, and the information associated with a source are discussed. Source codes are presented, along with the concepts of information transmission, joint information, conditional entropy, mutual information and channel capacity. Computer networks are discussed, including the main protocols and network architectures, and the important TCP/IP protocol. Network security, a topic intrinsically connected to computer networks and the Internet, is presented, along with information about basic hacker attacks, alternatives to prevent attacks, data protection and secure protocols. The information theoretical aspects of cryptography are described including the hash function. Appendices include a review of probability theory, a discussion of cryptoalgorithms and cryptosystems, and a glossary of information security terms. Illustrations and graphics help the reader understand the theory.Table of Contents1. Introduction 2. Main Definitions 3. Information Theory 4. Source Coding 5. Information Transmission and Channel Capacity 6. Computer Networks 7. Network Protocols and Architecture 8. The TCP/IP Protocol 9. Network Security 10. Theoretical Cryptography 11. The Hash Function 12. Criminal Cases
£109.25
River Publishers Introduction to Quantum Computing
Book SynopsisThis book explores quantum computing as a transformative technology and its applications in cryptography, teleportation, IoT, AI, Blockchain, and the futurist concept of quantum internet. It explains the fundamentals of quantum computing and how it’s different from classic computing. The challenges facing quantum computing will be discussed, and the types of quantum computing will be introduced and explained. The concept and types of Qubit and its implications on quantum computing applications will be explained.Table of Contents1. What is Quantum Computing? 2. Quantum Cryptography 3. Quantum Internet 4. Quantum teleportation 5. Quantum Computing and IoT 6. Quantum Computing and Blockchain: Myths and Facts 7. Quantum Computing and AI: A Mega-Buzzword 8. Quantum Computing Trends
£28.49
Brill Recent Progress in Computational Sciences and
Book SynopsisThis volume brings together selected contributed papers presented at the International Conference of Computational Methods in Science and Engineering (ICCMSE 2006), held in Chania, Greece, October 2006. The conference aims to bring together computational scientists from several disciplines in order to share methods and ideas. The ICCMSE is unique in its kind. It regroups original contributions from all fields of the traditional Sciences, Mathematics, Physics, Chemistry, Biology, Medicine and all branches of Engineering. It would be perhaps more appropriate to define the ICCMSE as a conference on computational science and its applications to science and engineering. Topics of general interest are: Computational Mathematics, Theoretical Physics and Theoretical Chemistry. Computational Engineering and Mechanics, Computational Biology and Medicine, Computational Geosciences and Meteorology, Computational Economics and Finance, Scientific Computation. High Performance Computing, Parallel and Distributed Computing, Visualization, Problem Solving Environments, Numerical Algorithms, Modelling and Simulation of Complex System, Web-based Simulation and Computing, Grid-based Simulation and Computing, Fuzzy Logic, Hybrid Computational Methods, Data Mining, Information Retrieval and Virtual Reality, Reliable Computing, Image Processing, Computational Science and Education etc. More than 800 extended abstracts have been submitted for consideration for presentation in ICCMSE 2005. From these 500 have been selected after international peer review by at least two independent reviewers.Table of ContentsComputational Mathematics, Theoretical Physics and Theoretical Chemistry. Computational Engineering and Mechanics, Computational Biology and Medicine, Computational Geosciences and Meteorology, Computational Economics and Finance, Scientific Computation. High Performance Computing, Parallel and Distributed Computing, Visualization, Problem Solving Environments, Numerical Algorithms, Modelling and Simulation of Complex System, Web-based Simulation and Computing, Grid-based Simulation and Computing, Fuzzy Logic, Hybrid Computational Methods, Data Mining, Information Retrieval and Virtual Reality, Reliable Computing, Image Processing, Computational Science and Education.
£218.50
Bernan Distribution Togaf Version 9.1
£16.10
Springer Verlag, Singapore Compact and Fast Machine Learning Accelerator for
Book SynopsisThis book presents the latest techniques for machine learning based data analytics on IoT edge devices. A comprehensive literature review on neural network compression and machine learning accelerator is presented from both algorithm level optimization and hardware architecture optimization. Coverage focuses on shallow and deep neural network with real applications on smart buildings. The authors also discuss hardware architecture design with coverage focusing on both CMOS based computing systems and the new emerging Resistive Random-Access Memory (RRAM) based systems. Detailed case studies such as indoor positioning, energy management and intrusion detection are also presented for smart buildings.Table of ContentsComputing on Edge Devices in Internet-of-things (IoT).- The Rise of Machine Learning in IoT system.- Least-squares-solver for Shadow Neural Network.- Tensor-solver for Deep Neural Network.- Distributed-solver for Networked Neural Network.- Conclusion.
£98.99
Springer Verlag, Singapore Proceedings of International Conference on
Book SynopsisThis book gathers a collection of high-quality peer-reviewed research papers presented at First International Conference on Innovations in Software Architecture and Computational Systems (ISACS 2021), held at Guru Nanak Institute of Technology, Kolkata, India, during 2 – 3 April 2021. The book primarily focuses on developing artificial intelligence-based algorithms and methodologies for enabling intelligent hardware and software systems. This book brings together the latest findings on efficient technological solutions for developing intelligent and hybrid systems, intelligent software architecture, machine intelligence-based analytical tools and also smart sensors and networks. The prime focus is on solving technological problems using state-of-the-art research finding like fuzzy computing, evolutionary and hybrid frameworks, neuro-computing, etc., along with other AI-based computation platforms. The book offers a valuable resource for all undergraduate, postgraduate students and researchers interested in exploring solution frameworks for social good problems using artificial intelligence. Table of ContentsText to Image Classification using Attn: Gan With Dense Net Architecture.- Cyclone Detection and Forecasting Using Deep Neural Networks through Satellite Data.- An Improved Differential Evolution Scheme for Multilevel Image Thresholding Aided with Fuzzy Entropy.- Clustered Fault Repairing Architecture for 3D ICs using Redundant TSV.- The Implementation of Similarity Measures in Group Decision-Making Problems by Signless Laplacian Energy of an Intuitionistic Fuzzy Graph.- Uniform Grid Formation by Asynchronous Fat Robots.- A LSB Substitution based Steganography Technique using DNA Computing for Color Images.- An Approach of Safe Stock Prediction using Genetic Algorithm.- Suicide Ideation Detection in Online Social Networks: A Comparative Review.- An Improved K-Means Algorithm for Effective Medical Image Segmentation.- Breast Cancer Histopathological Image Classification using Convolutional Neural Networks.- A Framework for Predicting Placement of a Graduate using Machine Learning Techniques.
£179.99
Springer Verlag, Singapore Computer Architecture and Organization:
Book SynopsisIn today’s workplace, computer and cybersecurity professionals must understand both hardware and software to deploy effective security solutions. This book introduces readers to the fundamentals of computer architecture and organization for security, and provides them with both theoretical and practical solutions to design and implement secure computer systems. Offering an in-depth and innovative introduction to modern computer systems and patent-pending technologies in computer security, the text integrates design considerations with hands-on lessons learned to help practitioners design computer systems that are immune from attacks. Studying computer architecture and organization from a security perspective is a new area. There are many books on computer architectures and many others on computer security. However, books introducing computer architecture and organization with security as the main focus are still rare. This book addresses not only how to secure computer components (CPU, Memory, I/O, and network) but also how to secure data and the computer system as a whole. It also incorporates experiences from the author’s recent award-winning teaching and research. The book also introduces the latest technologies, such as trusted computing, RISC-V, QEMU, cache security, virtualization, cloud computing, IoT, and quantum computing, as well as other advanced computing topics into the classroom in order to close the gap in workforce development. The book is chiefly intended for undergraduate and graduate students in computer architecture and computer organization, as well as engineers, researchers, cybersecurity professionals, and middleware designers.Table of Contents
£44.99
Pan Stanford Publishing Pte Ltd Convergence Through All-IP Networks
Book SynopsisThe convergence of two powerful technologies—wireless and the Internet—through IPv4/v6 protocol has led to emergence of next-generation networks (NGNs). NGN is no more a network of mere computers but a connected conglomeration of varied networks with diverse physical properties, with a plethora of network elements, along with a variety of real-time multimedia applications. This book covers the entire gamut of technology challenges from physical layer to application layer including security from both academic and industrial perspectives.Table of ContentsIntroduction. Addressing and Routing in IPv6. Routing in the Internet. All IP Networks - Mobility and Security. Transforming Extended-Homes: Next step towards a heterogeneous user centric convergent environment based on IPWireless Vehicular Networks: Architecture, Protocols and Standards. Next generation IPv6 Network Security – towards Automatic and Intelligent Networks. The Internet of Things. 6LoWPAN - Interconnecting Objects with IPv6IP Over Optical Fibre. IPv6 over WiMAX.
£109.25
Springer Verlag, Singapore Parallel and Distributed Computing, Applications
Book SynopsisThis book constitutes the refereed proceedings of the International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT) which was held in Jeju, Korea in August, 2023. The papers of this volume are organized in topical sections on wired and wireless communication systems, high dimensional data representation and processing, networks and information security, computing techniques for efficient networks design, electronic circuits for communication systems.Table of ContentsTrack 1. Networking and Architectures.- Track 2. Software Systems and Technologies.- Track 3. Algorithms and Applications.- Track 4. Security and Privacy
£116.99
