Description

Book Synopsis

This book describes a cross-domain architecture and design tools for networked complex systems where application subsystems of different criticality coexist and interact on networked multi-core chips. The architecture leverages multi-core platforms for a hierarchical system perspective of mixed-criticality applications. This system perspective is realized by virtualization to establish security, safety and real-time performance. The impact further includes a reduction of time-to-market, decreased development, deployment and maintenance cost, and the exploitation of the economies of scale through cross-domain components and tools.

  • Describes an end-to-end architecture for hypervisor-level, chip-level, and cluster level.
  • Offers a solution for different types of resources including processors, on-chip communication, off-chip communication, and I/O.
  • Provides a cross-domain approach with examples for wind-power, health-care, and avionics.

    Table of Contents
    Introduction. Architectural Style. State-of-the-Art and Challenges. Modeling and Development Process. Algorithms and Tools. Execution Environment. Chip-Level Communication Services. Cluster-Level Communication Series. Resource Management Services. Safety Certification of Mixed-Criticality Systems. Evaluation. Bibliography.

Distributed RealTime Architecture for

Product form

£142.50

Includes FREE delivery

RRP £150.00 – you save £7.50 (5%)

Order before 4pm tomorrow for delivery by Fri 16 Jan 2026.

A Hardback by Hamidreza Ahmadian, Roman Obermaisser, Jon Perez

Out of stock


    View other formats and editions of Distributed RealTime Architecture for by Hamidreza Ahmadian

    Publisher: CRC Press
    Publication Date: 8/21/2018 12:00:00 AM
    ISBN13: 9780815360643, 978-0815360643
    ISBN10: 0815360649

    Description

    Book Synopsis

    This book describes a cross-domain architecture and design tools for networked complex systems where application subsystems of different criticality coexist and interact on networked multi-core chips. The architecture leverages multi-core platforms for a hierarchical system perspective of mixed-criticality applications. This system perspective is realized by virtualization to establish security, safety and real-time performance. The impact further includes a reduction of time-to-market, decreased development, deployment and maintenance cost, and the exploitation of the economies of scale through cross-domain components and tools.

    • Describes an end-to-end architecture for hypervisor-level, chip-level, and cluster level.
    • Offers a solution for different types of resources including processors, on-chip communication, off-chip communication, and I/O.
    • Provides a cross-domain approach with examples for wind-power, health-care, and avionics.

      Table of Contents
      Introduction. Architectural Style. State-of-the-Art and Challenges. Modeling and Development Process. Algorithms and Tools. Execution Environment. Chip-Level Communication Services. Cluster-Level Communication Series. Resource Management Services. Safety Certification of Mixed-Criticality Systems. Evaluation. Bibliography.

    Recently viewed products

    © 2026 Book Curl

      • American Express
      • Apple Pay
      • Diners Club
      • Discover
      • Google Pay
      • Maestro
      • Mastercard
      • PayPal
      • Shop Pay
      • Union Pay
      • Visa

      Login

      Forgot your password?

      Don't have an account yet?
      Create account