Description

Book Synopsis
Timing, memory, power dissipation, testing, and testability are all crucial elements of VLSI circuit design. In this volume culled from the popular VLSI Handbook, experts from around the world provide in-depth discussions on these and related topics. Stacked gate, embedded, and flash memory all receive detailed treatment, including their power consumption and recent developments in low-power memories. Reflecting the rapid development and importance of systems-on-a-chip (SOCs), an entire chapter is devoted to application-specific integrated circuits (ASICs). Design-related topics include microprocessor architectures, layout methods, design verification, testability concepts, and various CAD tools.
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Table of Contents
System Timing. ROM/PROM/EPROM. SRAM. Embedded Memory. Flash Memories. Dynamic Random Access Memory. Low-Power Memory Circuits. Timing and Signal Integrity Analysis. Microprocessor Design Verification. Microprocessor Layout Method. Architecture. ASIC Design. Logic Synthesis for Field Programmable Gate Array (EPGA) Technology. Testability Concepts and DFT. ATPG and BIST. CAD Tools for BIST/DFT and Delay Faults.

Memory Microprocessor and ASIC

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    £161.50

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    A Hardback by Wai-Kai Chen

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      Publisher: Taylor & Francis Inc
      Publication Date: 26/03/2003
      ISBN13: 9780849317378, 978-0849317378
      ISBN10: 0849317371

      Description

      Book Synopsis
      Timing, memory, power dissipation, testing, and testability are all crucial elements of VLSI circuit design. In this volume culled from the popular VLSI Handbook, experts from around the world provide in-depth discussions on these and related topics. Stacked gate, embedded, and flash memory all receive detailed treatment, including their power consumption and recent developments in low-power memories. Reflecting the rapid development and importance of systems-on-a-chip (SOCs), an entire chapter is devoted to application-specific integrated circuits (ASICs). Design-related topics include microprocessor architectures, layout methods, design verification, testability concepts, and various CAD tools.
      .

      Table of Contents
      System Timing. ROM/PROM/EPROM. SRAM. Embedded Memory. Flash Memories. Dynamic Random Access Memory. Low-Power Memory Circuits. Timing and Signal Integrity Analysis. Microprocessor Design Verification. Microprocessor Layout Method. Architecture. ASIC Design. Logic Synthesis for Field Programmable Gate Array (EPGA) Technology. Testability Concepts and DFT. ATPG and BIST. CAD Tools for BIST/DFT and Delay Faults.

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