Description

Book Synopsis
Low Power Design Methodologies presents the first in-depth coverage of all the layers of the design hierarchy, ranging from the technology, circuit, logic and architectural levels, up to the system layer.

Table of Contents
Preface. 1. Introduction; J.M. Rabaey, et al. Part I: Technology and circuit design levels. 2. Device and technology impact on low power electronics; Chenming Hu. 3. Low power circuit technologies; C. Svensson, Dake Liu. 4. Energy-recovery CMOS; W.C. Athas. 5. Low power clock distribution; J.G. Xi, W.W.-M. Dai. Part II: Logic and module design levels. 6. Logic synthesis and module design levels; M. Pedram. 7. Low power arithmetic components; T.K. Callawy, E.E. Schwartzlander. 8. Low power memory design; K. Itoh. Part III: Architecture and system design levels. 9. Low-power microprocessor design; S. Gary. 10. Portable video-on-demand in wireless communication; T.H. Meng, et al. 11. Algorithm and architectural level methodologies; R. Mehra, et al. Index.

Low Power Design Methodologies 336 The Springer International Series in Engineering and Computer Science

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    A Paperback by Jan M. Rabaey, Massoud Pedram

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      View other formats and editions of Low Power Design Methodologies 336 The Springer International Series in Engineering and Computer Science by Jan M. Rabaey

      Publisher: Springer Us
      Publication Date: 10/9/2012 12:00:00 AM
      ISBN13: 9781461359753, 978-1461359753
      ISBN10: 1461359759
      Also in:
      Electrical engineering

      Description

      Book Synopsis
      Low Power Design Methodologies presents the first in-depth coverage of all the layers of the design hierarchy, ranging from the technology, circuit, logic and architectural levels, up to the system layer.

      Table of Contents
      Preface. 1. Introduction; J.M. Rabaey, et al. Part I: Technology and circuit design levels. 2. Device and technology impact on low power electronics; Chenming Hu. 3. Low power circuit technologies; C. Svensson, Dake Liu. 4. Energy-recovery CMOS; W.C. Athas. 5. Low power clock distribution; J.G. Xi, W.W.-M. Dai. Part II: Logic and module design levels. 6. Logic synthesis and module design levels; M. Pedram. 7. Low power arithmetic components; T.K. Callawy, E.E. Schwartzlander. 8. Low power memory design; K. Itoh. Part III: Architecture and system design levels. 9. Low-power microprocessor design; S. Gary. 10. Portable video-on-demand in wireless communication; T.H. Meng, et al. 11. Algorithm and architectural level methodologies; R. Mehra, et al. Index.

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