Description
Book SynopsisINTEGRATED CIRCUIT MANUFACTURABILITY provides comprehensive coverage of the process and design variables that determine the ease and feasibility of fabrication (or manufacturability) of contemporary VLSI systems and circuits. This book progresses from semiconductor processing to electrical design to system architecture. The material provides a theoretical background as well as case studies, examining the entire design for the manufacturing path from circuit to silicon. Each chapter includes tutorial and practical applications coverage.
INTEGRATED CIRCUIT MANUFACTURABILITY illustrates the implications of manufacturability at every level of abstraction, including the effects of defects on the layout, their mapping to electrical faults, and the corresponding approaches to detect such faults. The reader will be introduced to key practical issues normally applied in industry and usually required by quality, product, and design engineering departments in today''s design practice
Table of ContentsPreface.
Introduction (Jose Pineda de Gyvez).
Defect Monitoring and Characterization (Eric Bruls).
Digital CMOS Fault Modeling and Inductive Fault Analysis (Manoj Sachdev).
Functional Yield Modeling (Gary C. Cheek and Geoff O'Donoghue).
Critical Area and Fault Probability Prediction (D.M.H. Walker).
Statistical Methods of Parametric Yield and Quality Enhancement (Maciej Styblinski).
Architectural Fault Tolerance (S.K. Tewksbury).
Design for Test and Manufacturability (Dhiraj Pradhan and Adit Singh).
Testing Solutions for MCM Manufacturing (Yervant Zorian).
Index.
About the Editors.
