Description

Book Synopsis
Presenting information on electrostatic discharge (ESD) and the characterization of semiconductor devices, this book examines ESD physical models and discusses the test systems and testing and specifications of each model, including the RF ESD test systems and magnetic recording (MR) systems and latchup.

Table of Contents

About the Author xvii

Preface xix

Acknowledgments xxiii

1 Introduction 1

1.1 Testing for ESD, EMI, EOS, EMC, and Latchup 1

1.2 Component and System Level Testing 1

1.3 Qualification Testing 2

1.4 ESD Standards 3

1.5 Component Level Standards 6

1.6 System Level Standards 7

1.7 Factory and Material Standards 7

1.8 Characterization Testing 8

1.9 ESD Library Characterization and Qualification 12

1.10 ESD Component Standards and Chip Architectures 12

1.11 System Level Characterization 13

1.12 Summary and Closing Comments 13

Problems 14

References 15

2 Human Body Model 17

2.1 History 17

2.2 Scope 18

2.3 Purpose 18

2.4 Pulse Waveform 18

2.5 Equivalent Circuit 19

2.6 Test Equipment 20

2.7 Test Sequence and Procedure 23

2.8 Failure Mechanisms 25

2.9 HBM ESD Current Paths 26

2.10 HBM ESD Protection Circuit Solutions 28

2.11 Alternate Test Methods 32

2.12 HBM Two-Pin Stress 34

2.13 HBM Small Step Stress 37

2.14 Summary and Closing Comments 38

Problems 39

References 39

3 Machine Model 43

3.1 History 43

3.2 Scope 43

3.3 Purpose 43

3.4 Pulse Waveform 44

3.5 Equivalent Circuit 45

3.6 Test Equipment 45

3.7 Test Sequence and Procedure 47

3.8 Failure Mechanisms 49

3.9 MM ESD Current Paths 49

3.10 MM ESD Protection Circuit Solutions 52

3.11 Alternate Test Methods 55

3.12 Machine Model to Human Body Model Ratio 57

3.13 Machine Model Status as an ESD Standard 58

3.14 Summary and Closing Comments 58

Problems 59

References 59

4 Charged Device Model (CDM) 61

4.1 History 61

4.2 Scope 61

4.3 Purpose 62

4.4 Pulse Waveform 62

4.5 Equivalent Circuit 65

4.6 Test Equipment 65

4.7 Test Sequence and Procedure 67

4.8 Failure Mechanisms 69

4.9 CDM ESD Current Paths 70

4.10 CDM ESD Protection Circuit Solutions 72

4.11 Alternative Test Methods 74

4.12 Charged Board Model (CBM) 75

4.13 Summary and Closing Comments 77

Problems 79

References 80

5 Transmission Line Pulse (TLP) Testing 84

5.1 History 84

5.2 Scope 85

5.3 Purpose 85

5.4 Pulse Waveform 86

5.5 Equivalent Circuit 87

5.6 Test Equipment 88

5.7 Test Sequence and Procedure 95

5.8 TLP Pulsed I–V Characteristic 98

5.9 Alternate Methods 101

5.10 TLP-to-HBM Ratio 104

5.11 Summary and Closing Comments 104

Problems 104

References 105

6 Very Fast Transmission Line Pulse (VF-TLP) Testing 108

6.1 History 108

6.2 Scope 108

6.3 Purpose 108

6.4 Pulse Waveform 109

6.5 Equivalent Circuit 111

6.6 Test Equipment Configuration 111

6.7 Test Sequence and Procedure 117

6.8 VF-TLP Pulsed I–V Characteristics 121

6.9 Alternate Test Methods 124

6.10 Summary and Closing Comments 125

Problems 128

References 128

7 IEC 61000-4-2 130

7.1 History 130

7.2 Scope 130

7.3 Purpose 130

7.4 Pulse Waveform 131

7.5 Equivalent Circuit 133

7.6 Test Equipment 133

7.7 Test Sequence and Procedure 135

7.8 Failure Mechanisms 137

7.9 IEC 61000-4-2 ESD Current Paths 138

7.10 ESD Protection Circuitry Solutions 139

7.11 Alternative Test Methods 140

7.12 Summary and Closing Comments 143

Problems 143

References 144

8 Human Metal Model (HMM) 147

8.1 History 147

8.2 Scope 147

8.3 Purpose 148

8.4 Pulse Waveform 148

8.5 Equivalent Circuit 149

8.6 Test Equipment 149

8.7 Test Configuration 150

8.8 Test Sequence and Procedure 153

8.9 Failure Mechanisms 157

8.10 ESD Current Paths 158

8.11 ESD Protection Circuit Solutions 158

8.12 Summary and Closing Comments 160

Problems 160

References 161

9 IEC 61000-4-5 163

9.1 History 163

9.2 Scope 164

9.3 Purpose 164

9.4 Pulse Waveform 165

9.5 Equivalent Circuit 166

9.6 Test Equipment 166

9.7 Test Sequence and Procedure 168

9.8 Failure Mechanisms 168

9.9 IEC 61000-4-5 ESD Current Paths 170

9.10 ESD Protection Circuit Solutions 170

9.11 Alternate Test Methods 171

9.12 Summary and Closing Comments 171

Problems 172

References 172

10 Cable Discharge Event (CDE) 174

10.1 History 174

10.2 Scope 175

10.3 Purpose 175

10.4 Cable Discharge Event – Charging, Discharging, and Pulse Waveform 175

10.5 Equivalent Circuit 178

10.6 Test Equipment 179

10.7 Test Measurement 180

10.8 Test Procedure 185

10.9 Measurement of a Cable in Different Conditions 185

10.10 Transient Field Measurements 195

10.11 Telecommunication Cable Discharge Test System 195

10.12 Cable Discharge Current Paths 200

10.13 Failure Mechanisms 200

10.14 Cable Discharge Event (CDE) Protection 201

10.15 Alternative Test Methods 203

10.16 Summary and Closing Comments 204

Problems 204

References 204

11 Latchup 206

11.1 History 206

11.2 Purpose 208

11.3 Scope 209

11.4 Pulse Waveform 209

11.5 Equivalent Circuit 209

11.6 Test Equipment 209

11.7 Test Sequence and Procedure 211

11.8 Failure Mechanisms 215

11.9 Latchup Current Paths 216

11.10 Latchup Protection Solutions 216

11.11 Alternate Test Methods 222

11.12 Single Event Latchup (SEL) Test Methods 224

11.13 Summary and Closing Comments 224

Problems 227

References 227

12 Electrical Overstress (EOS) 230

12.1 History 230

12.2 Scope 232

12.3 Purpose 233

12.4 Pulse Waveform 233

12.5 Equivalent Circuit 233

12.6 Test Equipment 234

12.7 Test Procedure and Sequence 234

12.8 Failure Mechanisms 236

12.9 Electrical Overstress (EOS) Protection Circuit Solutions 240

12.10 Electrical Overstress (EOS) Testing – TLP Method and EOS 249

12.11 Electrical Overstress (EOS) Testing – DC and Transient Latchup Testing 252

12.12 Summary and Closing Comments 252

Problems 252

References 253

13 Electromagnetic Compatibility (EMC) 257

13.1 History 257

13.2 Purpose 258

13.3 Scope 258

13.4 Pulse Waveform 258

13.5 Equivalent Circuit 259

13.6 Test Equipment 259

13.7 Test Procedures 261

13.8 Failure Mechanisms 261

13.9 ESD/EMC Current Paths 263

13.10 EMC Solutions 264

13.11 Alternative Test Methods 266

13.12 EMC/ESD Product Evaluation – IC Prequalification 267

13.13 EMC/ESD Scanning Detection – Upset Evaluation 267

13.14 EMC/ESD Product Qualification Process 268

13.15 Alternative ESD/EMC Scanning Methods 271

13.16 Current Reconstruction Methodology 276

13.17 Printed Circuit Board (PCB) Design EMC Solutions 277

13.18 Summary and Closing Comments 280

Problems 281

References 282

A Glossary of Terms 284

B Standards 288

B.1 ESD Association 288

B.2 International Organization of Standards 289

B.3 IEC 289

B.4 RTCA 289

B.5 Department of Defense 289

B.6 Military Standards 289

B.7 Airborne Standards and Lightning 290

Index 291

ESD Testing CL

    Product form

    £83.66

    Includes FREE delivery

    RRP £92.95 – you save £9.29 (9%)

    Order before 4pm today for delivery by Fri 19 Jun 2026.

    A Hardback by Steven H. Voldman


      View other formats and editions of ESD Testing CL by Steven H. Voldman

      Publisher: John Wiley & Sons Inc
      Publication Date: 02/12/2016
      ISBN13: 9780470511916, 978-0470511916
      ISBN10: 0470511915

      Description

      Book Synopsis
      Presenting information on electrostatic discharge (ESD) and the characterization of semiconductor devices, this book examines ESD physical models and discusses the test systems and testing and specifications of each model, including the RF ESD test systems and magnetic recording (MR) systems and latchup.

      Table of Contents

      About the Author xvii

      Preface xix

      Acknowledgments xxiii

      1 Introduction 1

      1.1 Testing for ESD, EMI, EOS, EMC, and Latchup 1

      1.2 Component and System Level Testing 1

      1.3 Qualification Testing 2

      1.4 ESD Standards 3

      1.5 Component Level Standards 6

      1.6 System Level Standards 7

      1.7 Factory and Material Standards 7

      1.8 Characterization Testing 8

      1.9 ESD Library Characterization and Qualification 12

      1.10 ESD Component Standards and Chip Architectures 12

      1.11 System Level Characterization 13

      1.12 Summary and Closing Comments 13

      Problems 14

      References 15

      2 Human Body Model 17

      2.1 History 17

      2.2 Scope 18

      2.3 Purpose 18

      2.4 Pulse Waveform 18

      2.5 Equivalent Circuit 19

      2.6 Test Equipment 20

      2.7 Test Sequence and Procedure 23

      2.8 Failure Mechanisms 25

      2.9 HBM ESD Current Paths 26

      2.10 HBM ESD Protection Circuit Solutions 28

      2.11 Alternate Test Methods 32

      2.12 HBM Two-Pin Stress 34

      2.13 HBM Small Step Stress 37

      2.14 Summary and Closing Comments 38

      Problems 39

      References 39

      3 Machine Model 43

      3.1 History 43

      3.2 Scope 43

      3.3 Purpose 43

      3.4 Pulse Waveform 44

      3.5 Equivalent Circuit 45

      3.6 Test Equipment 45

      3.7 Test Sequence and Procedure 47

      3.8 Failure Mechanisms 49

      3.9 MM ESD Current Paths 49

      3.10 MM ESD Protection Circuit Solutions 52

      3.11 Alternate Test Methods 55

      3.12 Machine Model to Human Body Model Ratio 57

      3.13 Machine Model Status as an ESD Standard 58

      3.14 Summary and Closing Comments 58

      Problems 59

      References 59

      4 Charged Device Model (CDM) 61

      4.1 History 61

      4.2 Scope 61

      4.3 Purpose 62

      4.4 Pulse Waveform 62

      4.5 Equivalent Circuit 65

      4.6 Test Equipment 65

      4.7 Test Sequence and Procedure 67

      4.8 Failure Mechanisms 69

      4.9 CDM ESD Current Paths 70

      4.10 CDM ESD Protection Circuit Solutions 72

      4.11 Alternative Test Methods 74

      4.12 Charged Board Model (CBM) 75

      4.13 Summary and Closing Comments 77

      Problems 79

      References 80

      5 Transmission Line Pulse (TLP) Testing 84

      5.1 History 84

      5.2 Scope 85

      5.3 Purpose 85

      5.4 Pulse Waveform 86

      5.5 Equivalent Circuit 87

      5.6 Test Equipment 88

      5.7 Test Sequence and Procedure 95

      5.8 TLP Pulsed I–V Characteristic 98

      5.9 Alternate Methods 101

      5.10 TLP-to-HBM Ratio 104

      5.11 Summary and Closing Comments 104

      Problems 104

      References 105

      6 Very Fast Transmission Line Pulse (VF-TLP) Testing 108

      6.1 History 108

      6.2 Scope 108

      6.3 Purpose 108

      6.4 Pulse Waveform 109

      6.5 Equivalent Circuit 111

      6.6 Test Equipment Configuration 111

      6.7 Test Sequence and Procedure 117

      6.8 VF-TLP Pulsed I–V Characteristics 121

      6.9 Alternate Test Methods 124

      6.10 Summary and Closing Comments 125

      Problems 128

      References 128

      7 IEC 61000-4-2 130

      7.1 History 130

      7.2 Scope 130

      7.3 Purpose 130

      7.4 Pulse Waveform 131

      7.5 Equivalent Circuit 133

      7.6 Test Equipment 133

      7.7 Test Sequence and Procedure 135

      7.8 Failure Mechanisms 137

      7.9 IEC 61000-4-2 ESD Current Paths 138

      7.10 ESD Protection Circuitry Solutions 139

      7.11 Alternative Test Methods 140

      7.12 Summary and Closing Comments 143

      Problems 143

      References 144

      8 Human Metal Model (HMM) 147

      8.1 History 147

      8.2 Scope 147

      8.3 Purpose 148

      8.4 Pulse Waveform 148

      8.5 Equivalent Circuit 149

      8.6 Test Equipment 149

      8.7 Test Configuration 150

      8.8 Test Sequence and Procedure 153

      8.9 Failure Mechanisms 157

      8.10 ESD Current Paths 158

      8.11 ESD Protection Circuit Solutions 158

      8.12 Summary and Closing Comments 160

      Problems 160

      References 161

      9 IEC 61000-4-5 163

      9.1 History 163

      9.2 Scope 164

      9.3 Purpose 164

      9.4 Pulse Waveform 165

      9.5 Equivalent Circuit 166

      9.6 Test Equipment 166

      9.7 Test Sequence and Procedure 168

      9.8 Failure Mechanisms 168

      9.9 IEC 61000-4-5 ESD Current Paths 170

      9.10 ESD Protection Circuit Solutions 170

      9.11 Alternate Test Methods 171

      9.12 Summary and Closing Comments 171

      Problems 172

      References 172

      10 Cable Discharge Event (CDE) 174

      10.1 History 174

      10.2 Scope 175

      10.3 Purpose 175

      10.4 Cable Discharge Event – Charging, Discharging, and Pulse Waveform 175

      10.5 Equivalent Circuit 178

      10.6 Test Equipment 179

      10.7 Test Measurement 180

      10.8 Test Procedure 185

      10.9 Measurement of a Cable in Different Conditions 185

      10.10 Transient Field Measurements 195

      10.11 Telecommunication Cable Discharge Test System 195

      10.12 Cable Discharge Current Paths 200

      10.13 Failure Mechanisms 200

      10.14 Cable Discharge Event (CDE) Protection 201

      10.15 Alternative Test Methods 203

      10.16 Summary and Closing Comments 204

      Problems 204

      References 204

      11 Latchup 206

      11.1 History 206

      11.2 Purpose 208

      11.3 Scope 209

      11.4 Pulse Waveform 209

      11.5 Equivalent Circuit 209

      11.6 Test Equipment 209

      11.7 Test Sequence and Procedure 211

      11.8 Failure Mechanisms 215

      11.9 Latchup Current Paths 216

      11.10 Latchup Protection Solutions 216

      11.11 Alternate Test Methods 222

      11.12 Single Event Latchup (SEL) Test Methods 224

      11.13 Summary and Closing Comments 224

      Problems 227

      References 227

      12 Electrical Overstress (EOS) 230

      12.1 History 230

      12.2 Scope 232

      12.3 Purpose 233

      12.4 Pulse Waveform 233

      12.5 Equivalent Circuit 233

      12.6 Test Equipment 234

      12.7 Test Procedure and Sequence 234

      12.8 Failure Mechanisms 236

      12.9 Electrical Overstress (EOS) Protection Circuit Solutions 240

      12.10 Electrical Overstress (EOS) Testing – TLP Method and EOS 249

      12.11 Electrical Overstress (EOS) Testing – DC and Transient Latchup Testing 252

      12.12 Summary and Closing Comments 252

      Problems 252

      References 253

      13 Electromagnetic Compatibility (EMC) 257

      13.1 History 257

      13.2 Purpose 258

      13.3 Scope 258

      13.4 Pulse Waveform 258

      13.5 Equivalent Circuit 259

      13.6 Test Equipment 259

      13.7 Test Procedures 261

      13.8 Failure Mechanisms 261

      13.9 ESD/EMC Current Paths 263

      13.10 EMC Solutions 264

      13.11 Alternative Test Methods 266

      13.12 EMC/ESD Product Evaluation – IC Prequalification 267

      13.13 EMC/ESD Scanning Detection – Upset Evaluation 267

      13.14 EMC/ESD Product Qualification Process 268

      13.15 Alternative ESD/EMC Scanning Methods 271

      13.16 Current Reconstruction Methodology 276

      13.17 Printed Circuit Board (PCB) Design EMC Solutions 277

      13.18 Summary and Closing Comments 280

      Problems 281

      References 282

      A Glossary of Terms 284

      B Standards 288

      B.1 ESD Association 288

      B.2 International Organization of Standards 289

      B.3 IEC 289

      B.4 RTCA 289

      B.5 Department of Defense 289

      B.6 Military Standards 289

      B.7 Airborne Standards and Lightning 290

      Index 291

      Recently viewed products

      © 2026 Book Curl

        • American Express
        • Apple Pay
        • Diners Club
        • Discover
        • Google Pay
        • Maestro
        • Mastercard
        • PayPal
        • Shop Pay
        • Union Pay
        • Visa

        Login

        Forgot your password?

        Don't have an account yet?
        Create account