Description
Book Synopsis
Responding to the requirements for performance, flexibility, and economy, the networking industry has opted to build products around network processors. This volume defines and advances the field of network processor design. It contains 20 chapters, with topics ranging from architectures to programming models, from security to quality of service.
Table of Contents
Network Processor Design: Issues and Practics, Volume 2 Contents Preface Chapter 1. Network Processors: Themes and Challenges, Patrick Crowley, Mark Franklin, Haldun Hadimioglu, and Peter Z. Onufryk Part 1. Design Principles Chapter 2. A Programmable Scalable Platform for Next Generation Networking, Christos J.Georgiou, Valentina Salapura, and Monty Denneau Chapter 3. Power Considerations in Network Processor Design, Mark A. Franklin and Tilman Wolf Chapter 4. Worst-Case Execution Time Estimation for Hardware-assisted Multithreaded Processors, Patrick Crowley and Jean-Loup Baer Chapter 5. Multiprocessor Scheduling in Processor-based Router Platforms: Issues and Ideas, Anand Srinivasan, Philip Holman, James Anderson, Sanjoy Baruah and Jasleen Kaur Chapter 6. A Massively Multithreaded Packet Processor, Steve Melvin, Mario Nemirovsky, Enric Musoll, Jeff Huynh, Rodolfo Milito, Hector Urdaneta, and Koroush Saraf Chapter 7. Exploring Trade-offs in Performance and Programmability of Processing Element Topologies for Network Processors, Matthias Gries, Chidamber Kulkarni, Christian Sauer and Kurt Keutzer Chapter 8. Packet Classification and Termination in a Protocol Processor, Ulf Nordqvist and Dake Liu Chapter 9. NP-Click: A Programming Model for the Intel IXP1200, Niraj Shah, William Plishker and Kurt Keutzer Chapter 10. NEPAL: A Framework for Efficiently Structuring Applications for Network Processors, Gokhan Memik and William H. Mangione-Smith Chapter 11. Efficient and Faithful Performance Modeling for Network-Processor Based System Designs, Prashant Pradhan, Wen Xu, Indira Nair and Sambit Sahu Chapter 12. High-speed Legitimacy-based DDoS Packet Filtering with Network Processors: A Case Study and Implementation on the Intel IXP1200, Roshan K. Thomas, Brian Mark, Tommy Johnson and James Croall Chapter 13. Directions in Packet Classification for Network Processors, Michael E. Kounavis, Alok Kumar, Harrick Vin, Raj Yavatkar and Andrew T. Campbell Part 2. Practices Chapter 14. Implementing High-performance, High-value Traffic Management Using Agere Network Processor Solutions, Jian-Guo Chen, David Sonnier, Robert Munoz, Vinoj Kumar, and Ambalavanar Arulambalam Chapter 15. AMCC - nPcoreTM "NISC" Architecture, Robin Melnick and Keith Morris Chapter 16. Adaptable Badwidth Allocation for QoS Support in Network Processors, Clark Jeffries, Mohammad Peyravian, and Ravi Sabhikhi Chapter 17. IDT - Network Search Engine with QDRTM LA-1 Interface, Michael J. Miller Chapter 18. Implementing Voice over AAL2 on a Network Processor, Jaroslaw Sydir, Prashant Chandra, Alok Kumar, Sridhar Lakshmanamurthy, Longsong Lin, Muthaiah Venkatachalam Chapter 19. Implementing QoS Mechanisms on the Motorola C-Port C-5e Network Processor, Pranav Gambhire Chapter 20. A C-based Programming Language for Multiprocessor Network SoC Architectures. Kevin Crozier
