Description
Book Synopsis.- FAA+RTS: Designing Fault-Aware Adaptive Real-Time Systems - From Specification to Execution.
.- Experimental Assessment and Biaffine Modeling of the Impact of Ambient Temperature on SoC Power Requirements.
.- EPIC-Q : Equivalent-Policy Invariant Comparison enhanced transfer Q learning for run-time SoC performance-power optimization.
.- Accelerating Depthwise Separable Convolutions on Ultra-Low-Power Devices.
.- It's all about PR - Smart Benchmarking AI Accelerators using Performance Representatives.
.- Travel Time-Based Task Mapping for NoC-Based DNN Accelerator.
.- HW-EPOLL: Hardware-Assisted User Space Event Notification for Epoll Syscall.
.- SIZALIZER: Multilevel Analysis Framework for Object Size Optimization.
.- SafeFloatZone: Identify Safe Domains for Elementary Functions.
.- Radar Object Detection on a Vector Processor using Sparse Convolutional Neural Networks.
.- Optimizing QAM Demodulation with NEON SIMD and Algorithmic Ap proximation Techniques.
.- A Novel Chaining-Based Indirect Addressing Mode in a Vertical Vector Processor.
.- AutoSync Framework for expressing Synchronization Intentions in Multi threaded Programs.
.- HyRPF: Hybrid RRAM Prototyping on FPGA.
.- GLoRia: An Energy-Efficient GPU-RRAM System Stack for Large Neural Networks.
.- Evaluating the Impact of Racetrack Memory Misalignment Faults on BNNs Performance.
.- NanoSoftController: A Minimal Soft Processor for System State Control in FPGA Systems.
