Description
Book SynopsisCoarse-grained reconfigurable architecture (CGRA) has emerged as a solution for flexible, application-specific optimization of embedded systems. Helping you understand the issues involved in designing and constructing embedded systems, Design of Low-Power Coarse-Grained Reconfigurable Architectures offers new frameworks for optimizing the architecture of components in embedded systems in order to decrease area and save power. Real application benchmarks and gate-level simulations substantiate these frameworks.
The first half of the book explains how to reduce power in the configuration cache. The authors present a low-power reconfiguration technique based on reusable context pipelining that merges the concept of context reuse into context pipelining. They also propose dynamic context compression capable of supporting required bits of the context words set to enable and the redundant bits set to disable. In addition, they discuss dynamic context manageme
Table of Contents
Introduction. Trends in CGRA. CGRA for High Performance and Flexibility. Base CGRA Implementation. Power Consumption in CGRA. Low-Power Reconfiguration Technique. Dynamic Context Compression for Low-Power CGRA. Dynamic Context Management for Low-Power CGRA. Cost-Effective Array Fabric. Hierarchical Reconfigurable Computing Arrays. Integrated Approach to Optimize CGRA. Bibliography. Index.
