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Book Synopsis

Introduction.- SRAM Basic Principles and Simulation Methodologies.- SRAM Bitcell Scaling Roadmap Towards CFETs.- SRAM Subarray- and Macro-level DTCO PPA Analysis.- Beyond Traditional SRAM Bitcell-Level Scaling.- Future Design Direction for SRAM Data Array Towards A14.- Summaries.

CircuitTechnology CoOptimization of SRAM Design in Advanced CMOS Nodes

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    A Hardback by Hsiao-Hsuan Liu

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      View other formats and editions of CircuitTechnology CoOptimization of SRAM Design in Advanced CMOS Nodes by Hsiao-Hsuan Liu

      Publisher: Springer
      Publication Date: 21/12/2024
      ISBN13: 9783031761089, 978-3031761089
      ISBN10:
      Also in:
      Computing Embedded systems

      Description

      Book Synopsis

      Introduction.- SRAM Basic Principles and Simulation Methodologies.- SRAM Bitcell Scaling Roadmap Towards CFETs.- SRAM Subarray- and Macro-level DTCO PPA Analysis.- Beyond Traditional SRAM Bitcell-Level Scaling.- Future Design Direction for SRAM Data Array Towards A14.- Summaries.

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