{"product_id":"rtl-hardware-design-using-vhdl-coding-for-efficiency-portability-and-scalability-wiley-ieee-9780471720928","title":"RTL Hardware Design Using VHDL Coding for","description":"\u003cb\u003eBook Synopsis\u003c\/b\u003e\u003cbr\u003eThe skills and guidance needed to master RTL hardware design\u003cbr\u003e \u003cbr\u003e This book teaches readers how to systematically design efficient, portable, and scalable Register Transfer Level (RTL) digital circuits using the VHDL hardware description language and synthesis software. Focusing on the module-level design, which is composed of functional units, routing circuit, and storage, the book illustrates the relationship between the VHDL constructs and the underlying hardware components, and shows how to develop codes that faithfully reflect the module-level design and can be synthesized into efficient gate-level implementation.\u003cbr\u003e \u003cbr\u003e Several unique features distinguish the book:\u003cbr\u003e * Coding style that shows a clear relationship between VHDL constructs and hardware components\u003cbr\u003e * Conceptual diagrams that illustrate the realization of VHDL codes\u003cbr\u003e * Emphasis on the code reuse\u003cbr\u003e * Practical examples that demonstrate and reinforce design concepts, procedures, and techn\u003cbr\u003e\u003cbr\u003e\u003cb\u003eTable of Contents\u003c\/b\u003e\u003cbr\u003ePreface.  \u003cp\u003eAcknowlegmentss.\u003c\/p\u003e \u003cp\u003e1. Introduction to Digital System Design.\u003c\/p\u003e \u003cp\u003e2. Overview on Hardware Description Language.\u003c\/p\u003e \u003cp\u003e3. Basic Language Constructs of VHDL.\u003c\/p\u003e \u003cp\u003e4. Concurrent Signal Assignment Statements of VHDL.\u003c\/p\u003e \u003cp\u003e5. Sequential Statements of VHDL.\u003c\/p\u003e \u003cp\u003e6. Synthesis of VHDL Code.\u003c\/p\u003e \u003cp\u003e7. Combinational Circuit Design: Practice.\u003c\/p\u003e \u003cp\u003e8. Sequential Circuit Design: Principle.\u003c\/p\u003e \u003cp\u003e9. Sequential Circuit Design: Practice.\u003c\/p\u003e \u003cp\u003e10. Finite State Machine: Princple and Practice.\u003c\/p\u003e \u003cp\u003e11. Register Transfer Methodology: Principle.\u003c\/p\u003e \u003cp\u003e12. Register Transfer Methodology: Practice.\u003c\/p\u003e \u003cp\u003e13. Hierarchical Design in VHDL.\u003c\/p\u003e \u003cp\u003e14. Parameterized Design: Principle.\u003c\/p\u003e \u003cp\u003e15. Parameterized Design: Practice.\u003c\/p\u003e \u003cp\u003e16. Clock and Synchronization: Principle and Practice.\u003c\/p\u003e \u003cp\u003eReferences.\u003c\/p\u003e \u003cp\u003eIndex.\u003c\/p\u003e","brand":"John Wiley \u0026 Sons Inc","offers":[{"title":"Default Title","offer_id":49402661437783,"sku":"9780471720928","price":127.76,"currency_code":"GBP","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0817\/1739\/5799\/files\/9780471720928.jpg?v=1730481152","url":"https:\/\/bookcurl.com\/products\/rtl-hardware-design-using-vhdl-coding-for-efficiency-portability-and-scalability-wiley-ieee-9780471720928","provider":"Book Curl","version":"1.0","type":"link"}