{"product_id":"principles-of-electromagnetic-compatibility-9781119718710","title":"Principles of Electromagnetic Compatibility","description":"\u003cb\u003eBook Synopsis\u003c\/b\u003e\u003cbr\u003e\u003cbr\u003e\u003cbr\u003e\u003cb\u003eTable of Contents\u003c\/b\u003e\u003cbr\u003e\u003cp\u003ePreface xiii\u003c\/p\u003e \u003cp\u003eAbout the Companion Website xv\u003c\/p\u003e \u003cp\u003e\u003cb\u003e1 Frequency Spectra of Digital Signals 1\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e1.1 EMC Units 1\u003c\/p\u003e \u003cp\u003e1.1.1 Logarithm and Decibel Definition 1\u003c\/p\u003e \u003cp\u003e1.1.2 Power and Voltage (Current) Gain in dB 1\u003c\/p\u003e \u003cp\u003e1.1.3 EMC dB Units 3\u003c\/p\u003e \u003cp\u003e1.2 Fourier Series Representation of Periodic Signals 6\u003c\/p\u003e \u003cp\u003e1.3 Spectrum of a Clock Signal 7\u003c\/p\u003e \u003cp\u003e1.4 Effect of the Rise Time, Signal Amplitude, Fundamental Frequency, and Duty Cycle on the Signal Spectrum 15\u003c\/p\u003e \u003cp\u003e1.4.1 Effect of the Rise Time 15\u003c\/p\u003e \u003cp\u003e1.4.2 Effect of the Signal Amplitude 15\u003c\/p\u003e \u003cp\u003e1.4.3 Effect of the Fundamental Frequency 18\u003c\/p\u003e \u003cp\u003e1.4.4 Effect of the Duty Cycle 20\u003c\/p\u003e \u003cp\u003e1.5 Laboratory Exercises 22\u003c\/p\u003e \u003cp\u003e1.5.1 Spectrum of a Digital Clock Signal 22\u003c\/p\u003e \u003cp\u003e1.5.2 Laboratory Equipment and Supplies 22\u003c\/p\u003e \u003cp\u003e1.5.3 Measured Spectrum vs. Calculated Spectrum 23\u003c\/p\u003e \u003cp\u003e1.5.4 Effect of the Rise Time 27\u003c\/p\u003e \u003cp\u003e1.5.5 Effect of the Signal Amplitude 31\u003c\/p\u003e \u003cp\u003e1.5.6 Effect of the Fundamental Frequency 33\u003c\/p\u003e \u003cp\u003e1.5.7 Effect of the Duty Cycle 37\u003c\/p\u003e \u003cp\u003eReferences 43\u003c\/p\u003e \u003cp\u003e\u003cb\u003e2 EM Coupling Mechanisms 45\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e2.1 Wavelength and Electrical Dimensions 45\u003c\/p\u003e \u003cp\u003e2.1.1 Concept of a Wave 45\u003c\/p\u003e \u003cp\u003e2.1.2 Uniform Plane EM Wave in Time Domain 46\u003c\/p\u003e \u003cp\u003e2.1.3 Uniform Plane EM Wave in Frequency Domain 47\u003c\/p\u003e \u003cp\u003e2.2 EMC Interference Problem 50\u003c\/p\u003e \u003cp\u003e2.3 Capacitive Coupling 53\u003c\/p\u003e \u003cp\u003e2.3.1 Shielding to Reduce Capacitive Coupling 56\u003c\/p\u003e \u003cp\u003e2.4 Inductive Coupling 59\u003c\/p\u003e \u003cp\u003e2.4.1 Shielding to Reduce Inductive Coupling 61\u003c\/p\u003e \u003cp\u003e2.5 Crosstalk Between PCB Traces 66\u003c\/p\u003e \u003cp\u003e2.6 Common-Impedance Coupling 70\u003c\/p\u003e \u003cp\u003e2.7 Laboratory Exercises 72\u003c\/p\u003e \u003cp\u003e2.7.1 Crosstalk Between PCB Traces 72\u003c\/p\u003e \u003cp\u003eReferences 76\u003c\/p\u003e \u003cp\u003e\u003cb\u003e3 Non-Ideal Behavior of Passive Components 77\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e3.1 Resonance in RLC Circuits 77\u003c\/p\u003e \u003cp\u003e3.1.1 “Pure” Series Resonance – Non-Ideal Capacitor Model 77\u003c\/p\u003e \u003cp\u003e3.1.2 “Pure” Parallel Resonance – Ferrite Bead Model 81\u003c\/p\u003e \u003cp\u003e3.1.3 “Hybrid” Series Resonance – Non-Ideal Resistor Model 83\u003c\/p\u003e \u003cp\u003e3.1.4 “Hybrid” Parallel Resonance – Non-Ideal Inductor Model 85\u003c\/p\u003e \u003cp\u003e3.2 Non-Ideal Behavior of Resistors 87\u003c\/p\u003e \u003cp\u003e3.2.1 Circuit Model and Impedance 87\u003c\/p\u003e \u003cp\u003e3.2.2 Parasitic Capacitance Estimation – Discrete Components 89\u003c\/p\u003e \u003cp\u003e3.2.3 Parasitic Capacitance Estimation – PCB Components 94\u003c\/p\u003e \u003cp\u003e3.3 Non-Ideal Behavior of Capacitors 97\u003c\/p\u003e \u003cp\u003e3.3.1 Circuit Model and Impedance 97\u003c\/p\u003e \u003cp\u003e3.3.2 Parasitic Inductance Estimation – Discrete Components 99\u003c\/p\u003e \u003cp\u003e3.3.3 Parasitic Inductance Estimation – PCB Components 101\u003c\/p\u003e \u003cp\u003e3.4 Non-Ideal Behavior of Inductors 104\u003c\/p\u003e \u003cp\u003e3.4.1 Circuit Model and Impedance 104\u003c\/p\u003e \u003cp\u003e3.4.2 Parasitic Capacitance Estimation – Discrete Components 106\u003c\/p\u003e \u003cp\u003e3.4.3 Parasitic Capacitance Estimation – PCB Components 108\u003c\/p\u003e \u003cp\u003e3.5 Non-Ideal Behavior of a PCB Trace 111\u003c\/p\u003e \u003cp\u003e3.5.1 Circuit Model and Impedance 111\u003c\/p\u003e \u003cp\u003e3.6 Impact of the PCB Trace Length on Impedance of the Passive Components 114\u003c\/p\u003e \u003cp\u003e3.6.1 Impedance of a Resistor – Impact of the PCB Trace 114\u003c\/p\u003e \u003cp\u003e3.6.2 Impedance of a Capacitor – Impact of the PCB Trace 114\u003c\/p\u003e \u003cp\u003e3.6.3 Impedance of an Inductor – Impact of the PCB Trace 114\u003c\/p\u003e \u003cp\u003e3.6.4 Impedance of an Inductor vs. Impedance of the PCB Trace 118\u003c\/p\u003e \u003cp\u003e3.7 Laboratory Exercises 118\u003c\/p\u003e \u003cp\u003e3.7.1 Non-Ideal Behavior of Capacitors and Inductors, and Impact of the PCB Trace Length on Impedance 118\u003c\/p\u003e \u003cp\u003e3.7.2 Laboratory Equipment and Supplies 119\u003c\/p\u003e \u003cp\u003e3.7.3 Laboratory Procedure – Non-Ideal Behavior of Capacitors and Inductors 121\u003c\/p\u003e \u003cp\u003e3.7.4 Laboratory Procedure – Impact of the PCB Trace Length on Impedance 122\u003c\/p\u003e \u003cp\u003eReferences 122\u003c\/p\u003e \u003cp\u003e\u003cb\u003e4 Power Distribution Network 125\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e4.1 CMOS Inverter Switching 125\u003c\/p\u003e \u003cp\u003e4.2 Decoupling Capacitors 125\u003c\/p\u003e \u003cp\u003e4.2.1 Decoupling Capacitor Impact – Measurements 130\u003c\/p\u003e \u003cp\u003e4.2.2 Decoupling Capacitor Configurations 137\u003c\/p\u003e \u003cp\u003e4.3 Decoupling Capacitors and Embedded Capacitance 147\u003c\/p\u003e \u003cp\u003e4.3.1 Decoupling Capacitors and Closely vs. Not Closely Spaced Power and Ground Planes 147\u003c\/p\u003e \u003cp\u003e4.3.2 Impact of the Number and Values of the Decoupling Capacitors 156\u003c\/p\u003e \u003cp\u003e4.4 Laboratory Exercises 168\u003c\/p\u003e \u003cp\u003e4.4.1 Decoupling Capacitors 168\u003c\/p\u003e \u003cp\u003e4.4.2 Embedded Capacitance and Decoupling Capacitors 172\u003c\/p\u003e \u003cp\u003eReferences 176\u003c\/p\u003e \u003cp\u003e\u003cb\u003e5 EMC Filters 177\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e5.1 Insertion Loss Definition 177\u003c\/p\u003e \u003cp\u003e5.2 Basic Filter Configurations 177\u003c\/p\u003e \u003cp\u003e5.3 Source and Load Impedance Impact 177\u003c\/p\u003e \u003cp\u003e5.4 What Do We Mean by Low or High Impedance? 179\u003c\/p\u003e \u003cp\u003e5.5 LC and CL Filters 181\u003c\/p\u003e \u003cp\u003e5.5.1 LC Filter 181\u003c\/p\u003e \u003cp\u003e5.5.2 CL Filter 186\u003c\/p\u003e \u003cp\u003e5.5.3 LC Filter vs. CL Filter 189\u003c\/p\u003e \u003cp\u003e5.6 Pi and T Filters 195\u003c\/p\u003e \u003cp\u003e5.6.1 Pi Filter 195\u003c\/p\u003e \u003cp\u003e5.6.2 T Filter 196\u003c\/p\u003e \u003cp\u003e5.6.3 Pi Filter vs. T Filter 197\u003c\/p\u003e \u003cp\u003e5.7 LCLC and CLCL Filters 202\u003c\/p\u003e \u003cp\u003e5.7.1 LCLC Filter 202\u003c\/p\u003e \u003cp\u003e5.7.2 CLCL Filter 205\u003c\/p\u003e \u003cp\u003e5.7.3 LCLC Filter vs. CLCL Filter 206\u003c\/p\u003e \u003cp\u003e5.8 Laboratory Exercises 212\u003c\/p\u003e \u003cp\u003e5.8.1 Input Impedance and Insertion Loss of EMC Filters 212\u003c\/p\u003e \u003cp\u003e5.8.2 Laboratory Equipment and Supplies 212\u003c\/p\u003e \u003cp\u003e5.8.3 Laboratory Procedure 214\u003c\/p\u003e \u003cp\u003eReferences 217\u003c\/p\u003e \u003cp\u003e\u003cb\u003e6 Transmission Lines – Time Domain 219\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e6.1 Introduction 219\u003c\/p\u003e \u003cp\u003e6.1.1 Transmission Line Effects 219\u003c\/p\u003e \u003cp\u003e6.1.2 When a Line Is not a Transmission Line 219\u003c\/p\u003e \u003cp\u003e6.1.3 Transmission Line Equations 226\u003c\/p\u003e \u003cp\u003e6.2 Transient Analysis 229\u003c\/p\u003e \u003cp\u003e6.2.1 Reflections at a Resistive Load 229\u003c\/p\u003e \u003cp\u003e6.2.2 Reflections at a Resistive Discontinuity 236\u003c\/p\u003e \u003cp\u003e6.2.3 Reflections at a Shunt Resistive Discontinuity 239\u003c\/p\u003e \u003cp\u003e6.2.4 Reflections with Transmission Lines in Parallel 241\u003c\/p\u003e \u003cp\u003e6.2.5 Reflections at a Reactive Load 245\u003c\/p\u003e \u003cp\u003e6.2.6 Reflections at a Shunt Reactive Discontinuity 258\u003c\/p\u003e \u003cp\u003e6.3 Eye Diagram 266\u003c\/p\u003e \u003cp\u003e6.3.1 Fundamental Concepts 266\u003c\/p\u003e \u003cp\u003e6.3.2 Impact of Driver, HDMI Cable, and Receiver 271\u003c\/p\u003e \u003cp\u003e6.4 Laboratory Exercises 275\u003c\/p\u003e \u003cp\u003e6.4.1 Transmission Line Reflections 275\u003c\/p\u003e \u003cp\u003e6.4.2 Laboratory Equipment and Supplies 275\u003c\/p\u003e \u003cp\u003e6.4.3 Reflections at a Resistive Load 278\u003c\/p\u003e \u003cp\u003e6.4.4 Bounce Diagram 281\u003c\/p\u003e \u003cp\u003e6.4.5 Reflections at a Resistive Discontinuity 282\u003c\/p\u003e \u003cp\u003eReferences 285\u003c\/p\u003e \u003cp\u003e\u003cb\u003e7 Transmission Lines – Frequency Domain 287\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e7.1 Frequency-Domain Solution 287\u003c\/p\u003e \u003cp\u003e7.1.1 The Complete Circuit Model – Voltage, Current, and Input Impedance along the Transmission Line 290\u003c\/p\u003e \u003cp\u003e7.1.2 Frequency-Domain Solution – Example 307\u003c\/p\u003e \u003cp\u003e7.2 Smith Chart and Input Impedance to the Transmission Line 316\u003c\/p\u003e \u003cp\u003e7.2.1 Smith Chart Fundamentals 316\u003c\/p\u003e \u003cp\u003e7.2.2 Input Impedance to the Transmission Line 326\u003c\/p\u003e \u003cp\u003e7.3 Standing Waves and VSWR 332\u003c\/p\u003e \u003cp\u003e7.4 Laboratory Exercises 336\u003c\/p\u003e \u003cp\u003e7.4.1 Input Impedance to Transmission Line – Smith Chart 336\u003c\/p\u003e \u003cp\u003e7.4.2 Laboratory Procedure – Smith Chart 336\u003c\/p\u003e \u003cp\u003eReferences 337\u003c\/p\u003e \u003cp\u003e\u003cb\u003e8 Antennas and Radiation 339\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e8.1 Bridge Between the Transmission Line Theory and Antennas 339\u003c\/p\u003e \u003cp\u003e8.2 Electric (Hertzian) Dipole Antenna 340\u003c\/p\u003e \u003cp\u003e8.2.1 Wave Impedance and Far-Field Criterion 343\u003c\/p\u003e \u003cp\u003e8.2.2 Wave Impedance in the Near Field 344\u003c\/p\u003e \u003cp\u003e8.3 Magnetic Dipole Antenna 345\u003c\/p\u003e \u003cp\u003e8.3.1 Wave Impedance and Far-Field Criterion 346\u003c\/p\u003e \u003cp\u003e8.3.2 Wave Impedance in the Near Field 347\u003c\/p\u003e \u003cp\u003e8.4 Half-Wave Dipole and Quarter-Wave Monopole Antennas 348\u003c\/p\u003e \u003cp\u003e8.4.1 Half-Wave Dipole Antenna 348\u003c\/p\u003e \u003cp\u003e8.4.2 Quarter-Wave Monopole Antenna 351\u003c\/p\u003e \u003cp\u003e8.5 Balanced–Unbalanced Antenna Structures and Baluns 351\u003c\/p\u003e \u003cp\u003e8.5.1 Balanced and Unbalanced Half-Wave Dipole Antenna 352\u003c\/p\u003e \u003cp\u003e8.5.2 Sleeve (Bazooka) Balun 355\u003c\/p\u003e \u003cp\u003e8.5.3 Input Impedance to the Transmission Line 357\u003c\/p\u003e \u003cp\u003e8.5.4 Quarter-Wavelength Sleeve Balun 358\u003c\/p\u003e \u003cp\u003e8.6 Sleeve Dipole Antenna Design and Build 360\u003c\/p\u003e \u003cp\u003e8.6.1 Symmetrically Driven Half-Wave Dipole Antenna 360\u003c\/p\u003e \u003cp\u003e8.6.2 Asymmetrically Driven Dipole Antenna and a Sleeve Dipole 361\u003c\/p\u003e \u003cp\u003e8.6.3 Sleeve Dipole Antenna Design 362\u003c\/p\u003e \u003cp\u003e8.6.4 Sleeve Dipole Antenna Design Through Simulation 362\u003c\/p\u003e \u003cp\u003e8.6.5 Construction and Tuning of a Sleeve Dipole 364\u003c\/p\u003e \u003cp\u003e8.7 Antennas Arrays 368\u003c\/p\u003e \u003cp\u003e8.8 Log-Periodic Antenna 368\u003c\/p\u003e \u003cp\u003e8.9 Biconical Antenna 372\u003c\/p\u003e \u003cp\u003e8.10 Antenna Impedance and VSWR 373\u003c\/p\u003e \u003cp\u003e8.11 Laboratory Exercises 375\u003c\/p\u003e \u003cp\u003e8.11.1 Log-Periodic and Bicon Antenna Impedance and VSWR Measurements 376\u003c\/p\u003e \u003cp\u003e8.11.2 Loop Antenna Construction 377\u003c\/p\u003e \u003cp\u003eReferences 381\u003c\/p\u003e \u003cp\u003e\u003cb\u003e9 Differential- and Common-Mode Currents and Radiation 383\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e9.1 Differential- and Common-Mode Currents 383\u003c\/p\u003e \u003cp\u003e9.1.1 Common-Mode Current Creation 385\u003c\/p\u003e \u003cp\u003e9.2 Common-Mode Choke 387\u003c\/p\u003e \u003cp\u003e9.3 Differential-Mode and Common-Mode Radiation 391\u003c\/p\u003e \u003cp\u003e9.3.1 Differential-Mode Radiation 395\u003c\/p\u003e \u003cp\u003e9.3.2 Common-Mode Radiation 397\u003c\/p\u003e \u003cp\u003e9.4 Laboratory Exercises 399\u003c\/p\u003e \u003cp\u003e9.4.1 Differential-Mode and Common-Mode Current Measurement 399\u003c\/p\u003e \u003cp\u003e9.4.2 Laboratory Equipment and Supplies 399\u003c\/p\u003e \u003cp\u003e9.4.3 Laboratory Procedure – Differential-Mode and Common-Mode Current Measurements 399\u003c\/p\u003e \u003cp\u003eReferences 406\u003c\/p\u003e \u003cp\u003e\u003cb\u003e10 Return-Current Path, Flow, and Distribution 407\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e10.1 Return-Current Path 407\u003c\/p\u003e \u003cp\u003e10.2 Return-Current Flow 412\u003c\/p\u003e \u003cp\u003e10.3 Return-Current Distribution 415\u003c\/p\u003e \u003cp\u003e10.3.1 Microstrip Line PCB 415\u003c\/p\u003e \u003cp\u003e10.3.2 Stripline PCB 422\u003c\/p\u003e \u003cp\u003e10.4 Laboratory Exercises 430\u003c\/p\u003e \u003cp\u003e10.4.1 Path of the Return Current 430\u003c\/p\u003e \u003cp\u003eReferences 438\u003c\/p\u003e \u003cp\u003e\u003cb\u003e11 Shielding to Prevent Radiation 439\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e11.1 Uniform Plane Wave 439\u003c\/p\u003e \u003cp\u003e11.1.1 Skin Depth 442\u003c\/p\u003e \u003cp\u003e11.1.2 Current Density in Conductors 443\u003c\/p\u003e \u003cp\u003e11.1.3 Reflection and Transmission at a Normal Boundary 444\u003c\/p\u003e \u003cp\u003e11.2 Far-Field Shielding 447\u003c\/p\u003e \u003cp\u003e11.2.1 Shielding Effectiveness – Exact Solution 450\u003c\/p\u003e \u003cp\u003e11.2.2 Shielding Effectiveness – Approximate Solution – Version 1 454\u003c\/p\u003e \u003cp\u003e11.2.3 Shielding Effectiveness – Approximate Solution – Version 2 456\u003c\/p\u003e \u003cp\u003e11.2.4 Shielding Effectiveness – Simulations 458\u003c\/p\u003e \u003cp\u003e11.3 Near-Field Shielding 463\u003c\/p\u003e \u003cp\u003e11.3.1 Electric Field Sources 463\u003c\/p\u003e \u003cp\u003e11.3.2 Magnetic Field Sources 465\u003c\/p\u003e \u003cp\u003e11.3.3 Shielding Effectiveness – Simulations 466\u003c\/p\u003e \u003cp\u003e11.3.4 Shielding Effectiveness – Measurements 470\u003c\/p\u003e \u003cp\u003e11.4 Laboratory Exercises 477\u003c\/p\u003e \u003cp\u003e11.4.1 Shielding Effectiveness – Simulations 477\u003c\/p\u003e \u003cp\u003e11.4.2 Shielding Effectiveness – Measurements 477\u003c\/p\u003e \u003cp\u003eReferences 481\u003c\/p\u003e \u003cp\u003e\u003cb\u003e12 SMPS Design for EMC 483\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e12.1 Basics of SMPS Operation 483\u003c\/p\u003e \u003cp\u003e12.1.1 Basic SMPS Topology 483\u003c\/p\u003e \u003cp\u003e12.1.2 Basic SMPS Design 486\u003c\/p\u003e \u003cp\u003e12.2 DC\/DC Converter Design with EMC Considerations 491\u003c\/p\u003e \u003cp\u003e12.2.1 Switching Frequency 491\u003c\/p\u003e \u003cp\u003e12.2.2 Output Inductor 493\u003c\/p\u003e \u003cp\u003e12.2.3 Output Capacitor 494\u003c\/p\u003e \u003cp\u003e12.2.4 Catch Diode 495\u003c\/p\u003e \u003cp\u003e12.2.5 Input Capacitor 495\u003c\/p\u003e \u003cp\u003e12.2.6 Bootstrap Capacitor 496\u003c\/p\u003e \u003cp\u003e12.2.7 Undervoltage Lockout 496\u003c\/p\u003e \u003cp\u003e12.2.8 Feedback Pin 496\u003c\/p\u003e \u003cp\u003e12.2.9 Compensation Network 497\u003c\/p\u003e \u003cp\u003e12.2.10 Complete Regulator Circuitry 498\u003c\/p\u003e \u003cp\u003e12.2.11 EMC Considerations 498\u003c\/p\u003e \u003cp\u003e12.3 Laboratory Exercises 500\u003c\/p\u003e \u003cp\u003e12.3.1 SMPS Design and Build 500\u003c\/p\u003e \u003cp\u003e12.3.2 Laboratory Equipment and Supplies 500\u003c\/p\u003e \u003cp\u003e12.3.3 Laboratory Procedure 501\u003c\/p\u003e \u003cp\u003eReferences 502\u003c\/p\u003e \u003cp\u003e\u003cb\u003eA Evaluation of EMC Emissions and Ground Techniques on 1- and  2-Layer PCBs with Power Converters 503\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003eA. 1 Top-Level Description of the Design Problem 503\u003c\/p\u003e \u003cp\u003eA.. 1 Functional Block Details 503\u003c\/p\u003e \u003cp\u003eA.1. 2 One-Layer Board Topologies 506\u003c\/p\u003e \u003cp\u003eA.1. 3 Two-Layer Board Topologies 507\u003c\/p\u003e \u003cp\u003eA. 2 DC\/DC Converter – Baseline EMC Emissions Evaluation 509\u003c\/p\u003e \u003cp\u003eA.2. 1 CISPR 25 Radiated Emissions Test Results 510\u003c\/p\u003e \u003cp\u003eA.. 2 CISPR 25 Conducted Emissions (Voltage Method) Test Results 512\u003c\/p\u003e \u003cp\u003eA.2. 3 CISPR 25 Conducted Emissions (Current Method) Test Results 515\u003c\/p\u003e \u003cp\u003eA. 3 DC\/DC Converter – EMC Countermeasures – Radiated Emissions Results 515\u003c\/p\u003e \u003cp\u003eA.3. 1 EMC-A and EMC-E Input and Output Capacitor Impact 515\u003c\/p\u003e \u003cp\u003eA.3. 2 EMC-A Input Inductor Impact 518\u003c\/p\u003e \u003cp\u003eA.. 3 EMC-C Switching Inductor Impact 519\u003c\/p\u003e \u003cp\u003eA.3. 4 EMC-B and EMC-D Snubber Impact 521\u003c\/p\u003e \u003cp\u003eA.3. 5 EMC-A, EMC-E – Conducted Emissions Countermeasures Impact 523\u003c\/p\u003e \u003cp\u003eA.3. 6 Impact of the Shield Frame 524\u003c\/p\u003e \u003cp\u003eA. 4 DC\/DC Converter – EMC Countermeasures – Conducted Emissions Results – Voltage Method 528\u003c\/p\u003e \u003cp\u003eA.4. 1 EMC-A and EMC-E Input and Output Capacitor Impact 528\u003c\/p\u003e \u003cp\u003eA.4. 2 EMC-A Input Inductor Impact 529\u003c\/p\u003e \u003cp\u003eA.4. 3 EMC-A Additional Input Capacitors Impact 530\u003c\/p\u003e \u003cp\u003eA.. 4 EMC-A Input Inductor Impact 531\u003c\/p\u003e \u003cp\u003eA.4. 5 EMC-C Switching Inductor Impact 532\u003c\/p\u003e \u003cp\u003eA.4. 6 EMC-B and EMC-D Snubber Impact 533\u003c\/p\u003e \u003cp\u003eA. 5 DC\/DC Converter – EMC Countermeasures – Conducted Emissions Results – Current Method 535\u003c\/p\u003e \u003cp\u003eA.5. 1 EMC-A, EMC-C, and EMC-E Input and Output Capacitor and Inductor Impact 535\u003c\/p\u003e \u003cp\u003eA.5. 2 EMC-B and EMC-D Snubber Impact 536\u003c\/p\u003e \u003cp\u003eA. 6 PCB Layout Considerations 537\u003c\/p\u003e \u003cp\u003eA.6. 1 Introduction 537\u003c\/p\u003e \u003cp\u003eA.6. 2 Visualizing Complete Forward and Return Paths 538\u003c\/p\u003e \u003cp\u003eA.6. 3 Return-Plane Split in AC–DC Converter 543\u003c\/p\u003e \u003cp\u003eA. 7 AC\/DC Converter Design with EMC Considerations 544\u003c\/p\u003e \u003cp\u003eA.7. 1 AC\/DC Converter Schematics and Design Requirements 544\u003c\/p\u003e \u003cp\u003eA.7. 2 EMC Considerations 546\u003c\/p\u003e \u003cp\u003eA. 8 AC\/DC Converter – Baseline EMC Emissions Evaluation 548\u003c\/p\u003e \u003cp\u003eA.8. 1 Radiated Emissions Test Results 548\u003c\/p\u003e \u003cp\u003eA.8. 2 Conducted Emissions Test Results 551\u003c\/p\u003e \u003cp\u003eA. 9 AC\/DC Converter – EMC Countermeasures – Conducted and Radiated Emissions Results 552\u003c\/p\u003e \u003cp\u003eA.9. 1 Conducted Emissions Test Results 553\u003c\/p\u003e \u003cp\u003eA.9. 2 Radiated Emissions Test Results 555\u003c\/p\u003e \u003cp\u003eA. 10 Complete System – Conducted and Radiated Emissions Results 557\u003c\/p\u003e \u003cp\u003eA.0. 1 Complete System and Board Topologies 557\u003c\/p\u003e \u003cp\u003eA.10. 2 Conducted Emissions Results 558\u003c\/p\u003e \u003cp\u003eA.10. 3 Radiated Emissions Results 562\u003c\/p\u003e \u003cp\u003eA.10. 4 Conclusions 564\u003c\/p\u003e \u003cp\u003eReferences 565\u003c\/p\u003e \u003cp\u003eIndex 567\u003c\/p\u003e","brand":"John Wiley \u0026 Sons Inc","offers":[{"title":"Default Title","offer_id":48866413019479,"sku":"9781119718710","price":99.0,"currency_code":"GBP","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0817\/1739\/5799\/files\/9781119718710.jpg?v=1722278521","url":"https:\/\/bookcurl.com\/products\/principles-of-electromagnetic-compatibility-9781119718710","provider":"Book Curl","version":"1.0","type":"link"}