{"product_id":"embedded-systems-9781118352151","title":"Embedded Systems","description":"\u003cb\u003eBook Synopsis\u003c\/b\u003e\u003cbr\u003ePresented in three parts, this book provides readers with an immersive introduction to this rapidly growing segment of the computer industry.\u003cbr\u003e\u003cbr\u003e\u003cb\u003eTable of Contents\u003c\/b\u003e\u003cbr\u003e\u003cp\u003ePreface xv\u003c\/p\u003e \u003cp\u003eContributors xvii\u003c\/p\u003e \u003cp\u003e\u003cb\u003e1 Low Power Multicore Processors for Embedded Systems 1\u003c\/b\u003e\u003cbr\u003e \u003ci\u003eFumio Arakawa\u003c\/i\u003e\u003c\/p\u003e \u003cp\u003e1.1 Multicore Chip with Highly Efficient Cores 1\u003c\/p\u003e \u003cp\u003e1.2 SuperH RISC Engine Family (SH) Processor Cores 5\u003c\/p\u003e \u003cp\u003e1.3 SH-X: A Highly Efficient CPU Core 9\u003c\/p\u003e \u003cp\u003e1.4 SH-X FPU: A Highly Efficient FPU 20\u003c\/p\u003e \u003cp\u003e1.5 SH-X2: Frequency and Efficiency Enhanced Core 33\u003c\/p\u003e \u003cp\u003e1.6 SH-X3: Multicore Architecture Extension 34\u003c\/p\u003e \u003cp\u003e1.7 SH-X4: ISA and Address Space Extension 47\u003c\/p\u003e \u003cp\u003e\u003cb\u003e2 Special-Purpose Hardware for Computational Biology 61\u003c\/b\u003e\u003cbr\u003e \u003ci\u003eSiddharth Srinivasan\u003c\/i\u003e\u003c\/p\u003e \u003cp\u003e2.1 Molecular Dynamics Simulations on Graphics Processing Units 62\u003c\/p\u003e \u003cp\u003e2.2 Special-Purpose Hardware and Network Topologies for MD Simulations 72\u003c\/p\u003e \u003cp\u003e2.3 Quantum MC Applications on Field-Programmable Gate Arrays 77\u003c\/p\u003e \u003cp\u003e2.4 Conclusions and Future Directions 82\u003c\/p\u003e \u003cp\u003e\u003cb\u003e3 Embedded GPU Design 85\u003c\/b\u003e\u003cbr\u003e \u003ci\u003eByeong-Gyu Nam and Hoi-Jun Yoo\u003c\/i\u003e\u003c\/p\u003e \u003cp\u003e3.1 Introduction 85\u003c\/p\u003e \u003cp\u003e3.2 System Architecture 86\u003c\/p\u003e \u003cp\u003e3.3 Graphics Modules Design 88\u003c\/p\u003e \u003cp\u003e3.4 System Power Management 95\u003c\/p\u003e \u003cp\u003e3.5 Implementation Results 99\u003c\/p\u003e \u003cp\u003e3.6 Conclusion 102\u003c\/p\u003e \u003cp\u003e\u003cb\u003e4 Low-Cost VLSI Architecture for Random Block-Based Access of Pixels in Modern Image Sensors 107\u003c\/b\u003e\u003cbr\u003e \u003ci\u003eTareq Hasan Khan and Khan Wahid\u003c\/i\u003e\u003c\/p\u003e \u003cp\u003e4.1 Introduction 107\u003c\/p\u003e \u003cp\u003e4.2 The DVP Interface 108\u003c\/p\u003e \u003cp\u003e4.3 The iBRIDGE-BB Architecture 109\u003c\/p\u003e \u003cp\u003e4.4 Hardware Implementation 116\u003c\/p\u003e \u003cp\u003e4.5 Conclusion 123\u003c\/p\u003e \u003cp\u003e\u003cb\u003e5 Embedded Computing Systems on FPGAs 127\u003c\/b\u003e\u003cbr\u003e \u003ci\u003eLesley Shannon\u003c\/i\u003e\u003c\/p\u003e \u003cp\u003e5.1 FPGA Architecture 128\u003c\/p\u003e \u003cp\u003e5.2 FPGA Confi guration Technology 129\u003c\/p\u003e \u003cp\u003e5.3 Software Support 133\u003c\/p\u003e \u003cp\u003e5.4 Final Summary of Challenges and Opportunities for Embedded Computing Design on FPGAs 135\u003c\/p\u003e \u003cp\u003e\u003cb\u003e6 FPGA-Based Emulation Support for Design Space Exploration 139\u003c\/b\u003e\u003cbr\u003e \u003ci\u003ePaolo Meloni, Simone Secchi, and Luigi Raffo\u003c\/i\u003e\u003c\/p\u003e \u003cp\u003e6.1 Introduction 139\u003c\/p\u003e \u003cp\u003e6.2 State of the Art 140\u003c\/p\u003e \u003cp\u003e6.3 A Tool for Energy-Aware FPGA-Based Emulation: The MADNESS Project Experience 144\u003c\/p\u003e \u003cp\u003e6.4 Enabling FPGA-Based DSE: Runtime-Reconfi gurable Emulators 147\u003c\/p\u003e \u003cp\u003e6.5 Use Cases 161\u003c\/p\u003e \u003cp\u003e\u003cb\u003e7 FPGA Coprocessing Solution for Real-Time Protein Identifi cation Using Tandem Mass Spectrometry 169\u003c\/b\u003e\u003cbr\u003e \u003ci\u003eDaniel Coca, István Bogdán, and Robert J. Beynon\u003c\/i\u003e\u003c\/p\u003e \u003cp\u003e7.1 Introduction 169\u003c\/p\u003e \u003cp\u003e7.2 Protein Identifi cation by Sequence Database Searching Using MS\/MS Data 171\u003c\/p\u003e \u003cp\u003e7.3 Reconfi gurable Computing Platform 174\u003c\/p\u003e \u003cp\u003e7.4 FPGA Implementation of the MS\/MS Search Engine 176\u003c\/p\u003e \u003cp\u003e7.5 Summary 180\u003c\/p\u003e \u003cp\u003e\u003cb\u003e8 Real-Time Confi gurable Phase-Coherent Pipelines 185\u003c\/b\u003e\u003cbr\u003e \u003ci\u003eRobert L. Shuler, Jr., and David K. Rutishauser\u003c\/i\u003e\u003c\/p\u003e \u003cp\u003e8.1 Introduction and Purpose 185\u003c\/p\u003e \u003cp\u003e8.2 History and Related Methods 188\u003c\/p\u003e \u003cp\u003e8.3 Implementation Framework 191\u003c\/p\u003e \u003cp\u003e8.4 Prototype Implementation 204\u003c\/p\u003e \u003cp\u003e8.5 Assessment Compared with Related Methods 207\u003c\/p\u003e \u003cp\u003e\u003cb\u003e9 Low Overhead Radiation Hardening Techniques for Embedded Architectures 211\u003c\/b\u003e\u003cbr\u003e \u003ci\u003eSohan Purohit, Sai Rahul Chalamalasetti, and Martin Margala\u003c\/i\u003e\u003c\/p\u003e \u003cp\u003e9.1 Introduction 211\u003c\/p\u003e \u003cp\u003e9.2 Recently Proposed SEU Tolerance Techniques 213\u003c\/p\u003e \u003cp\u003e9.3 Radiation-Hardened Reconfi gurable Array with Instruction Rollback 223\u003c\/p\u003e \u003cp\u003e9.4 Conclusion 234\u003c\/p\u003e \u003cp\u003e\u003cb\u003e10 Hybrid Partially Adaptive Fault-Tolerant Routing for 3D Networks-on-Chip 239\u003c\/b\u003e\u003cbr\u003e \u003ci\u003eSudeep Pasricha and Yong Zou\u003c\/i\u003e\u003c\/p\u003e \u003cp\u003e10.1 Introduction 239\u003c\/p\u003e \u003cp\u003e10.2 Related Work 240\u003c\/p\u003e \u003cp\u003e10.3 Proposed 4NP-First Routing Scheme 242\u003c\/p\u003e \u003cp\u003e10.4 Experiments 250\u003c\/p\u003e \u003cp\u003e10.5 Conclusion 255\u003c\/p\u003e \u003cp\u003e\u003cb\u003e11 Interoperability in Electronic Systems 259\u003c\/b\u003e\u003cbr\u003e \u003ci\u003eAndrew Leone\u003c\/i\u003e\u003c\/p\u003e \u003cp\u003e11.1 Interoperability 259\u003c\/p\u003e \u003cp\u003e11.2 The Basis for Interoperability: The OSI Model 261\u003c\/p\u003e \u003cp\u003e11.3 Hardware 263\u003c\/p\u003e \u003cp\u003e11.4 Firmware 266\u003c\/p\u003e \u003cp\u003e11.5 Partitioning the System 268\u003c\/p\u003e \u003cp\u003e11.6 Examples of Interoperable Systems 270\u003c\/p\u003e \u003cp\u003e\u003cb\u003e12 Software Modeling Approaches for Presilicon System Performance Analysis 273\u003c\/b\u003e\u003cbr\u003e \u003ci\u003eKenneth J. Schultz and Frederic Risacher\u003c\/i\u003e\u003c\/p\u003e \u003cp\u003e12.1 Introduction 273\u003c\/p\u003e \u003cp\u003e12.2 Methodologies 275\u003c\/p\u003e \u003cp\u003e12.3 Results 283\u003c\/p\u003e \u003cp\u003e12.4 Conclusion 288\u003c\/p\u003e \u003cp\u003e\u003cb\u003e13 Advanced Encryption Standard (AES) Implementation in Embedded Systems 291\u003c\/b\u003e\u003cbr\u003e \u003ci\u003eIssam Hammad, Kamal El-Sankary, and Ezz El-Masry\u003c\/i\u003e\u003c\/p\u003e \u003cp\u003e13.1 Introduction 291\u003c\/p\u003e \u003cp\u003e13.2 Finite Field 292\u003c\/p\u003e \u003cp\u003e13.3 The AES 293\u003c\/p\u003e \u003cp\u003e13.4 Hardware Implementations for AES 300\u003c\/p\u003e \u003cp\u003e13.5 High-Speed AES Encryptor with Efficient Merging Techniques 306\u003c\/p\u003e \u003cp\u003e13.6 Conclusion 315\u003c\/p\u003e \u003cp\u003e\u003cb\u003e14 Reconfi gurable Architecture for Cryptography over Binary Finite Fields 319\u003c\/b\u003e\u003cbr\u003e \u003ci\u003eSamuel Antão, Ricardo Chaves, and Leonel Sousa\u003c\/i\u003e\u003c\/p\u003e \u003cp\u003e14.1 Introduction 319\u003c\/p\u003e \u003cp\u003e14.2 Background 320\u003c\/p\u003e \u003cp\u003e14.3 Reconfigurable Processor 333\u003c\/p\u003e \u003cp\u003e14.4 Results 350\u003c\/p\u003e \u003cp\u003e14.5 Conclusions 358\u003c\/p\u003e \u003cp\u003eReferences 359\u003c\/p\u003e \u003cp\u003eIndex 363\u003c\/p\u003e","brand":"John Wiley \u0026 Sons Inc","offers":[{"title":"Default Title","offer_id":49406855905623,"sku":"9781118352151","price":121.46,"currency_code":"GBP","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0817\/1739\/5799\/files\/9781118352151.jpg?v=1730497356","url":"https:\/\/bookcurl.com\/products\/embedded-systems-9781118352151","provider":"Book Curl","version":"1.0","type":"link"}