{"product_id":"advanced-computer-architecture-and-parallel-processing-9780471467403","title":"Advanced Computer Architecture and Parallel Processing","description":"\u003cb\u003eBook Synopsis\u003c\/b\u003e\u003cbr\u003eComputer architecture deals with the physical configuration, logical structure, formats, protocols, and operational sequences for processing data, controlling the configuration, and controlling the operations over a computer.\u003cbr\u003e\u003cbr\u003e\u003cb\u003eTrade Review\u003c\/b\u003e\u003cbr\u003e\"This outstanding treatise...allows students and professionals to become familiar with the inner workings of an inherently complex architecture.\" (\u003ci\u003eCHOICE\u003c\/i\u003e, July 2005)\u003cbr\u003e\u003cbr\u003e\u003cb\u003eTable of Contents\u003c\/b\u003e\u003cbr\u003e\u003cp\u003e\u003cb\u003e1. Introduction to Advanced Computer Architecture and Parallel Processing 1\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e1.1 Four Decades of Computing 2\u003c\/p\u003e \u003cp\u003e1.2 Flynn’s Taxonomy of Computer Architecture 4\u003c\/p\u003e \u003cp\u003e1.3 SIMD Architecture 5\u003c\/p\u003e \u003cp\u003e1.4 MIMD Architecture 6\u003c\/p\u003e \u003cp\u003e1.5 Interconnection Networks 11\u003c\/p\u003e \u003cp\u003e1.6 Chapter Summary 15\u003c\/p\u003e \u003cp\u003eProblems 16\u003c\/p\u003e \u003cp\u003eReferences 17\u003c\/p\u003e \u003cp\u003e\u003cb\u003e2. Multiprocessors Interconnection Networks 19\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e2.1 Interconnection Networks Taxonomy 19\u003c\/p\u003e \u003cp\u003e2.2 Bus-Based Dynamic Interconnection Networks 20\u003c\/p\u003e \u003cp\u003e2.3 Switch-Based Interconnection Networks 24\u003c\/p\u003e \u003cp\u003e2.4 Static Interconnection Networks 33\u003c\/p\u003e \u003cp\u003e2.5 Analysis and Performance Metrics 41\u003c\/p\u003e \u003cp\u003e2.6 Chapter Summary 45\u003c\/p\u003e \u003cp\u003eProblems 46\u003c\/p\u003e \u003cp\u003eReferences 48\u003c\/p\u003e \u003cp\u003e\u003cb\u003e3. Performance Analysis of Multiprocessor Architecture 51\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e3.1 Computational Models 51\u003c\/p\u003e \u003cp\u003e3.2 An Argument for Parallel Architectures 55\u003c\/p\u003e \u003cp\u003e3.3 Interconnection Networks Performance Issues 58\u003c\/p\u003e \u003cp\u003e3.4 Scalability of Parallel Architectures 63\u003c\/p\u003e \u003cp\u003e3.5 Benchmark Performance 67\u003c\/p\u003e \u003cp\u003e3.6 Chapter Summary 72\u003c\/p\u003e \u003cp\u003eProblems 73\u003c\/p\u003e \u003cp\u003eReferences 74\u003c\/p\u003e \u003cp\u003e\u003cb\u003e4. Shared Memory Architecture 77\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e4.1 Classification of Shared Memory Systems 78\u003c\/p\u003e \u003cp\u003e4.2 Bus-Based Symmetric Multiprocessors 80\u003c\/p\u003e \u003cp\u003e4.3 Basic Cache Coherency Methods 81\u003c\/p\u003e \u003cp\u003e4.4 Snooping Protocols 83\u003c\/p\u003e \u003cp\u003e4.5 Directory Based Protocols 89\u003c\/p\u003e \u003cp\u003e4.6 Shared Memory Programming 96\u003c\/p\u003e \u003cp\u003e4.7 Chapter Summary 99\u003c\/p\u003e \u003cp\u003eProblems 100\u003c\/p\u003e \u003cp\u003eReferences 101\u003c\/p\u003e \u003cp\u003e\u003cb\u003e5. Message Passing Architecture 103\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e5.1 Introduction to Message Passing 103\u003c\/p\u003e \u003cp\u003e5.2 Routing in Message Passing Networks 105\u003c\/p\u003e \u003cp\u003e5.3 Switching Mechanisms in Message Passing 109\u003c\/p\u003e \u003cp\u003e5.4 Message Passing Programming Models 114\u003c\/p\u003e \u003cp\u003e5.5 Processor Support for Message Passing 117\u003c\/p\u003e \u003cp\u003e5.6 Example Message Passing Architectures 118\u003c\/p\u003e \u003cp\u003e5.7 Message Passing Versus Shared Memory Architectures 122\u003c\/p\u003e \u003cp\u003e5.8 Chapter Summary 123\u003c\/p\u003e \u003cp\u003eProblems 123\u003c\/p\u003e \u003cp\u003eReferences 124\u003c\/p\u003e \u003cp\u003e\u003cb\u003e6. Abstract Models 127\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e6.1 The PRAM Model and Its Variations 127\u003c\/p\u003e \u003cp\u003e6.2 Simulating Multiple Accesses on an EREW PRAM 129\u003c\/p\u003e \u003cp\u003e6.3 Analysis of Parallel Algorithms 131\u003c\/p\u003e \u003cp\u003e6.4 Computing Sum and All Sums 133\u003c\/p\u003e \u003cp\u003e6.5 Matrix Multiplication 136\u003c\/p\u003e \u003cp\u003e6.6 Sorting 139\u003c\/p\u003e \u003cp\u003e6.7 Message Passing Model 140\u003c\/p\u003e \u003cp\u003e6.8 Leader Election Problem 146\u003c\/p\u003e \u003cp\u003e6.9 Leader Election in Synchronous Rings 147\u003c\/p\u003e \u003cp\u003e6.10 Chapter Summary 154\u003c\/p\u003e \u003cp\u003eProblems 154\u003c\/p\u003e \u003cp\u003eReferences 155\u003c\/p\u003e \u003cp\u003e\u003cb\u003e7. Network Computing 157\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e7.1 Computer Networks Basics 158\u003c\/p\u003e \u003cp\u003e7.2 Client\/Server Systems 161\u003c\/p\u003e \u003cp\u003e7.3 Clusters 166\u003c\/p\u003e \u003cp\u003e7.4 Interconnection Networks 170\u003c\/p\u003e \u003cp\u003e7.5 Cluster Examples 175\u003c\/p\u003e \u003cp\u003e7.6 Grid Computing 177\u003c\/p\u003e \u003cp\u003e7.7 Chapter Summary 178\u003c\/p\u003e \u003cp\u003eProblems 178\u003c\/p\u003e \u003cp\u003eReferences 180\u003c\/p\u003e \u003cp\u003e\u003cb\u003e8. Parallel Programming in the Parallel Virtual Machine 181\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e8.1 PVM Environment and Application Structure 181\u003c\/p\u003e \u003cp\u003e8.2 Task Creation 185\u003c\/p\u003e \u003cp\u003e8.3 Task Groups 188\u003c\/p\u003e \u003cp\u003e8.4 Communication Among Tasks 190\u003c\/p\u003e \u003cp\u003e8.5 Task Synchronization 196\u003c\/p\u003e \u003cp\u003e8.6 Reduction Operations 198\u003c\/p\u003e \u003cp\u003e8.7 Work Assignment 200\u003c\/p\u003e \u003cp\u003e8.8 Chapter Summary 201\u003c\/p\u003e \u003cp\u003eProblems 202\u003c\/p\u003e \u003cp\u003eReferences 203\u003c\/p\u003e \u003cp\u003e\u003cb\u003e9. Message Passing Interface (MPI) 205\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e9.1 Communicators 205\u003c\/p\u003e \u003cp\u003e9.2 Virtual Topologies 209\u003c\/p\u003e \u003cp\u003e9.3 Task Communication 213\u003c\/p\u003e \u003cp\u003e9.4 Synchronization 217\u003c\/p\u003e \u003cp\u003e9.5 Collective Operations 220\u003c\/p\u003e \u003cp\u003e9.6 Task Creation 225\u003c\/p\u003e \u003cp\u003e9.7 One-Sided Communication 228\u003c\/p\u003e \u003cp\u003e9.8 Chapter Summary 231\u003c\/p\u003e \u003cp\u003eProblems 231\u003c\/p\u003e \u003cp\u003eReferences 233\u003c\/p\u003e \u003cp\u003e\u003cb\u003e10 Scheduling and Task Allocation 235\u003c\/b\u003e\u003c\/p\u003e \u003cp\u003e10.1 The Scheduling Problem 235\u003c\/p\u003e \u003cp\u003e10.2 Scheduling DAGs without Considering Communication 238\u003c\/p\u003e \u003cp\u003e10.3 Communication Models 242\u003c\/p\u003e \u003cp\u003e10.4 Scheduling DAGs with Communication 244\u003c\/p\u003e \u003cp\u003e10.5 The NP-Completeness of the Scheduling Problem 248\u003c\/p\u003e \u003cp\u003e10.6 Heuristic Algorithms 250\u003c\/p\u003e \u003cp\u003e10.7 Task Allocation 256\u003c\/p\u003e \u003cp\u003e10.8 Scheduling in Heterogeneous Environments 262\u003c\/p\u003e \u003cp\u003eProblems 263\u003c\/p\u003e \u003cp\u003eReferences 264\u003c\/p\u003e \u003cp\u003eIndex 267\u003c\/p\u003e","brand":"Wiley","offers":[{"title":"Default Title","offer_id":53515427840343,"sku":"9780471467403","price":131.35,"currency_code":"GBP","in_stock":true}],"url":"https:\/\/bookcurl.com\/products\/advanced-computer-architecture-and-parallel-processing-9780471467403","provider":"Book Curl","version":"1.0","type":"link"}